uboot/include/configs/zynq_cse.h
<<
>>
Prefs
   1/* SPDX-License-Identifier: GPL-2.0+ */
   2/*
   3 * (C) Copyright 2013 - 2017 Xilinx.
   4 *
   5 * Configuration settings for the Xilinx Zynq CSE board.
   6 * See zynq-common.h for Zynq common configs
   7 */
   8
   9#ifndef __CONFIG_ZYNQ_CSE_H
  10#define __CONFIG_ZYNQ_CSE_H
  11
  12#define CONFIG_SKIP_LOWLEVEL_INIT
  13
  14#include <configs/zynq-common.h>
  15
  16/* Undef unneeded configs */
  17#undef CONFIG_EXTRA_ENV_SETTINGS
  18#undef CONFIG_ZLIB
  19#undef CONFIG_GZIP
  20
  21#undef CONFIG_SYS_CBSIZE
  22
  23#define CONFIG_SYS_CBSIZE       1024
  24
  25#undef CONFIG_SYS_INIT_RAM_ADDR
  26#undef CONFIG_SYS_INIT_RAM_SIZE
  27#define CONFIG_SYS_INIT_RAM_ADDR        0xFFFDE000
  28#define CONFIG_SYS_INIT_RAM_SIZE        0x1000
  29#undef CONFIG_SPL_BSS_START_ADDR
  30#undef CONFIG_SPL_BSS_MAX_SIZE
  31#define CONFIG_SPL_BSS_START_ADDR       0x20000
  32#define CONFIG_SPL_BSS_MAX_SIZE         0x8000
  33
  34#endif /* __CONFIG_ZYNQ_CSE_H */
  35