1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Xilinx ZynqMP SoC Tap Delay Programming 4 * 5 * Copyright (C) 2018 Xilinx, Inc. 6 */ 7 8#ifndef __ZYNQMP_TAP_DELAY_H__ 9#define __ZYNQMP_TAP_DELAY_H__ 10 11#ifdef CONFIG_ARCH_ZYNQMP 12void zynqmp_dll_reset(u8 deviceid); 13void arasan_zynqmp_set_tapdelay(u8 device_id, u32 itap_delay, u32 otap_delay); 14#else 15inline void zynqmp_dll_reset(u8 deviceid) {} 16inline void arasan_zynqmp_set_tapdelay(u8 device_id, u32 itap_delay, 17 u32 otap_delay) {} 18#endif 19 20#endif 21