LXR uboot/arch/powerpc/include/asm/global

   1/* SPDX-License-Identifier: GPL-2.0+ */
   2/*
   3 * (C) Copyright 2002-2010
   4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   5 */
   6
   7#ifndef __ASM_GBL_DATA_H
   8#define __ASM_GBL_DATA_H
   9
  10#include "config.h"
  11#include "asm/types.h"
  12
  13/* Architecture-specific global data */
  14struct arch_global_data {
  15#if defined(CONFIG_FSL_ESDHC)
  16        u32 sdhc_clk;
  17#if defined(CONFIG_FSL_ESDHC_ADAPTER_IDENT)
  18        u8 sdhc_adapter;
  19#endif
  20#endif
  21#if defined(CONFIG_MPC8xx)
  22        unsigned long brg_clk;
  23#endif
  24#if defined(CONFIG_CPM2)
  25        /* There are many clocks on the MPC8260 - see page 9-5 */
  26        unsigned long vco_out;
  27        unsigned long cpm_clk;
  28        unsigned long scc_clk;
  29        unsigned long brg_clk;
  30#endif
  31        /* TODO: sjg@chromium.org: Should these be unslgned long? */
  32#if defined(CONFIG_MPC83xx)
  33#ifdef CONFIG_CLK_MPC83XX
  34        u32 core_clk;
  35#else
  36        /* There are other clocks in the MPC83XX */
  37        u32 csb_clk;
  38# if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_ARCH_MPC831X) || \
  39        defined(CONFIG_ARCH_MPC834X) || defined(CONFIG_ARCH_MPC837X)
  40        u32 tsec1_clk;
  41        u32 tsec2_clk;
  42        u32 usbdr_clk;
  43# elif defined(CONFIG_ARCH_MPC8309)
  44        u32 usbdr_clk;
  45# endif
  46# if defined(CONFIG_ARCH_MPC834X)
  47        u32 usbmph_clk;
  48# endif /* CONFIG_ARCH_MPC834X */
  49# if defined(CONFIG_ARCH_MPC8315)
  50        u32 tdm_clk;
  51# endif
  52        u32 core_clk;
  53        u32 enc_clk;
  54        u32 lbiu_clk;
  55        u32 lclk_clk;
  56# if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_ARCH_MPC831X) || \
  57        defined(CONFIG_ARCH_MPC837X)
  58        u32 pciexp1_clk;
  59        u32 pciexp2_clk;
  60# endif
  61# if defined(CONFIG_ARCH_MPC837X) || defined(CONFIG_ARCH_MPC8315)
  62        u32 sata_clk;
  63# endif
  64# if defined(CONFIG_ARCH_MPC8360)
  65        u32 mem_sec_clk;
  66# endif /* CONFIG_ARCH_MPC8360 */
  67#endif
  68#endif
  69#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
  70        u32 lbc_clk;
  71        void *cpu;
  72#endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */
  73#if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || \
  74                defined(CONFIG_MPC86xx)
  75        u32 i2c1_clk;
  76        u32 i2c2_clk;
  77#endif
  78#if defined(CONFIG_QE)
  79        u32 qe_clk;
  80        u32 brg_clk;
  81        uint mp_alloc_base;
  82        uint mp_alloc_top;
  83#endif /* CONFIG_QE */
  84#if defined(CONFIG_FSL_LAW)
  85        u32 used_laws;
  86#endif
  87#if defined(CONFIG_E500)
  88        u32 used_tlb_cams[(CONFIG_SYS_NUM_TLBCAMS+31)/32];
  89#endif
  90        unsigned long reset_status;     /* reset status register at boot */
  91#if defined(CONFIG_MPC83xx)
  92        unsigned long arbiter_event_attributes;
  93        unsigned long arbiter_event_address;
  94#endif
  95#if defined(CONFIG_CPM2)
  96        unsigned int dp_alloc_base;
  97        unsigned int dp_alloc_top;
  98#endif
  99#ifdef CONFIG_SYS_FPGA_COUNT
 100        unsigned fpga_state[CONFIG_SYS_FPGA_COUNT];
 101#endif
 102#if defined(CONFIG_WD_MAX_RATE)
 103        unsigned long long wdt_last;    /* trace watch-dog triggering rate */
 104#endif
 105#if defined(CONFIG_LWMON5)
 106        unsigned long kbd_status;
 107#endif
 108};
 109
 110#include <asm-generic/global_data.h>
 111
 112#if 1
 113#define DECLARE_GLOBAL_DATA_PTR     register volatile gd_t *gd asm ("r2")
 114#else /* We could use plain global data, but the resulting code is bigger */
 115#define XTRN_DECLARE_GLOBAL_DATA_PTR    extern
 116#define DECLARE_GLOBAL_DATA_PTR     XTRN_DECLARE_GLOBAL_DATA_PTR \
 117                                    gd_t *gd
 118#endif
 119
 120#endif /* __ASM_GBL_DATA_H */
 121