1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * 32-bit x86 Startup Code when running from SPL. This is the startup code in 4 * U-Boot proper, when SPL is used. 5 6 * Copyright 2018 Google, Inc 7 * Written by Simon Glass <sjg@chromium.org> 8 */ 9 10#include <config.h> 11 12.section .text.start 13.code32 14.globl _start 15.type _start, @function 16_start: 17 /* Set up memory using the existing stack */ 18 movl $(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE - 4), %eax 19#ifdef CONFIG_DCACHE_RAM_MRC_VAR_SIZE 20 subl $CONFIG_DCACHE_RAM_MRC_VAR_SIZE, %eax 21#endif 22 /* 23 * We don't subject CONFIG_DCACHE_RAM_MRC_VAR_SIZE since memory is 24 * already set up. This has the happy side-effect of putting gd in a 25 * new place separate from SPL, so the memset() in 26 * board_init_f_init_reserve() does not cause any problems (otherwise 27 * it would zero out the gd and crash) 28 */ 29 call board_init_f_alloc_reserve 30 mov %eax, %esp 31 32 call board_init_f_init_reserve 33 34 call x86_cpu_reinit_f 35 xorl %eax, %eax 36 call board_init_f 37 call board_init_f_r 38 39 /* Should not return here */ 40 jmp . 41 42.globl board_init_f_r_trampoline 43.type board_init_f_r_trampoline, @function 44board_init_f_r_trampoline: 45 /* 46 * SPL has been executed and SDRAM has been initialised, U-Boot code 47 * has been copied into RAM, BSS has been cleared and relocation 48 * adjustments have been made. It is now time to jump into the in-RAM 49 * copy of U-Boot 50 * 51 * %eax = Address of top of new stack 52 */ 53 54 /* Stack grows down from top of SDRAM */ 55 movl %eax, %esp 56 57 /* Re-enter U-Boot by calling board_init_f_r() */ 58 call board_init_f_r 59 60die: 61 hlt 62 jmp die 63 hlt 64 65 .align 4 66_dt_ucode_base_size: 67 /* These next two fields are filled in by binman */ 68.globl ucode_base 69ucode_base: /* Declared in microcode.h */ 70 .long 0 /* microcode base */ 71.globl ucode_size 72ucode_size: /* Declared in microcode.h */ 73 .long 0 /* microcode size */ 74