LXR uboot/board/freescale/b4860qds/spl.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/* Copyright 2013 Freescale Semiconductor, Inc.
   3 */
   4
   5#include <common.h>
   6#include <console.h>
   7#include <env.h>
   8#include <env_internal.h>
   9#include <asm/spl.h>
  10#include <malloc.h>
  11#include <ns16550.h>
  12#include <nand.h>
  13#include <i2c.h>
  14#include "../common/qixis.h"
  15#include "b4860qds_qixis.h"
  16
  17DECLARE_GLOBAL_DATA_PTR;
  18
  19phys_size_t get_effective_memsize(void)
  20{
  21        return CONFIG_SYS_L3_SIZE;
  22}
  23
  24unsigned long get_board_sys_clk(void)
  25{
  26        u8 sysclk_conf = QIXIS_READ(brdcfg[1]);
  27
  28        switch ((sysclk_conf & 0x0C) >> 2) {
  29        case QIXIS_CLK_100:
  30                return 100000000;
  31        case QIXIS_CLK_125:
  32                return 125000000;
  33        case QIXIS_CLK_133:
  34                return 133333333;
  35        }
  36        return 66666666;
  37}
  38
  39unsigned long get_board_ddr_clk(void)
  40{
  41        u8 ddrclk_conf = QIXIS_READ(brdcfg[1]);
  42
  43        switch (ddrclk_conf & 0x03) {
  44        case QIXIS_CLK_100:
  45                return 100000000;
  46        case QIXIS_CLK_125:
  47                return 125000000;
  48        case QIXIS_CLK_133:
  49                return 133333333;
  50        }
  51        return 66666666;
  52}
  53
  54void board_init_f(ulong bootflag)
  55{
  56        u32 plat_ratio, sys_clk, uart_clk;
  57        ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
  58
  59        /* Memcpy existing GD at CONFIG_SPL_GD_ADDR */
  60        memcpy((void *)CONFIG_SPL_GD_ADDR, (void *)gd, sizeof(gd_t));
  61
  62        /* Update GD pointer */
  63        gd = (gd_t *)(CONFIG_SPL_GD_ADDR);
  64
  65        /* compiler optimization barrier needed for GCC >= 3.4 */
  66        __asm__ __volatile__("" : : : "memory");
  67
  68        console_init_f();
  69
  70        /* initialize selected port with appropriate baud rate */
  71        sys_clk = get_board_sys_clk();
  72        plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
  73        uart_clk = sys_clk * plat_ratio / 2;
  74
  75        NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
  76                     uart_clk / 16 / CONFIG_BAUDRATE);
  77
  78        relocate_code(CONFIG_SPL_RELOC_STACK, (gd_t *)CONFIG_SPL_GD_ADDR, 0x0);
  79}
  80
  81void board_init_r(gd_t *gd, ulong dest_addr)
  82{
  83        bd_t *bd;
  84
  85        bd = (bd_t *)(gd + sizeof(gd_t));
  86        memset(bd, 0, sizeof(bd_t));
  87        gd->bd = bd;
  88        bd->bi_memstart = CONFIG_SYS_INIT_L3_ADDR;
  89        bd->bi_memsize = CONFIG_SYS_L3_SIZE;
  90
  91        arch_cpu_init();
  92        get_clocks();
  93        mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
  94                        CONFIG_SPL_RELOC_MALLOC_SIZE);
  95        gd->flags |= GD_FLG_FULL_MALLOC_INIT;
  96
  97#ifndef CONFIG_SPL_NAND_BOOT
  98        env_init();
  99        env_relocate();
 100#else
 101        /* relocate environment function pointers etc. */
 102        nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
 103                            (uchar *)SPL_ENV_ADDR);
 104        gd->env_addr  = (ulong)(SPL_ENV_ADDR);
 105        gd->env_valid = ENV_VALID;
 106#endif
 107
 108        i2c_init_all();
 109
 110        puts("\n\n");
 111
 112        dram_init();
 113
 114#ifdef CONFIG_SPL_NAND_BOOT
 115        nand_boot();
 116#endif
 117}
 118