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8#include <common.h>
9#include <console.h>
10#include <malloc.h>
11#include <spi.h>
12#include <asm/io.h>
13#include "sh_spi.h"
14
15static void sh_spi_write(unsigned long data, unsigned long *reg)
16{
17 writel(data, reg);
18}
19
20static unsigned long sh_spi_read(unsigned long *reg)
21{
22 return readl(reg);
23}
24
25static void sh_spi_set_bit(unsigned long val, unsigned long *reg)
26{
27 unsigned long tmp;
28
29 tmp = sh_spi_read(reg);
30 tmp |= val;
31 sh_spi_write(tmp, reg);
32}
33
34static void sh_spi_clear_bit(unsigned long val, unsigned long *reg)
35{
36 unsigned long tmp;
37
38 tmp = sh_spi_read(reg);
39 tmp &= ~val;
40 sh_spi_write(tmp, reg);
41}
42
43static void clear_fifo(struct sh_spi *ss)
44{
45 sh_spi_set_bit(SH_SPI_RSTF, &ss->regs->cr2);
46 sh_spi_clear_bit(SH_SPI_RSTF, &ss->regs->cr2);
47}
48
49static int recvbuf_wait(struct sh_spi *ss)
50{
51 while (sh_spi_read(&ss->regs->cr1) & SH_SPI_RBE) {
52 if (ctrlc())
53 return 1;
54 udelay(10);
55 }
56 return 0;
57}
58
59static int write_fifo_empty_wait(struct sh_spi *ss)
60{
61 while (!(sh_spi_read(&ss->regs->cr1) & SH_SPI_TBE)) {
62 if (ctrlc())
63 return 1;
64 udelay(10);
65 }
66 return 0;
67}
68
69static void sh_spi_set_cs(struct sh_spi *ss, unsigned int cs)
70{
71 unsigned long val = 0;
72
73 if (cs & 0x01)
74 val |= SH_SPI_SSS0;
75 if (cs & 0x02)
76 val |= SH_SPI_SSS1;
77
78 sh_spi_clear_bit(SH_SPI_SSS0 | SH_SPI_SSS1, &ss->regs->cr4);
79 sh_spi_set_bit(val, &ss->regs->cr4);
80}
81
82struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
83 unsigned int max_hz, unsigned int mode)
84{
85 struct sh_spi *ss;
86
87 if (!spi_cs_is_valid(bus, cs))
88 return NULL;
89
90 ss = spi_alloc_slave(struct sh_spi, bus, cs);
91 if (!ss)
92 return NULL;
93
94 ss->regs = (struct sh_spi_regs *)CONFIG_SH_SPI_BASE;
95
96
97 sh_spi_write(0xfe, &ss->regs->cr1);
98
99 sh_spi_write(0x00, &ss->regs->cr1);
100
101 sh_spi_write(0x00, &ss->regs->cr3);
102 sh_spi_set_cs(ss, cs);
103
104 clear_fifo(ss);
105
106
107 sh_spi_write(sh_spi_read(&ss->regs->cr2) | 0x07, &ss->regs->cr2);
108 udelay(10);
109
110 return &ss->slave;
111}
112
113void spi_free_slave(struct spi_slave *slave)
114{
115 struct sh_spi *spi = to_sh_spi(slave);
116
117 free(spi);
118}
119
120int spi_claim_bus(struct spi_slave *slave)
121{
122 return 0;
123}
124
125void spi_release_bus(struct spi_slave *slave)
126{
127 struct sh_spi *ss = to_sh_spi(slave);
128
129 sh_spi_write(sh_spi_read(&ss->regs->cr1) &
130 ~(SH_SPI_SSA | SH_SPI_SSDB | SH_SPI_SSD), &ss->regs->cr1);
131}
132
133static int sh_spi_send(struct sh_spi *ss, const unsigned char *tx_data,
134 unsigned int len, unsigned long flags)
135{
136 int i, cur_len, ret = 0;
137 int remain = (int)len;
138
139 if (len >= SH_SPI_FIFO_SIZE)
140 sh_spi_set_bit(SH_SPI_SSA, &ss->regs->cr1);
141
142 while (remain > 0) {
143 cur_len = (remain < SH_SPI_FIFO_SIZE) ?
144 remain : SH_SPI_FIFO_SIZE;
145 for (i = 0; i < cur_len &&
146 !(sh_spi_read(&ss->regs->cr4) & SH_SPI_WPABRT) &&
147 !(sh_spi_read(&ss->regs->cr1) & SH_SPI_TBF);
148 i++)
149 sh_spi_write(tx_data[i], &ss->regs->tbr_rbr);
150
151 cur_len = i;
152
153 if (sh_spi_read(&ss->regs->cr4) & SH_SPI_WPABRT) {
154
155 flags |= SPI_XFER_END;
156 sh_spi_set_bit(SH_SPI_WPABRT, &ss->regs->cr4);
157 ret = 1;
158 break;
159 }
160
161 remain -= cur_len;
162 tx_data += cur_len;
163
164 if (remain > 0)
165 write_fifo_empty_wait(ss);
166 }
167
168 if (flags & SPI_XFER_END) {
169 sh_spi_clear_bit(SH_SPI_SSD | SH_SPI_SSDB, &ss->regs->cr1);
170 sh_spi_set_bit(SH_SPI_SSA, &ss->regs->cr1);
171 udelay(100);
172 write_fifo_empty_wait(ss);
173 }
174
175 return ret;
176}
177
178static int sh_spi_receive(struct sh_spi *ss, unsigned char *rx_data,
179 unsigned int len, unsigned long flags)
180{
181 int i;
182
183 if (len > SH_SPI_MAX_BYTE)
184 sh_spi_write(SH_SPI_MAX_BYTE, &ss->regs->cr3);
185 else
186 sh_spi_write(len, &ss->regs->cr3);
187
188 sh_spi_clear_bit(SH_SPI_SSD | SH_SPI_SSDB, &ss->regs->cr1);
189 sh_spi_set_bit(SH_SPI_SSA, &ss->regs->cr1);
190
191 for (i = 0; i < len; i++) {
192 if (recvbuf_wait(ss))
193 return 0;
194
195 rx_data[i] = (unsigned char)sh_spi_read(&ss->regs->tbr_rbr);
196 }
197 sh_spi_write(0, &ss->regs->cr3);
198
199 return 0;
200}
201
202int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
203 void *din, unsigned long flags)
204{
205 struct sh_spi *ss = to_sh_spi(slave);
206 const unsigned char *tx_data = dout;
207 unsigned char *rx_data = din;
208 unsigned int len = bitlen / 8;
209 int ret = 0;
210
211 if (flags & SPI_XFER_BEGIN)
212 sh_spi_write(sh_spi_read(&ss->regs->cr1) & ~SH_SPI_SSA,
213 &ss->regs->cr1);
214
215 if (tx_data)
216 ret = sh_spi_send(ss, tx_data, len, flags);
217
218 if (ret == 0 && rx_data)
219 ret = sh_spi_receive(ss, rx_data, len, flags);
220
221 if (flags & SPI_XFER_END) {
222 sh_spi_set_bit(SH_SPI_SSD, &ss->regs->cr1);
223 udelay(100);
224
225 sh_spi_clear_bit(SH_SPI_SSA | SH_SPI_SSDB | SH_SPI_SSD,
226 &ss->regs->cr1);
227 clear_fifo(ss);
228 }
229
230 return ret;
231}
232
233int spi_cs_is_valid(unsigned int bus, unsigned int cs)
234{
235 if (!bus && cs < SH_SPI_NUM_CS)
236 return 1;
237 else
238 return 0;
239}
240
241void spi_cs_activate(struct spi_slave *slave)
242{
243
244}
245
246void spi_cs_deactivate(struct spi_slave *slave)
247{
248
249}
250
