uboot/drivers/usb/gadget/ci_udc.c
<<
>>
Prefs
   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright 2011, Marvell Semiconductor Inc.
   4 * Lei Wen <leiwen@marvell.com>
   5 *
   6 * Back ported to the 8xx platform (from the 8260 platform) by
   7 * Murray.Jensen@cmst.csiro.au, 27-Jan-01.
   8 */
   9
  10#include <common.h>
  11#include <command.h>
  12#include <config.h>
  13#include <cpu_func.h>
  14#include <net.h>
  15#include <malloc.h>
  16#include <asm/byteorder.h>
  17#include <linux/errno.h>
  18#include <asm/io.h>
  19#include <asm/unaligned.h>
  20#include <linux/types.h>
  21#include <linux/usb/ch9.h>
  22#include <linux/usb/gadget.h>
  23#include <usb/ci_udc.h>
  24#include "../host/ehci.h"
  25#include "ci_udc.h"
  26
  27/*
  28 * Check if the system has too long cachelines. If the cachelines are
  29 * longer then 128b, the driver will not be able flush/invalidate data
  30 * cache over separate QH entries. We use 128b because one QH entry is
  31 * 64b long and there are always two QH list entries for each endpoint.
  32 */
  33#if ARCH_DMA_MINALIGN > 128
  34#error This driver can not work on systems with caches longer than 128b
  35#endif
  36
  37/*
  38 * Every QTD must be individually aligned, since we can program any
  39 * QTD's address into HW. Cache flushing requires ARCH_DMA_MINALIGN,
  40 * and the USB HW requires 32-byte alignment. Align to both:
  41 */
  42#define ILIST_ALIGN             roundup(ARCH_DMA_MINALIGN, 32)
  43/* Each QTD is this size */
  44#define ILIST_ENT_RAW_SZ        sizeof(struct ept_queue_item)
  45/*
  46 * Align the size of the QTD too, so we can add this value to each
  47 * QTD's address to get another aligned address.
  48 */
  49#define ILIST_ENT_SZ            roundup(ILIST_ENT_RAW_SZ, ILIST_ALIGN)
  50/* For each endpoint, we need 2 QTDs, one for each of IN and OUT */
  51#define ILIST_SZ                (NUM_ENDPOINTS * 2 * ILIST_ENT_SZ)
  52
  53#define EP_MAX_LENGTH_TRANSFER  0x4000
  54
  55#ifndef DEBUG
  56#define DBG(x...) do {} while (0)
  57#else
  58#define DBG(x...) printf(x)
  59static const char *reqname(unsigned r)
  60{
  61        switch (r) {
  62        case USB_REQ_GET_STATUS: return "GET_STATUS";
  63        case USB_REQ_CLEAR_FEATURE: return "CLEAR_FEATURE";
  64        case USB_REQ_SET_FEATURE: return "SET_FEATURE";
  65        case USB_REQ_SET_ADDRESS: return "SET_ADDRESS";
  66        case USB_REQ_GET_DESCRIPTOR: return "GET_DESCRIPTOR";
  67        case USB_REQ_SET_DESCRIPTOR: return "SET_DESCRIPTOR";
  68        case USB_REQ_GET_CONFIGURATION: return "GET_CONFIGURATION";
  69        case USB_REQ_SET_CONFIGURATION: return "SET_CONFIGURATION";
  70        case USB_REQ_GET_INTERFACE: return "GET_INTERFACE";
  71        case USB_REQ_SET_INTERFACE: return "SET_INTERFACE";
  72        default: return "*UNKNOWN*";
  73        }
  74}
  75#endif
  76
  77static struct usb_endpoint_descriptor ep0_desc = {
  78        .bLength = sizeof(struct usb_endpoint_descriptor),
  79        .bDescriptorType = USB_DT_ENDPOINT,
  80        .bEndpointAddress = USB_DIR_IN,
  81        .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  82};
  83
  84static int ci_pullup(struct usb_gadget *gadget, int is_on);
  85static int ci_ep_enable(struct usb_ep *ep,
  86                const struct usb_endpoint_descriptor *desc);
  87static int ci_ep_disable(struct usb_ep *ep);
  88static int ci_ep_queue(struct usb_ep *ep,
  89                struct usb_request *req, gfp_t gfp_flags);
  90static int ci_ep_dequeue(struct usb_ep *ep, struct usb_request *req);
  91static struct usb_request *
  92ci_ep_alloc_request(struct usb_ep *ep, unsigned int gfp_flags);
  93static void ci_ep_free_request(struct usb_ep *ep, struct usb_request *_req);
  94
  95static struct usb_gadget_ops ci_udc_ops = {
  96        .pullup = ci_pullup,
  97};
  98
  99static struct usb_ep_ops ci_ep_ops = {
 100        .enable         = ci_ep_enable,
 101        .disable        = ci_ep_disable,
 102        .queue          = ci_ep_queue,
 103        .dequeue        = ci_ep_dequeue,
 104        .alloc_request  = ci_ep_alloc_request,
 105        .free_request   = ci_ep_free_request,
 106};
 107
 108__weak void ci_init_after_reset(struct ehci_ctrl *ctrl)
 109{
 110}
 111
 112/* Init values for USB endpoints. */
 113static const struct usb_ep ci_ep_init[5] = {
 114        [0] = { /* EP 0 */
 115                .maxpacket      = 64,
 116                .name           = "ep0",
 117                .ops            = &ci_ep_ops,
 118        },
 119        [1] = {
 120                .maxpacket      = 512,
 121                .name           = "ep1in-bulk",
 122                .ops            = &ci_ep_ops,
 123        },
 124        [2] = {
 125                .maxpacket      = 512,
 126                .name           = "ep2out-bulk",
 127                .ops            = &ci_ep_ops,
 128        },
 129        [3] = {
 130                .maxpacket      = 512,
 131                .name           = "ep3in-int",
 132                .ops            = &ci_ep_ops,
 133        },
 134        [4] = {
 135                .maxpacket      = 512,
 136                .name           = "ep-",
 137                .ops            = &ci_ep_ops,
 138        },
 139};
 140
 141static struct ci_drv controller = {
 142        .gadget = {
 143                .name   = "ci_udc",
 144                .ops    = &ci_udc_ops,
 145                .is_dualspeed = 1,
 146        },
 147};
 148
 149/**
 150 * ci_get_qh() - return queue head for endpoint
 151 * @ep_num:     Endpoint number
 152 * @dir_in:     Direction of the endpoint (IN = 1, OUT = 0)
 153 *
 154 * This function returns the QH associated with particular endpoint
 155 * and it's direction.
 156 */
 157static struct ept_queue_head *ci_get_qh(int ep_num, int dir_in)
 158{
 159        return &controller.epts[(ep_num * 2) + dir_in];
 160}
 161
 162/**
 163 * ci_get_qtd() - return queue item for endpoint
 164 * @ep_num:     Endpoint number
 165 * @dir_in:     Direction of the endpoint (IN = 1, OUT = 0)
 166 *
 167 * This function returns the QH associated with particular endpoint
 168 * and it's direction.
 169 */
 170static struct ept_queue_item *ci_get_qtd(int ep_num, int dir_in)
 171{
 172        int index = (ep_num * 2) + dir_in;
 173        uint8_t *imem = controller.items_mem + (index * ILIST_ENT_SZ);
 174        return (struct ept_queue_item *)imem;
 175}
 176
 177/**
 178 * ci_flush_qh - flush cache over queue head
 179 * @ep_num:     Endpoint number
 180 *
 181 * This function flushes cache over QH for particular endpoint.
 182 */
 183static void ci_flush_qh(int ep_num)
 184{
 185        struct ept_queue_head *head = ci_get_qh(ep_num, 0);
 186        const unsigned long start = (unsigned long)head;
 187        const unsigned long end = start + 2 * sizeof(*head);
 188
 189        flush_dcache_range(start, end);
 190}
 191
 192/**
 193 * ci_invalidate_qh - invalidate cache over queue head
 194 * @ep_num:     Endpoint number
 195 *
 196 * This function invalidates cache over QH for particular endpoint.
 197 */
 198static void ci_invalidate_qh(int ep_num)
 199{
 200        struct ept_queue_head *head = ci_get_qh(ep_num, 0);
 201        unsigned long start = (unsigned long)head;
 202        unsigned long end = start + 2 * sizeof(*head);
 203
 204        invalidate_dcache_range(start, end);
 205}
 206
 207/**
 208 * ci_flush_qtd - flush cache over queue item
 209 * @ep_num:     Endpoint number
 210 *
 211 * This function flushes cache over qTD pair for particular endpoint.
 212 */
 213static void ci_flush_qtd(int ep_num)
 214{
 215        struct ept_queue_item *item = ci_get_qtd(ep_num, 0);
 216        const unsigned long start = (unsigned long)item;
 217        const unsigned long end = start + 2 * ILIST_ENT_SZ;
 218
 219        flush_dcache_range(start, end);
 220}
 221
 222/**
 223 * ci_flush_td - flush cache over queue item
 224 * @td: td pointer
 225 *
 226 * This function flushes cache for particular transfer descriptor.
 227 */
 228static void ci_flush_td(struct ept_queue_item *td)
 229{
 230        const unsigned long start = (unsigned long)td;
 231        const unsigned long end = (unsigned long)td + ILIST_ENT_SZ;
 232        flush_dcache_range(start, end);
 233}
 234
 235/**
 236 * ci_invalidate_qtd - invalidate cache over queue item
 237 * @ep_num:     Endpoint number
 238 *
 239 * This function invalidates cache over qTD pair for particular endpoint.
 240 */
 241static void ci_invalidate_qtd(int ep_num)
 242{
 243        struct ept_queue_item *item = ci_get_qtd(ep_num, 0);
 244        const unsigned long start = (unsigned long)item;
 245        const unsigned long end = start + 2 * ILIST_ENT_SZ;
 246
 247        invalidate_dcache_range(start, end);
 248}
 249
 250/**
 251 * ci_invalidate_td - invalidate cache over queue item
 252 * @td: td pointer
 253 *
 254 * This function invalidates cache for particular transfer descriptor.
 255 */
 256static void ci_invalidate_td(struct ept_queue_item *td)
 257{
 258        const unsigned long start = (unsigned long)td;
 259        const unsigned long end = start + ILIST_ENT_SZ;
 260        invalidate_dcache_range(start, end);
 261}
 262
 263static struct usb_request *
 264ci_ep_alloc_request(struct usb_ep *ep, unsigned int gfp_flags)
 265{
 266        struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep);
 267        int num = -1;
 268        struct ci_req *ci_req;
 269
 270        if (ci_ep->desc)
 271                num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
 272
 273        if (num == 0 && controller.ep0_req)
 274                return &controller.ep0_req->req;
 275
 276        ci_req = calloc(1, sizeof(*ci_req));
 277        if (!ci_req)
 278                return NULL;
 279
 280        INIT_LIST_HEAD(&ci_req->queue);
 281
 282        if (num == 0)
 283                controller.ep0_req = ci_req;
 284
 285        return &ci_req->req;
 286}
 287
 288static void ci_ep_free_request(struct usb_ep *ep, struct usb_request *req)
 289{
 290        struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep);
 291        struct ci_req *ci_req = container_of(req, struct ci_req, req);
 292        int num = -1;
 293
 294        if (ci_ep->desc)
 295                num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
 296
 297        if (num == 0) {
 298                if (!controller.ep0_req)
 299                        return;
 300                controller.ep0_req = 0;
 301        }
 302
 303        if (ci_req->b_buf)
 304                free(ci_req->b_buf);
 305        free(ci_req);
 306}
 307
 308static void ep_enable(int num, int in, int maxpacket)
 309{
 310        struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
 311        unsigned n;
 312
 313        n = readl(&udc->epctrl[num]);
 314        if (in)
 315                n |= (CTRL_TXE | CTRL_TXR | CTRL_TXT_BULK);
 316        else
 317                n |= (CTRL_RXE | CTRL_RXR | CTRL_RXT_BULK);
 318
 319        if (num != 0) {
 320                struct ept_queue_head *head = ci_get_qh(num, in);
 321
 322                head->config = CONFIG_MAX_PKT(maxpacket) | CONFIG_ZLT;
 323                ci_flush_qh(num);
 324        }
 325        writel(n, &udc->epctrl[num]);
 326}
 327
 328static int ci_ep_enable(struct usb_ep *ep,
 329                const struct usb_endpoint_descriptor *desc)
 330{
 331        struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep);
 332        int num, in;
 333        num = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
 334        in = (desc->bEndpointAddress & USB_DIR_IN) != 0;
 335        ci_ep->desc = desc;
 336
 337        if (num) {
 338                int max = get_unaligned_le16(&desc->wMaxPacketSize);
 339
 340                if ((max > 64) && (controller.gadget.speed == USB_SPEED_FULL))
 341                        max = 64;
 342                if (ep->maxpacket != max) {
 343                        DBG("%s: from %d to %d\n", __func__,
 344                            ep->maxpacket, max);
 345                        ep->maxpacket = max;
 346                }
 347        }
 348        ep_enable(num, in, ep->maxpacket);
 349        DBG("%s: num=%d maxpacket=%d\n", __func__, num, ep->maxpacket);
 350        return 0;
 351}
 352
 353static int ci_ep_disable(struct usb_ep *ep)
 354{
 355        struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep);
 356
 357        ci_ep->desc = NULL;
 358        return 0;
 359}
 360
 361static int ci_bounce(struct ci_req *ci_req, int in)
 362{
 363        struct usb_request *req = &ci_req->req;
 364        unsigned long addr = (unsigned long)req->buf;
 365        unsigned long hwaddr;
 366        uint32_t aligned_used_len;
 367
 368        /* Input buffer address is not aligned. */
 369        if (addr & (ARCH_DMA_MINALIGN - 1))
 370                goto align;
 371
 372        /* Input buffer length is not aligned. */
 373        if (req->length & (ARCH_DMA_MINALIGN - 1))
 374                goto align;
 375
 376        /* The buffer is well aligned, only flush cache. */
 377        ci_req->hw_len = req->length;
 378        ci_req->hw_buf = req->buf;
 379        goto flush;
 380
 381align:
 382        if (ci_req->b_buf && req->length > ci_req->b_len) {
 383                free(ci_req->b_buf);
 384                ci_req->b_buf = 0;
 385        }
 386        if (!ci_req->b_buf) {
 387                ci_req->b_len = roundup(req->length, ARCH_DMA_MINALIGN);
 388                ci_req->b_buf = memalign(ARCH_DMA_MINALIGN, ci_req->b_len);
 389                if (!ci_req->b_buf)
 390                        return -ENOMEM;
 391        }
 392        ci_req->hw_len = ci_req->b_len;
 393        ci_req->hw_buf = ci_req->b_buf;
 394
 395        if (in)
 396                memcpy(ci_req->hw_buf, req->buf, req->length);
 397
 398flush:
 399        hwaddr = (unsigned long)ci_req->hw_buf;
 400        aligned_used_len = roundup(req->length, ARCH_DMA_MINALIGN);
 401        flush_dcache_range(hwaddr, hwaddr + aligned_used_len);
 402
 403        return 0;
 404}
 405
 406static void ci_debounce(struct ci_req *ci_req, int in)
 407{
 408        struct usb_request *req = &ci_req->req;
 409        unsigned long addr = (unsigned long)req->buf;
 410        unsigned long hwaddr = (unsigned long)ci_req->hw_buf;
 411        uint32_t aligned_used_len;
 412
 413        if (in)
 414                return;
 415
 416        aligned_used_len = roundup(req->actual, ARCH_DMA_MINALIGN);
 417        invalidate_dcache_range(hwaddr, hwaddr + aligned_used_len);
 418
 419        if (addr == hwaddr)
 420                return; /* not a bounce */
 421
 422        memcpy(req->buf, ci_req->hw_buf, req->actual);
 423}
 424
 425static void ci_ep_submit_next_request(struct ci_ep *ci_ep)
 426{
 427        struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
 428        struct ept_queue_item *item;
 429        struct ept_queue_head *head;
 430        int bit, num, len, in;
 431        struct ci_req *ci_req;
 432        u8 *buf;
 433        uint32_t len_left, len_this_dtd;
 434        struct ept_queue_item *dtd, *qtd;
 435
 436        ci_ep->req_primed = true;
 437
 438        num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
 439        in = (ci_ep->desc->bEndpointAddress & USB_DIR_IN) != 0;
 440        item = ci_get_qtd(num, in);
 441        head = ci_get_qh(num, in);
 442
 443        ci_req = list_first_entry(&ci_ep->queue, struct ci_req, queue);
 444        len = ci_req->req.length;
 445
 446        head->next = (unsigned long)item;
 447        head->info = 0;
 448
 449        ci_req->dtd_count = 0;
 450        buf = ci_req->hw_buf;
 451        len_left = len;
 452        dtd = item;
 453
 454        do {
 455                len_this_dtd = min(len_left, (unsigned)EP_MAX_LENGTH_TRANSFER);
 456
 457                dtd->info = INFO_BYTES(len_this_dtd) | INFO_ACTIVE;
 458                dtd->page0 = (unsigned long)buf;
 459                dtd->page1 = ((unsigned long)buf & 0xfffff000) + 0x1000;
 460                dtd->page2 = ((unsigned long)buf & 0xfffff000) + 0x2000;
 461                dtd->page3 = ((unsigned long)buf & 0xfffff000) + 0x3000;
 462                dtd->page4 = ((unsigned long)buf & 0xfffff000) + 0x4000;
 463
 464                len_left -= len_this_dtd;
 465                buf += len_this_dtd;
 466
 467                if (len_left) {
 468                        qtd = (struct ept_queue_item *)
 469                               memalign(ILIST_ALIGN, ILIST_ENT_SZ);
 470                        dtd->next = (unsigned long)qtd;
 471                        dtd = qtd;
 472                        memset(dtd, 0, ILIST_ENT_SZ);
 473                }
 474
 475                ci_req->dtd_count++;
 476        } while (len_left);
 477
 478        item = dtd;
 479        /*
 480         * When sending the data for an IN transaction, the attached host
 481         * knows that all data for the IN is sent when one of the following
 482         * occurs:
 483         * a) A zero-length packet is transmitted.
 484         * b) A packet with length that isn't an exact multiple of the ep's
 485         *    maxpacket is transmitted.
 486         * c) Enough data is sent to exactly fill the host's maximum expected
 487         *    IN transaction size.
 488         *
 489         * One of these conditions MUST apply at the end of an IN transaction,
 490         * or the transaction will not be considered complete by the host. If
 491         * none of (a)..(c) already applies, then we must force (a) to apply
 492         * by explicitly sending an extra zero-length packet.
 493         */
 494        /*  IN    !a     !b                              !c */
 495        if (in && len && !(len % ci_ep->ep.maxpacket) && ci_req->req.zero) {
 496                /*
 497                 * Each endpoint has 2 items allocated, even though typically
 498                 * only 1 is used at a time since either an IN or an OUT but
 499                 * not both is queued. For an IN transaction, item currently
 500                 * points at the second of these items, so we know that we
 501                 * can use the other to transmit the extra zero-length packet.
 502                 */
 503                struct ept_queue_item *other_item = ci_get_qtd(num, 0);
 504                item->next = (unsigned long)other_item;
 505                item = other_item;
 506                item->info = INFO_ACTIVE;
 507        }
 508
 509        item->next = TERMINATE;
 510        item->info |= INFO_IOC;
 511
 512        ci_flush_qtd(num);
 513
 514        item = (struct ept_queue_item *)(unsigned long)head->next;
 515        while (item->next != TERMINATE) {
 516                ci_flush_td((struct ept_queue_item *)(unsigned long)item->next);
 517                item = (struct ept_queue_item *)(unsigned long)item->next;
 518        }
 519
 520        DBG("ept%d %s queue len %x, req %p, buffer %p\n",
 521            num, in ? "in" : "out", len, ci_req, ci_req->hw_buf);
 522        ci_flush_qh(num);
 523
 524        if (in)
 525                bit = EPT_TX(num);
 526        else
 527                bit = EPT_RX(num);
 528
 529        writel(bit, &udc->epprime);
 530}
 531
 532static int ci_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
 533{
 534        struct ci_ep *ci_ep = container_of(_ep, struct ci_ep, ep);
 535        struct ci_req *ci_req;
 536
 537        list_for_each_entry(ci_req, &ci_ep->queue, queue) {
 538                if (&ci_req->req == _req)
 539                        break;
 540        }
 541
 542        if (&ci_req->req != _req)
 543                return -EINVAL;
 544
 545        list_del_init(&ci_req->queue);
 546
 547        if (ci_req->req.status == -EINPROGRESS) {
 548                ci_req->req.status = -ECONNRESET;
 549                if (ci_req->req.complete)
 550                        ci_req->req.complete(_ep, _req);
 551        }
 552
 553        return 0;
 554}
 555
 556static int ci_ep_queue(struct usb_ep *ep,
 557                struct usb_request *req, gfp_t gfp_flags)
 558{
 559        struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep);
 560        struct ci_req *ci_req = container_of(req, struct ci_req, req);
 561        int in, ret;
 562        int __maybe_unused num;
 563
 564        num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
 565        in = (ci_ep->desc->bEndpointAddress & USB_DIR_IN) != 0;
 566
 567        if (!num && ci_ep->req_primed) {
 568                /*
 569                 * The flipping of ep0 between IN and OUT relies on
 570                 * ci_ep_queue consuming the current IN/OUT setting
 571                 * immediately. If this is deferred to a later point when the
 572                 * req is pulled out of ci_req->queue, then the IN/OUT setting
 573                 * may have been changed since the req was queued, and state
 574                 * will get out of sync. This condition doesn't occur today,
 575                 * but could if bugs were introduced later, and this error
 576                 * check will save a lot of debugging time.
 577                 */
 578                printf("%s: ep0 transaction already in progress\n", __func__);
 579                return -EPROTO;
 580        }
 581
 582        ret = ci_bounce(ci_req, in);
 583        if (ret)
 584                return ret;
 585
 586        DBG("ept%d %s pre-queue req %p, buffer %p\n",
 587            num, in ? "in" : "out", ci_req, ci_req->hw_buf);
 588        list_add_tail(&ci_req->queue, &ci_ep->queue);
 589
 590        if (!ci_ep->req_primed)
 591                ci_ep_submit_next_request(ci_ep);
 592
 593        return 0;
 594}
 595
 596static void flip_ep0_direction(void)
 597{
 598        if (ep0_desc.bEndpointAddress == USB_DIR_IN) {
 599                DBG("%s: Flipping ep0 to OUT\n", __func__);
 600                ep0_desc.bEndpointAddress = 0;
 601        } else {
 602                DBG("%s: Flipping ep0 to IN\n", __func__);
 603                ep0_desc.bEndpointAddress = USB_DIR_IN;
 604        }
 605}
 606
 607static void handle_ep_complete(struct ci_ep *ci_ep)
 608{
 609        struct ept_queue_item *item, *next_td;
 610        int num, in, len, j;
 611        struct ci_req *ci_req;
 612
 613        num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
 614        in = (ci_ep->desc->bEndpointAddress & USB_DIR_IN) != 0;
 615        item = ci_get_qtd(num, in);
 616        ci_invalidate_qtd(num);
 617        ci_req = list_first_entry(&ci_ep->queue, struct ci_req, queue);
 618
 619        next_td = item;
 620        len = 0;
 621        for (j = 0; j < ci_req->dtd_count; j++) {
 622                ci_invalidate_td(next_td);
 623                item = next_td;
 624                len += (item->info >> 16) & 0x7fff;
 625                if (item->info & 0xff)
 626                        printf("EP%d/%s FAIL info=%x pg0=%x\n",
 627                               num, in ? "in" : "out", item->info, item->page0);
 628                if (j != ci_req->dtd_count - 1)
 629                        next_td = (struct ept_queue_item *)(unsigned long)
 630                                item->next;
 631                if (j != 0)
 632                        free(item);
 633        }
 634
 635        list_del_init(&ci_req->queue);
 636        ci_ep->req_primed = false;
 637
 638        if (!list_empty(&ci_ep->queue))
 639                ci_ep_submit_next_request(ci_ep);
 640
 641        ci_req->req.actual = ci_req->req.length - len;
 642        ci_debounce(ci_req, in);
 643
 644        DBG("ept%d %s req %p, complete %x\n",
 645            num, in ? "in" : "out", ci_req, len);
 646        if (num != 0 || controller.ep0_data_phase)
 647                ci_req->req.complete(&ci_ep->ep, &ci_req->req);
 648        if (num == 0 && controller.ep0_data_phase) {
 649                /*
 650                 * Data Stage is complete, so flip ep0 dir for Status Stage,
 651                 * which always transfers a packet in the opposite direction.
 652                 */
 653                DBG("%s: flip ep0 dir for Status Stage\n", __func__);
 654                flip_ep0_direction();
 655                controller.ep0_data_phase = false;
 656                ci_req->req.length = 0;
 657                usb_ep_queue(&ci_ep->ep, &ci_req->req, 0);
 658        }
 659}
 660
 661#define SETUP(type, request) (((type) << 8) | (request))
 662
 663static void handle_setup(void)
 664{
 665        struct ci_ep *ci_ep = &controller.ep[0];
 666        struct ci_req *ci_req;
 667        struct usb_request *req;
 668        struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
 669        struct ept_queue_head *head;
 670        struct usb_ctrlrequest r;
 671        int status = 0;
 672        int num, in, _num, _in, i;
 673        char *buf;
 674
 675        ci_req = controller.ep0_req;
 676        req = &ci_req->req;
 677        head = ci_get_qh(0, 0); /* EP0 OUT */
 678
 679        ci_invalidate_qh(0);
 680        memcpy(&r, head->setup_data, sizeof(struct usb_ctrlrequest));
 681#ifdef CONFIG_CI_UDC_HAS_HOSTPC
 682        writel(EPT_RX(0), &udc->epsetupstat);
 683#else
 684        writel(EPT_RX(0), &udc->epstat);
 685#endif
 686        DBG("handle setup %s, %x, %x index %x value %x length %x\n",
 687            reqname(r.bRequest), r.bRequestType, r.bRequest, r.wIndex,
 688            r.wValue, r.wLength);
 689
 690        /* Set EP0 dir for Data Stage based on Setup Stage data */
 691        if (r.bRequestType & USB_DIR_IN) {
 692                DBG("%s: Set ep0 to IN for Data Stage\n", __func__);
 693                ep0_desc.bEndpointAddress = USB_DIR_IN;
 694        } else {
 695                DBG("%s: Set ep0 to OUT for Data Stage\n", __func__);
 696                ep0_desc.bEndpointAddress = 0;
 697        }
 698        if (r.wLength) {
 699                controller.ep0_data_phase = true;
 700        } else {
 701                /* 0 length -> no Data Stage. Flip dir for Status Stage */
 702                DBG("%s: 0 length: flip ep0 dir for Status Stage\n", __func__);
 703                flip_ep0_direction();
 704                controller.ep0_data_phase = false;
 705        }
 706
 707        list_del_init(&ci_req->queue);
 708        ci_ep->req_primed = false;
 709
 710        switch (SETUP(r.bRequestType, r.bRequest)) {
 711        case SETUP(USB_RECIP_ENDPOINT, USB_REQ_CLEAR_FEATURE):
 712                _num = r.wIndex & 15;
 713                _in = !!(r.wIndex & 0x80);
 714
 715                if ((r.wValue == 0) && (r.wLength == 0)) {
 716                        req->length = 0;
 717                        for (i = 0; i < NUM_ENDPOINTS; i++) {
 718                                struct ci_ep *ep = &controller.ep[i];
 719
 720                                if (!ep->desc)
 721                                        continue;
 722                                num = ep->desc->bEndpointAddress
 723                                                & USB_ENDPOINT_NUMBER_MASK;
 724                                in = (ep->desc->bEndpointAddress
 725                                                & USB_DIR_IN) != 0;
 726                                if ((num == _num) && (in == _in)) {
 727                                        ep_enable(num, in, ep->ep.maxpacket);
 728                                        usb_ep_queue(controller.gadget.ep0,
 729                                                        req, 0);
 730                                        break;
 731                                }
 732                        }
 733                }
 734                return;
 735
 736        case SETUP(USB_RECIP_DEVICE, USB_REQ_SET_ADDRESS):
 737                /*
 738                 * write address delayed (will take effect
 739                 * after the next IN txn)
 740                 */
 741                writel((r.wValue << 25) | (1 << 24), &udc->devaddr);
 742                req->length = 0;
 743                usb_ep_queue(controller.gadget.ep0, req, 0);
 744                return;
 745
 746        case SETUP(USB_DIR_IN | USB_RECIP_DEVICE, USB_REQ_GET_STATUS):
 747                req->length = 2;
 748                buf = (char *)req->buf;
 749                buf[0] = 1 << USB_DEVICE_SELF_POWERED;
 750                buf[1] = 0;
 751                usb_ep_queue(controller.gadget.ep0, req, 0);
 752                return;
 753        }
 754        /* pass request up to the gadget driver */
 755        if (controller.driver)
 756                status = controller.driver->setup(&controller.gadget, &r);
 757        else
 758                status = -ENODEV;
 759
 760        if (!status)
 761                return;
 762        DBG("STALL reqname %s type %x value %x, index %x\n",
 763            reqname(r.bRequest), r.bRequestType, r.wValue, r.wIndex);
 764        writel((1<<16) | (1 << 0), &udc->epctrl[0]);
 765}
 766
 767static void stop_activity(void)
 768{
 769        int i, num, in;
 770        struct ept_queue_head *head;
 771        struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
 772        writel(readl(&udc->epcomp), &udc->epcomp);
 773#ifdef CONFIG_CI_UDC_HAS_HOSTPC
 774        writel(readl(&udc->epsetupstat), &udc->epsetupstat);
 775#endif
 776        writel(readl(&udc->epstat), &udc->epstat);
 777        writel(0xffffffff, &udc->epflush);
 778
 779        /* error out any pending reqs */
 780        for (i = 0; i < NUM_ENDPOINTS; i++) {
 781                if (i != 0)
 782                        writel(0, &udc->epctrl[i]);
 783                if (controller.ep[i].desc) {
 784                        num = controller.ep[i].desc->bEndpointAddress
 785                                & USB_ENDPOINT_NUMBER_MASK;
 786                        in = (controller.ep[i].desc->bEndpointAddress
 787                                & USB_DIR_IN) != 0;
 788                        head = ci_get_qh(num, in);
 789                        head->info = INFO_ACTIVE;
 790                        ci_flush_qh(num);
 791                }
 792        }
 793}
 794
 795void udc_irq(void)
 796{
 797        struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
 798        unsigned n = readl(&udc->usbsts);
 799        writel(n, &udc->usbsts);
 800        int bit, i, num, in;
 801
 802        n &= (STS_SLI | STS_URI | STS_PCI | STS_UI | STS_UEI);
 803        if (n == 0)
 804                return;
 805
 806        if (n & STS_URI) {
 807                DBG("-- reset --\n");
 808                stop_activity();
 809        }
 810        if (n & STS_SLI)
 811                DBG("-- suspend --\n");
 812
 813        if (n & STS_PCI) {
 814                int max = 64;
 815                int speed = USB_SPEED_FULL;
 816
 817#ifdef CONFIG_CI_UDC_HAS_HOSTPC
 818                bit = (readl(&udc->hostpc1_devlc) >> 25) & 3;
 819#else
 820                bit = (readl(&udc->portsc) >> 26) & 3;
 821#endif
 822                DBG("-- portchange %x %s\n", bit, (bit == 2) ? "High" : "Full");
 823                if (bit == 2) {
 824                        speed = USB_SPEED_HIGH;
 825                        max = 512;
 826                }
 827                controller.gadget.speed = speed;
 828                for (i = 1; i < NUM_ENDPOINTS; i++) {
 829                        if (controller.ep[i].ep.maxpacket > max)
 830                                controller.ep[i].ep.maxpacket = max;
 831                }
 832        }
 833
 834        if (n & STS_UEI)
 835                printf("<UEI %x>\n", readl(&udc->epcomp));
 836
 837        if ((n & STS_UI) || (n & STS_UEI)) {
 838#ifdef CONFIG_CI_UDC_HAS_HOSTPC
 839                n = readl(&udc->epsetupstat);
 840#else
 841                n = readl(&udc->epstat);
 842#endif
 843                if (n & EPT_RX(0))
 844                        handle_setup();
 845
 846                n = readl(&udc->epcomp);
 847                if (n != 0)
 848                        writel(n, &udc->epcomp);
 849
 850                for (i = 0; i < NUM_ENDPOINTS && n; i++) {
 851                        if (controller.ep[i].desc) {
 852                                num = controller.ep[i].desc->bEndpointAddress
 853                                        & USB_ENDPOINT_NUMBER_MASK;
 854                                in = (controller.ep[i].desc->bEndpointAddress
 855                                                & USB_DIR_IN) != 0;
 856                                bit = (in) ? EPT_TX(num) : EPT_RX(num);
 857                                if (n & bit)
 858                                        handle_ep_complete(&controller.ep[i]);
 859                        }
 860                }
 861        }
 862}
 863
 864int usb_gadget_handle_interrupts(int index)
 865{
 866        u32 value;
 867        struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
 868
 869        value = readl(&udc->usbsts);
 870        if (value)
 871                udc_irq();
 872
 873        return value;
 874}
 875
 876void udc_disconnect(void)
 877{
 878        struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
 879        /* disable pullup */
 880        stop_activity();
 881        writel(USBCMD_FS2, &udc->usbcmd);
 882        udelay(800);
 883        if (controller.driver)
 884                controller.driver->disconnect(&controller.gadget);
 885}
 886
 887static int ci_pullup(struct usb_gadget *gadget, int is_on)
 888{
 889        struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
 890        if (is_on) {
 891                /* RESET */
 892                writel(USBCMD_ITC(MICRO_8FRAME) | USBCMD_RST, &udc->usbcmd);
 893                udelay(200);
 894
 895                ci_init_after_reset(controller.ctrl);
 896
 897                writel((unsigned long)controller.epts, &udc->epinitaddr);
 898
 899                /* select DEVICE mode */
 900                writel(USBMODE_DEVICE, &udc->usbmode);
 901
 902#if !defined(CONFIG_USB_GADGET_DUALSPEED)
 903                /* Port force Full-Speed Connect */
 904                setbits_le32(&udc->portsc, PFSC);
 905#endif
 906
 907                writel(0xffffffff, &udc->epflush);
 908
 909                /* Turn on the USB connection by enabling the pullup resistor */
 910                setbits_le32(&udc->usbcmd, USBCMD_ITC(MICRO_8FRAME) |
 911                             USBCMD_RUN);
 912        } else {
 913                udc_disconnect();
 914        }
 915
 916        return 0;
 917}
 918
 919static int ci_udc_probe(void)
 920{
 921        struct ept_queue_head *head;
 922        int i;
 923
 924        const int num = 2 * NUM_ENDPOINTS;
 925
 926        const int eplist_min_align = 4096;
 927        const int eplist_align = roundup(eplist_min_align, ARCH_DMA_MINALIGN);
 928        const int eplist_raw_sz = num * sizeof(struct ept_queue_head);
 929        const int eplist_sz = roundup(eplist_raw_sz, ARCH_DMA_MINALIGN);
 930
 931        /* The QH list must be aligned to 4096 bytes. */
 932        controller.epts = memalign(eplist_align, eplist_sz);
 933        if (!controller.epts)
 934                return -ENOMEM;
 935        memset(controller.epts, 0, eplist_sz);
 936
 937        controller.items_mem = memalign(ILIST_ALIGN, ILIST_SZ);
 938        if (!controller.items_mem) {
 939                free(controller.epts);
 940                return -ENOMEM;
 941        }
 942        memset(controller.items_mem, 0, ILIST_SZ);
 943
 944        for (i = 0; i < 2 * NUM_ENDPOINTS; i++) {
 945                /*
 946                 * Configure QH for each endpoint. The structure of the QH list
 947                 * is such that each two subsequent fields, N and N+1 where N is
 948                 * even, in the QH list represent QH for one endpoint. The Nth
 949                 * entry represents OUT configuration and the N+1th entry does
 950                 * represent IN configuration of the endpoint.
 951                 */
 952                head = controller.epts + i;
 953                if (i < 2)
 954                        head->config = CONFIG_MAX_PKT(EP0_MAX_PACKET_SIZE)
 955                                | CONFIG_ZLT | CONFIG_IOS;
 956                else
 957                        head->config = CONFIG_MAX_PKT(EP_MAX_PACKET_SIZE)
 958                                | CONFIG_ZLT;
 959                head->next = TERMINATE;
 960                head->info = 0;
 961
 962                if (i & 1) {
 963                        ci_flush_qh(i / 2);
 964                        ci_flush_qtd(i / 2);
 965                }
 966        }
 967
 968        INIT_LIST_HEAD(&controller.gadget.ep_list);
 969
 970        /* Init EP 0 */
 971        memcpy(&controller.ep[0].ep, &ci_ep_init[0], sizeof(*ci_ep_init));
 972        controller.ep[0].desc = &ep0_desc;
 973        INIT_LIST_HEAD(&controller.ep[0].queue);
 974        controller.ep[0].req_primed = false;
 975        controller.gadget.ep0 = &controller.ep[0].ep;
 976        INIT_LIST_HEAD(&controller.gadget.ep0->ep_list);
 977
 978        /* Init EP 1..3 */
 979        for (i = 1; i < 4; i++) {
 980                memcpy(&controller.ep[i].ep, &ci_ep_init[i],
 981                       sizeof(*ci_ep_init));
 982                INIT_LIST_HEAD(&controller.ep[i].queue);
 983                controller.ep[i].req_primed = false;
 984                list_add_tail(&controller.ep[i].ep.ep_list,
 985                              &controller.gadget.ep_list);
 986        }
 987
 988        /* Init EP 4..n */
 989        for (i = 4; i < NUM_ENDPOINTS; i++) {
 990                memcpy(&controller.ep[i].ep, &ci_ep_init[4],
 991                       sizeof(*ci_ep_init));
 992                INIT_LIST_HEAD(&controller.ep[i].queue);
 993                controller.ep[i].req_primed = false;
 994                list_add_tail(&controller.ep[i].ep.ep_list,
 995                              &controller.gadget.ep_list);
 996        }
 997
 998        ci_ep_alloc_request(&controller.ep[0].ep, 0);
 999        if (!controller.ep0_req) {
1000                free(controller.items_mem);
1001                free(controller.epts);
1002                return -ENOMEM;
1003        }
1004
1005        return 0;
1006}
1007
1008int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1009{
1010        int ret;
1011
1012        if (!driver)
1013                return -EINVAL;
1014        if (!driver->bind || !driver->setup || !driver->disconnect)
1015                return -EINVAL;
1016        if (driver->speed != USB_SPEED_FULL && driver->speed != USB_SPEED_HIGH)
1017                return -EINVAL;
1018
1019#if CONFIG_IS_ENABLED(DM_USB)
1020        ret = usb_setup_ehci_gadget(&controller.ctrl);
1021#else
1022        ret = usb_lowlevel_init(0, USB_INIT_DEVICE, (void **)&controller.ctrl);
1023#endif
1024        if (ret)
1025                return ret;
1026
1027        ret = ci_udc_probe();
1028        if (ret) {
1029                DBG("udc probe failed, returned %d\n", ret);
1030                return ret;
1031        }
1032
1033        ret = driver->bind(&controller.gadget);
1034        if (ret) {
1035                DBG("driver->bind() returned %d\n", ret);
1036                return ret;
1037        }
1038        controller.driver = driver;
1039
1040        return 0;
1041}
1042
1043int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1044{
1045        udc_disconnect();
1046
1047        driver->unbind(&controller.gadget);
1048        controller.driver = NULL;
1049
1050        ci_ep_free_request(&controller.ep[0].ep, &controller.ep0_req->req);
1051        free(controller.items_mem);
1052        free(controller.epts);
1053
1054        return 0;
1055}
1056
1057bool dfu_usb_get_reset(void)
1058{
1059        struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
1060
1061        return !!(readl(&udc->usbsts) & STS_URI);
1062}
1063