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9#ifndef __CONFIG_H
10#define __CONFIG_H
11
12#define CONFIG_SYS_SRIO
13#define CONFIG_SRIO1
14
15#define CONFIG_PCI1 1
16#define CONFIG_PCIE1 1
17#define CONFIG_FSL_PCI_INIT 1
18#define CONFIG_PCI_INDIRECT_BRIDGE 1
19#define CONFIG_SYS_PCI_64BIT 1
20#define CONFIG_ENV_OVERWRITE
21
22#ifndef __ASSEMBLY__
23extern unsigned long get_clock_freq(void);
24#endif
25#define CONFIG_SYS_CLK_FREQ 66000000
26
27
28
29
30#define CONFIG_L2_CACHE
31#define CONFIG_BTB
32
33
34
35
36#define CONFIG_ENABLE_36BIT_PHYS 1
37
38#define CONFIG_SYS_MEMTEST_START 0x00200000
39#define CONFIG_SYS_MEMTEST_END 0x00400000
40
41#define CONFIG_SYS_CCSRBAR 0xe0000000
42#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
43
44
45#define CONFIG_SPD_EEPROM
46#define CONFIG_DDR_SPD
47#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
48
49#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
50
51#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
52#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
53
54#define CONFIG_DIMM_SLOTS_PER_CTLR 1
55#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
56
57
58#define SPD_EEPROM_ADDRESS 0x51
59
60
61#ifndef CONFIG_SPD_EEPROM
62#error ("CONFIG_SPD_EEPROM is required")
63#endif
64
65#undef CONFIG_CLOCKS_IN_MHZ
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100#define CONFIG_SYS_BCSR_BASE 0xf8000000
101
102#define CONFIG_SYS_FLASH_BASE 0xfe000000
103
104
105#define CONFIG_SYS_BR0_PRELIM 0xfe001001
106#define CONFIG_SYS_OR0_PRELIM 0xfe006ff7
107
108
109#define CONFIG_SYS_BR1_PRELIM 0xf8000801
110#define CONFIG_SYS_OR1_PRELIM 0xffffe9f7
111
112
113#define CONFIG_SYS_MAX_FLASH_BANKS 1
114#define CONFIG_SYS_MAX_FLASH_SECT 512
115#undef CONFIG_SYS_FLASH_CHECKSUM
116#define CONFIG_SYS_FLASH_ERASE_TOUT 60000
117#define CONFIG_SYS_FLASH_WRITE_TOUT 500
118
119#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
120
121#define CONFIG_SYS_FLASH_EMPTY_INFO
122
123
124
125
126#define CONFIG_SYS_LBC_SDRAM_BASE 0xf0000000
127#define CONFIG_SYS_LBC_SDRAM_SIZE 64
128
129
130#define CONFIG_SYS_BR2_PRELIM 0xf0001861
131#define CONFIG_SYS_OR2_PRELIM 0xfc006901
132
133#define CONFIG_SYS_LBC_LCRR 0x00030004
134#define CONFIG_SYS_LBC_LBCR 0x00000000
135#define CONFIG_SYS_LBC_LSRT 0x20000000
136#define CONFIG_SYS_LBC_MRTPR 0x00000000
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143
144#define CONFIG_SYS_LBC_LSDMR_COMMON ( LSDMR_RFCR16 \
145 | LSDMR_PRETOACT7 \
146 | LSDMR_ACTTORW7 \
147 | LSDMR_BL8 \
148 | LSDMR_WRC4 \
149 | LSDMR_CL3 \
150 | LSDMR_RFEN \
151 )
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181
182#define CONFIG_SYS_BCSR (0xf8000000)
183
184
185#define CONFIG_SYS_BR4_PRELIM 0xf8008801
186#define CONFIG_SYS_OR4_PRELIM 0xffffe9f7
187
188
189#define CONFIG_SYS_BR5_PRELIM 0xf8010801
190#define CONFIG_SYS_OR5_PRELIM 0xffff69f7
191
192#define CONFIG_SYS_INIT_RAM_LOCK 1
193#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000
194#define CONFIG_SYS_INIT_RAM_SIZE 0x4000
195
196#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
197#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
198
199#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
200#define CONFIG_SYS_MALLOC_LEN (512 * 1024)
201
202
203#define CONFIG_SYS_NS16550_SERIAL
204#define CONFIG_SYS_NS16550_REG_SIZE 1
205#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
206
207#define CONFIG_SYS_BAUDRATE_TABLE \
208 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
209
210#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
211#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
212
213
214
215
216#define CONFIG_SYS_I2C
217#define CONFIG_SYS_I2C_FSL
218#define CONFIG_SYS_FSL_I2C_SPEED 400000
219#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
220#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
221#define CONFIG_SYS_FSL_I2C2_SPEED 400000
222#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
223#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100
224#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }
225#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52
226
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230
231#define CONFIG_SYS_PCI1_MEM_VIRT 0x80000000
232#define CONFIG_SYS_PCI1_MEM_BUS 0x80000000
233#define CONFIG_SYS_PCI1_MEM_PHYS 0x80000000
234#define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000
235#define CONFIG_SYS_PCI1_IO_VIRT 0xe2000000
236#define CONFIG_SYS_PCI1_IO_BUS 0x00000000
237#define CONFIG_SYS_PCI1_IO_PHYS 0xe2000000
238#define CONFIG_SYS_PCI1_IO_SIZE 0x00800000
239
240#define CONFIG_SYS_PCIE1_NAME "Slot"
241#define CONFIG_SYS_PCIE1_MEM_VIRT 0xa0000000
242#define CONFIG_SYS_PCIE1_MEM_BUS 0xa0000000
243#define CONFIG_SYS_PCIE1_MEM_PHYS 0xa0000000
244#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000
245#define CONFIG_SYS_PCIE1_IO_VIRT 0xe2800000
246#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000
247#define CONFIG_SYS_PCIE1_IO_PHYS 0xe2800000
248#define CONFIG_SYS_PCIE1_IO_SIZE 0x00800000
249
250#define CONFIG_SYS_SRIO1_MEM_VIRT 0xC0000000
251#define CONFIG_SYS_SRIO1_MEM_BUS 0xC0000000
252#define CONFIG_SYS_SRIO1_MEM_PHYS CONFIG_SYS_SRIO1_MEM_BUS
253#define CONFIG_SYS_SRIO1_MEM_SIZE 0x20000000
254
255#ifdef CONFIG_QE
256
257
258
259#define CONFIG_UEC_ETH
260#ifndef CONFIG_TSEC_ENET
261#define CONFIG_ETHPRIME "UEC0"
262#endif
263#define CONFIG_PHY_MODE_NEED_CHANGE
264#define CONFIG_eTSEC_MDIO_BUS
265
266#ifdef CONFIG_eTSEC_MDIO_BUS
267#define CONFIG_MIIM_ADDRESS 0xE0024520
268#endif
269
270#define CONFIG_UEC_ETH1
271
272#ifdef CONFIG_UEC_ETH1
273#define CONFIG_SYS_UEC1_UCC_NUM 0
274#define CONFIG_SYS_UEC1_RX_CLK QE_CLK_NONE
275#define CONFIG_SYS_UEC1_TX_CLK QE_CLK16
276#define CONFIG_SYS_UEC1_ETH_TYPE GIGA_ETH
277#define CONFIG_SYS_UEC1_PHY_ADDR 7
278#define CONFIG_SYS_UEC1_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII_ID
279#define CONFIG_SYS_UEC1_INTERFACE_SPEED 1000
280#endif
281
282#define CONFIG_UEC_ETH2
283
284#ifdef CONFIG_UEC_ETH2
285#define CONFIG_SYS_UEC2_UCC_NUM 1
286#define CONFIG_SYS_UEC2_RX_CLK QE_CLK_NONE
287#define CONFIG_SYS_UEC2_TX_CLK QE_CLK16
288#define CONFIG_SYS_UEC2_ETH_TYPE GIGA_ETH
289#define CONFIG_SYS_UEC2_PHY_ADDR 1
290#define CONFIG_SYS_UEC2_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII_ID
291#define CONFIG_SYS_UEC2_INTERFACE_SPEED 1000
292#endif
293#endif
294
295#if defined(CONFIG_PCI)
296#undef CONFIG_EEPRO100
297#undef CONFIG_TULIP
298
299#undef CONFIG_PCI_SCAN_SHOW
300#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1057
301
302#endif
303
304#if defined(CONFIG_TSEC_ENET)
305
306#define CONFIG_TSEC1 1
307#define CONFIG_TSEC1_NAME "eTSEC0"
308#define CONFIG_TSEC2 1
309#define CONFIG_TSEC2_NAME "eTSEC1"
310
311#define TSEC1_PHY_ADDR 2
312#define TSEC2_PHY_ADDR 3
313
314#define TSEC1_PHYIDX 0
315#define TSEC2_PHYIDX 0
316
317#define TSEC1_FLAGS TSEC_GIGABIT
318#define TSEC2_FLAGS TSEC_GIGABIT
319
320
321#define CONFIG_ETHPRIME "eTSEC0"
322
323#endif
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329#define CONFIG_LOADS_ECHO 1
330#define CONFIG_SYS_LOADS_BAUD_CHANGE 1
331
332
333
334
335#define CONFIG_BOOTP_BOOTFILESIZE
336
337#undef CONFIG_WATCHDOG
338
339
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341
342#define CONFIG_SYS_LOAD_ADDR 0x2000000
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348
349#define CONFIG_SYS_BOOTMAPSZ (64 << 20)
350#define CONFIG_SYS_BOOTM_LEN (64 << 20)
351
352#if defined(CONFIG_CMD_KGDB)
353#define CONFIG_KGDB_BAUDRATE 230400
354#endif
355
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360
361#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_UEC_ETH)
362#define CONFIG_HAS_ETH0
363#define CONFIG_HAS_ETH1
364#define CONFIG_HAS_ETH2
365#define CONFIG_HAS_ETH3
366#endif
367
368#define CONFIG_IPADDR 192.168.1.253
369
370#define CONFIG_HOSTNAME "unknown"
371#define CONFIG_ROOTPATH "/nfsroot"
372#define CONFIG_BOOTFILE "your.uImage"
373
374#define CONFIG_SERVERIP 192.168.1.1
375#define CONFIG_GATEWAYIP 192.168.1.1
376#define CONFIG_NETMASK 255.255.255.0
377
378#define CONFIG_LOADADDR 200000
379
380#define CONFIG_EXTRA_ENV_SETTINGS \
381 "netdev=eth0\0" \
382 "consoledev=ttyS0\0" \
383 "ramdiskaddr=600000\0" \
384 "ramdiskfile=your.ramdisk.u-boot\0" \
385 "fdtaddr=400000\0" \
386 "fdtfile=your.fdt.dtb\0" \
387 "nfsargs=setenv bootargs root=/dev/nfs rw " \
388 "nfsroot=$serverip:$rootpath " \
389 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
390 "console=$consoledev,$baudrate $othbootargs\0" \
391 "ramargs=setenv bootargs root=/dev/ram rw " \
392 "console=$consoledev,$baudrate $othbootargs\0" \
393
394#define CONFIG_NFSBOOTCOMMAND \
395 "run nfsargs;" \
396 "tftp $loadaddr $bootfile;" \
397 "tftp $fdtaddr $fdtfile;" \
398 "bootm $loadaddr - $fdtaddr"
399
400#define CONFIG_RAMBOOTCOMMAND \
401 "run ramargs;" \
402 "tftp $ramdiskaddr $ramdiskfile;" \
403 "tftp $loadaddr $bootfile;" \
404 "bootm $loadaddr $ramdiskaddr"
405
406#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
407
408#endif
409