LXR uboot/arch/arm/cpu/armv7/sunxi/timer.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * (C) Copyright 2007-2011
   4 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
   5 * Tom Cubie <tangliang@allwinnertech.com>
   6 */
   7
   8#include <common.h>
   9#include <init.h>
  10#include <time.h>
  11#include <asm/io.h>
  12#include <asm/arch/timer.h>
  13#include <linux/delay.h>
  14
  15DECLARE_GLOBAL_DATA_PTR;
  16
  17#define TIMER_MODE   (0x0 << 7) /* continuous mode */
  18#define TIMER_DIV    (0x0 << 4) /* pre scale 1 */
  19#define TIMER_SRC    (0x1 << 2) /* osc24m */
  20#define TIMER_RELOAD (0x1 << 1) /* reload internal value */
  21#define TIMER_EN     (0x1 << 0) /* enable timer */
  22
  23#define TIMER_CLOCK             (24 * 1000 * 1000)
  24#define COUNT_TO_USEC(x)        ((x) / 24)
  25#define USEC_TO_COUNT(x)        ((x) * 24)
  26#define TICKS_PER_HZ            (TIMER_CLOCK / CONFIG_SYS_HZ)
  27#define TICKS_TO_HZ(x)          ((x) / TICKS_PER_HZ)
  28
  29#define TIMER_LOAD_VAL          0xffffffff
  30
  31#define TIMER_NUM               0       /* we use timer 0 */
  32
  33/* read the 32-bit timer */
  34static ulong read_timer(void)
  35{
  36        struct sunxi_timer_reg *timers =
  37                (struct sunxi_timer_reg *)SUNXI_TIMER_BASE;
  38        struct sunxi_timer *timer = &timers->timer[TIMER_NUM];
  39
  40        /*
  41         * The hardware timer counts down, therefore we invert to
  42         * produce an incrementing timer.
  43         */
  44        return ~readl(&timer->val);
  45}
  46
  47/* init timer register */
  48int timer_init(void)
  49{
  50        struct sunxi_timer_reg *timers =
  51                (struct sunxi_timer_reg *)SUNXI_TIMER_BASE;
  52        struct sunxi_timer *timer = &timers->timer[TIMER_NUM];
  53        writel(TIMER_LOAD_VAL, &timer->inter);
  54        writel(TIMER_MODE | TIMER_DIV | TIMER_SRC | TIMER_RELOAD | TIMER_EN,
  55               &timer->ctl);
  56
  57        return 0;
  58}
  59
  60/* timer without interrupts */
  61static ulong get_timer_masked(void)
  62{
  63        /* current tick value */
  64        ulong now = TICKS_TO_HZ(read_timer());
  65
  66        if (now >= gd->arch.lastinc)    /* normal (non rollover) */
  67                gd->arch.tbl += (now - gd->arch.lastinc);
  68        else {
  69                /* rollover */
  70                gd->arch.tbl += (TICKS_TO_HZ(TIMER_LOAD_VAL)
  71                                - gd->arch.lastinc) + now;
  72        }
  73        gd->arch.lastinc = now;
  74
  75        return gd->arch.tbl;
  76}
  77
  78ulong get_timer(ulong base)
  79{
  80        return get_timer_masked() - base;
  81}
  82
  83/* delay x useconds */
  84void __udelay(unsigned long usec)
  85{
  86        long tmo = USEC_TO_COUNT(usec);
  87        ulong now, last = read_timer();
  88
  89        while (tmo > 0) {
  90                now = read_timer();
  91                if (now > last) /* normal (non rollover) */
  92                        tmo -= now - last;
  93                else            /* rollover */
  94                        tmo -= TIMER_LOAD_VAL - last + now;
  95                last = now;
  96        }
  97}
  98
  99/*
 100 * This function is derived from PowerPC code (read timebase as long long).
 101 * On ARM it just returns the timer value.
 102 */
 103unsigned long long get_ticks(void)
 104{
 105        return get_timer(0);
 106}
 107
 108/*
 109 * This function is derived from PowerPC code (timebase clock frequency).
 110 * On ARM it returns the number of timer ticks per second.
 111 */
 112ulong get_tbclk(void)
 113{
 114        return CONFIG_SYS_HZ;
 115}
 116