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15#ifndef __CONFIG_H
16#define __CONFIG_H
17
18#define CONFIG_MACH_TYPE MACH_TYPE_TRICORDER
19
20
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22
23
24
25
26#include <asm/arch/cpu.h>
27#include <asm/arch/omap.h>
28
29
30#define V_OSCK 26000000
31#define V_SCLK (V_OSCK >> 1)
32
33#define CONFIG_CMDLINE_TAG
34#define CONFIG_SETUP_MEMORY_TAGS
35#define CONFIG_INITRD_TAG
36#define CONFIG_REVISION_TAG
37
38
39#define CONFIG_SYS_MALLOC_LEN (1024*1024)
40
41
42
43
44#define CONFIG_SYS_NS16550_SERIAL
45#define CONFIG_SYS_NS16550_REG_SIZE (-4)
46#define CONFIG_SYS_NS16550_CLK 48000000
47
48
49#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
50#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
51 115200}
52
53
54#define CONFIG_SYS_I2C
55
56
57
58#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
59#define CONFIG_SYS_EEPROM_BUS_NUM 1
60
61
62
63
64#define CONFIG_SYS_NAND_BASE NAND_BASE
65
66
67#define CONFIG_SYS_MAX_NAND_DEVICE 1
68
69#define CONFIG_SYS_NAND_MAX_OOBFREE 2
70#define CONFIG_SYS_NAND_MAX_ECCPOS 56
71
72
73
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75
76
77
78
79
80
81#define CONFIG_ENV_RANGE (384 << 10)
82
83
84
85#define CONFIG_LOADADDR 0x82000000
86
87#define CONFIG_COMMON_ENV_SETTINGS \
88 "console=ttyO2,115200n8\0" \
89 "mmcdev=0\0" \
90 "vram=3M\0" \
91 "defaultdisplay=lcd\0" \
92 "kernelopts=mtdoops.mtddev=3\0" \
93 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
94 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
95 "commonargs=" \
96 "setenv bootargs console=${console} " \
97 "${mtdparts} " \
98 "${kernelopts} " \
99 "vt.global_cursor_default=0 " \
100 "vram=${vram} " \
101 "omapdss.def_disp=${defaultdisplay}\0"
102
103#define CONFIG_BOOTCOMMAND "run autoboot"
104
105
106
107
108
109
110
111
112#ifdef CONFIG_FLASHCARD
113
114#define CONFIG_ENV_RDADDR "rdaddr=0x81000000\0"
115
116#define CONFIG_EXTRA_ENV_SETTINGS \
117 CONFIG_COMMON_ENV_SETTINGS \
118 CONFIG_ENV_RDADDR \
119 "autoboot=" \
120 "run commonargs; " \
121 "setenv bootargs ${bootargs} " \
122 "flashy_updateimg=/dev/mmcblk0p1:corscience_update.img " \
123 "rdinit=/sbin/init; " \
124 "mmc dev ${mmcdev}; mmc rescan; " \
125 "fatload mmc ${mmcdev} ${loadaddr} uImage; " \
126 "fatload mmc ${mmcdev} ${rdaddr} uRamdisk; " \
127 "bootm ${loadaddr} ${rdaddr}\0"
128
129#else
130#define CONFIG_EXTRA_ENV_SETTINGS \
131 CONFIG_COMMON_ENV_SETTINGS \
132 "mmcargs=" \
133 "run commonargs; " \
134 "setenv bootargs ${bootargs} " \
135 "root=/dev/mmcblk0p2 " \
136 "rootwait " \
137 "rw\0" \
138 "nandargs=" \
139 "run commonargs; " \
140 "setenv bootargs ${bootargs} " \
141 "root=ubi0:root " \
142 "ubi.mtd=7 " \
143 "rootfstype=ubifs " \
144 "ro\0" \
145 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
146 "bootscript=echo Running bootscript from mmc ...; " \
147 "source ${loadaddr}\0" \
148 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
149 "mmcboot=echo Booting from mmc ...; " \
150 "run mmcargs; " \
151 "bootm ${loadaddr}\0" \
152 "loaduimage_ubi=ubi part ubi; " \
153 "ubifsmount ubi:root; " \
154 "ubifsload ${loadaddr} /boot/uImage\0" \
155 "loaduimage_nand=nand read ${loadaddr} kernel 0x500000\0" \
156 "nandboot=echo Booting from nand ...; " \
157 "run nandargs; " \
158 "run loaduimage_nand; " \
159 "bootm ${loadaddr}\0" \
160 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
161 "if run loadbootscript; then " \
162 "run bootscript; " \
163 "else " \
164 "if run loaduimage; then " \
165 "run mmcboot; " \
166 "else run nandboot; " \
167 "fi; " \
168 "fi; " \
169 "else run nandboot; fi\0"
170
171#endif
172
173
174#define CONFIG_SYS_CBSIZE 512
175
176#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000)
177
178
179
180
181
182
183#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
184#define CONFIG_SYS_PTV 2
185
186
187#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
188#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
189
190
191#define CONFIG_SYS_MONITOR_LEN (256 << 10)
192
193#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
194#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
195#define CONFIG_SYS_INIT_RAM_SIZE 0x800
196#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
197 CONFIG_SYS_INIT_RAM_SIZE - \
198 GENERATED_GBL_DATA_SIZE)
199
200
201
202#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
203
204#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
205 CONFIG_SPL_TEXT_BASE)
206
207#define CONFIG_SPL_BSS_START_ADDR 0x80000000
208#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
209
210
211#define CONFIG_SYS_NAND_5_ADDR_CYCLE
212#define CONFIG_SYS_NAND_PAGE_COUNT 64
213#define CONFIG_SYS_NAND_PAGE_SIZE 2048
214#define CONFIG_SYS_NAND_OOBSIZE 64
215#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
216#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
217#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
218 13, 14, 16, 17, 18, 19, 20, 21, 22, \
219 23, 24, 25, 26, 27, 28, 30, 31, 32, \
220 33, 34, 35, 36, 37, 38, 39, 40, 41, \
221 42, 44, 45, 46, 47, 48, 49, 50, 51, \
222 52, 53, 54, 55, 56}
223
224#define CONFIG_SYS_NAND_ECCSIZE 512
225#define CONFIG_SYS_NAND_ECCBYTES 13
226#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
227
228#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
229
230#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
231#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x100000
232
233#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
234#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
235
236#endif
237