uboot/arch/arm/cpu/armv7/bcm281xx/reset.c
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   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright 2013 Broadcom Corporation.
   4 */
   5
   6#include <common.h>
   7#include <cpu_func.h>
   8#include <asm/io.h>
   9#include <asm/arch/sysmap.h>
  10
  11#define EN_MASK         0x08000000      /* Enable timer */
  12#define SRSTEN_MASK     0x04000000      /* Enable soft reset */
  13#define CLKS_SHIFT      20              /* Clock period shift */
  14#define LD_SHIFT        0               /* Reload value shift */
  15
  16void reset_cpu(void)
  17{
  18        /*
  19         * Set WD enable, RST enable,
  20         * 3.9 msec clock period (8), reload value (8*3.9ms)
  21         */
  22        u32 reg = EN_MASK + SRSTEN_MASK + (8 << CLKS_SHIFT) + (8 << LD_SHIFT);
  23        writel(reg, SECWD2_BASE_ADDR);
  24
  25        while (1)
  26                ;       /* loop forever till reset */
  27}
  28