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7#include <common.h>
8#include <clock_legacy.h>
9#include <efi_loader.h>
10#include <log.h>
11#include <asm/cache.h>
12#include <linux/libfdt.h>
13#include <fdt_support.h>
14#include <phy.h>
15#ifdef CONFIG_FSL_LSCH3
16#include <asm/arch/fdt.h>
17#endif
18#ifdef CONFIG_FSL_ESDHC
19#include <fsl_esdhc.h>
20#endif
21#ifdef CONFIG_SYS_DPAA_FMAN
22#include <fsl_fman.h>
23#endif
24#ifdef CONFIG_MP
25#include <asm/arch/mp.h>
26#endif
27#include <fsl_sec.h>
28#include <asm/arch-fsl-layerscape/soc.h>
29#if CONFIG_IS_ENABLED(ARMV8_SEC_FIRMWARE_SUPPORT)
30#include <asm/armv8/sec_firmware.h>
31#endif
32#include <asm/arch/speed.h>
33#include <fsl_qbman.h>
34
35int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)
36{
37 const char *conn;
38
39
40 if (phyc == PHY_INTERFACE_MODE_XGMII) {
41 conn = fdt_getprop(blob, offset, "phy-connection-type", NULL);
42 if (is_backplane_mode(conn))
43 return 0;
44 }
45 return fdt_setprop_string(blob, offset, "phy-connection-type",
46 phy_string_for_interface(phyc));
47}
48
49#ifdef CONFIG_MP
50void ft_fixup_cpu(void *blob)
51{
52 int off;
53 __maybe_unused u64 spin_tbl_addr = (u64)get_spin_tbl_addr();
54 fdt32_t *reg;
55 int addr_cells;
56 u64 val, core_id;
57 u32 mask = cpu_pos_mask();
58 int off_prev = -1;
59
60 off = fdt_path_offset(blob, "/cpus");
61 if (off < 0) {
62 puts("couldn't find /cpus node\n");
63 return;
64 }
65
66 fdt_support_default_count_cells(blob, off, &addr_cells, NULL);
67
68 off = fdt_node_offset_by_prop_value(blob, off_prev, "device_type",
69 "cpu", 4);
70 while (off != -FDT_ERR_NOTFOUND) {
71 reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0);
72 if (reg) {
73 core_id = fdt_read_number(reg, addr_cells);
74 if (!test_bit(id_to_core(core_id), &mask)) {
75 fdt_del_node(blob, off);
76 off = off_prev;
77 }
78 }
79 off_prev = off;
80 off = fdt_node_offset_by_prop_value(blob, off_prev,
81 "device_type", "cpu", 4);
82 }
83
84#if CONFIG_IS_ENABLED(ARMV8_SEC_FIRMWARE_SUPPORT) && \
85 defined(CONFIG_SEC_FIRMWARE_ARMV8_PSCI)
86 int node;
87 u32 psci_ver;
88
89
90 psci_ver = sec_firmware_support_psci_version();
91 if (psci_ver == 0xffffffff) {
92
93 node = fdt_path_offset(blob, "/psci");
94 if (node >= 0)
95 goto remove_psci_node;
96
97 node = fdt_node_offset_by_compatible(blob, -1, "arm,psci");
98 if (node >= 0)
99 goto remove_psci_node;
100
101 node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-0.2");
102 if (node >= 0)
103 goto remove_psci_node;
104
105 node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-1.0");
106 if (node >= 0)
107 goto remove_psci_node;
108
109remove_psci_node:
110 if (node >= 0)
111 fdt_del_node(blob, node);
112 } else {
113 return;
114 }
115#endif
116 off = fdt_path_offset(blob, "/cpus");
117 if (off < 0) {
118 puts("couldn't find /cpus node\n");
119 return;
120 }
121 fdt_support_default_count_cells(blob, off, &addr_cells, NULL);
122
123 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
124 while (off != -FDT_ERR_NOTFOUND) {
125 reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0);
126 if (reg) {
127 core_id = fdt_read_number(reg, addr_cells);
128 if (core_id == 0 || (is_core_online(core_id))) {
129 val = spin_tbl_addr;
130 val += id_to_core(core_id) *
131 SPIN_TABLE_ELEM_SIZE;
132 val = cpu_to_fdt64(val);
133 fdt_setprop_string(blob, off, "enable-method",
134 "spin-table");
135 fdt_setprop(blob, off, "cpu-release-addr",
136 &val, sizeof(val));
137 } else {
138 debug("skipping offline core\n");
139 }
140 } else {
141 puts("Warning: found cpu node without reg property\n");
142 }
143 off = fdt_node_offset_by_prop_value(blob, off, "device_type",
144 "cpu", 4);
145 }
146
147 fdt_add_mem_rsv(blob, (uintptr_t)secondary_boot_code_start,
148 secondary_boot_code_size);
149#if CONFIG_IS_ENABLED(EFI_LOADER)
150 efi_add_memory_map((uintptr_t)secondary_boot_code_start,
151 secondary_boot_code_size, EFI_RESERVED_MEMORY_TYPE);
152#endif
153}
154#endif
155
156void fsl_fdt_disable_usb(void *blob)
157{
158 int off;
159
160
161
162
163
164 if (CONFIG_SYS_CLK_FREQ != 100000000) {
165 off = fdt_node_offset_by_compatible(blob, -1, "snps,dwc3");
166 while (off != -FDT_ERR_NOTFOUND) {
167 fdt_status_disabled(blob, off);
168 off = fdt_node_offset_by_compatible(blob, off,
169 "snps,dwc3");
170 }
171 }
172}
173
174#ifdef CONFIG_HAS_FEATURE_GIC64K_ALIGN
175static void fdt_fixup_gic(void *blob)
176{
177 int offset, err;
178 u64 reg[8];
179 struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
180 unsigned int val;
181 struct ccsr_scfg __iomem *scfg = (void *)CONFIG_SYS_FSL_SCFG_ADDR;
182 int align_64k = 0;
183
184 val = gur_in32(&gur->svr);
185
186 if (!IS_SVR_DEV(val, SVR_DEV(SVR_LS1043A))) {
187 align_64k = 1;
188 } else if (SVR_REV(val) != REV1_0) {
189 val = scfg_in32(&scfg->gic_align) & (0x01 << GIC_ADDR_BIT);
190 if (!val)
191 align_64k = 1;
192 }
193
194 offset = fdt_subnode_offset(blob, 0, "interrupt-controller@1400000");
195 if (offset < 0) {
196 printf("WARNING: fdt_subnode_offset can't find node %s: %s\n",
197 "interrupt-controller@1400000", fdt_strerror(offset));
198 return;
199 }
200
201
202 if (align_64k) {
203 reg[0] = cpu_to_fdt64(GICD_BASE_64K);
204 reg[1] = cpu_to_fdt64(GICD_SIZE_64K);
205 reg[2] = cpu_to_fdt64(GICC_BASE_64K);
206 reg[3] = cpu_to_fdt64(GICC_SIZE_64K);
207 reg[4] = cpu_to_fdt64(GICH_BASE_64K);
208 reg[5] = cpu_to_fdt64(GICH_SIZE_64K);
209 reg[6] = cpu_to_fdt64(GICV_BASE_64K);
210 reg[7] = cpu_to_fdt64(GICV_SIZE_64K);
211 } else {
212
213 reg[0] = cpu_to_fdt64(GICD_BASE);
214 reg[1] = cpu_to_fdt64(GICD_SIZE);
215 reg[2] = cpu_to_fdt64(GICC_BASE);
216 reg[3] = cpu_to_fdt64(GICC_SIZE);
217 reg[4] = cpu_to_fdt64(GICH_BASE);
218 reg[5] = cpu_to_fdt64(GICH_SIZE);
219 reg[6] = cpu_to_fdt64(GICV_BASE);
220 reg[7] = cpu_to_fdt64(GICV_SIZE);
221 }
222
223 err = fdt_setprop(blob, offset, "reg", reg, sizeof(reg));
224 if (err < 0) {
225 printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
226 "reg", "interrupt-controller@1400000",
227 fdt_strerror(err));
228 return;
229 }
230
231 return;
232}
233#endif
234
235#ifdef CONFIG_HAS_FEATURE_ENHANCED_MSI
236static int _fdt_fixup_msi_node(void *blob, const char *name,
237 int irq_0, int irq_1, int rev)
238{
239 int err, offset, len;
240 u32 tmp[4][3];
241 void *p;
242
243 offset = fdt_path_offset(blob, name);
244 if (offset < 0) {
245 printf("WARNING: fdt_path_offset can't find path %s: %s\n",
246 name, fdt_strerror(offset));
247 return 0;
248 }
249
250
251
252 tmp[0][0] = cpu_to_fdt32(0x0);
253 tmp[0][1] = cpu_to_fdt32(irq_0);
254 tmp[0][2] = cpu_to_fdt32(0x4);
255
256 if (rev > REV1_0) {
257 tmp[1][0] = cpu_to_fdt32(0x0);
258 tmp[1][1] = cpu_to_fdt32(irq_1);
259 tmp[1][2] = cpu_to_fdt32(0x4);
260 tmp[2][0] = cpu_to_fdt32(0x0);
261 tmp[2][1] = cpu_to_fdt32(irq_1 + 1);
262 tmp[2][2] = cpu_to_fdt32(0x4);
263 tmp[3][0] = cpu_to_fdt32(0x0);
264 tmp[3][1] = cpu_to_fdt32(irq_1 + 2);
265 tmp[3][2] = cpu_to_fdt32(0x4);
266 len = sizeof(tmp);
267 } else {
268 len = sizeof(tmp[0]);
269 }
270
271 err = fdt_setprop(blob, offset, "interrupts", tmp, len);
272 if (err < 0) {
273 printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
274 "interrupts", name, fdt_strerror(err));
275 return 0;
276 }
277
278
279 p = (char *)fdt_getprop(blob, offset, "reg", &len);
280 if (!p) {
281 printf("WARNING: fdt_getprop can't get %s from node %s\n",
282 "reg", name);
283 return 0;
284 }
285
286 memcpy((char *)tmp, p, len);
287
288 if (rev > REV1_0)
289 *((u32 *)tmp + 3) = cpu_to_fdt32(0x1000);
290 else
291 *((u32 *)tmp + 3) = cpu_to_fdt32(0x8);
292
293 err = fdt_setprop(blob, offset, "reg", tmp, len);
294 if (err < 0) {
295 printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
296 "reg", name, fdt_strerror(err));
297 return 0;
298 }
299
300
301 if (rev > REV1_0)
302 err = fdt_setprop_string(blob, offset, "compatible",
303 "fsl,ls1043a-v1.1-msi");
304 else
305 err = fdt_setprop_string(blob, offset, "compatible",
306 "fsl,ls1043a-msi");
307 if (err < 0) {
308 printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
309 "compatible", name, fdt_strerror(err));
310 return 0;
311 }
312
313 return 1;
314}
315
316static int _fdt_fixup_pci_msi(void *blob, const char *name, int rev)
317{
318 int offset, len, err;
319 void *p;
320 int val;
321 u32 tmp[4][8];
322
323 offset = fdt_path_offset(blob, name);
324 if (offset < 0) {
325 printf("WARNING: fdt_path_offset can't find path %s: %s\n",
326 name, fdt_strerror(offset));
327 return 0;
328 }
329
330 p = (char *)fdt_getprop(blob, offset, "interrupt-map", &len);
331 if (!p || len != sizeof(tmp)) {
332 printf("WARNING: fdt_getprop can't get %s from node %s\n",
333 "interrupt-map", name);
334 return 0;
335 }
336
337 memcpy((char *)tmp, p, len);
338
339 val = fdt32_to_cpu(tmp[0][6]);
340 if (rev == REV1_0) {
341 tmp[1][6] = cpu_to_fdt32(val + 1);
342 tmp[2][6] = cpu_to_fdt32(val + 2);
343 tmp[3][6] = cpu_to_fdt32(val + 3);
344 } else {
345 tmp[1][6] = cpu_to_fdt32(val);
346 tmp[2][6] = cpu_to_fdt32(val);
347 tmp[3][6] = cpu_to_fdt32(val);
348 }
349
350 err = fdt_setprop(blob, offset, "interrupt-map", tmp, sizeof(tmp));
351 if (err < 0) {
352 printf("WARNING: fdt_setprop can't set %s from node %s: %s.\n",
353 "interrupt-map", name, fdt_strerror(err));
354 return 0;
355 }
356 return 1;
357}
358
359
360
361static void fdt_fixup_msi(void *blob)
362{
363 struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
364 unsigned int rev;
365
366 rev = gur_in32(&gur->svr);
367
368 if (!IS_SVR_DEV(rev, SVR_DEV(SVR_LS1043A)))
369 return;
370
371 rev = SVR_REV(rev);
372
373 _fdt_fixup_msi_node(blob, "/soc/msi-controller1@1571000",
374 116, 111, rev);
375 _fdt_fixup_msi_node(blob, "/soc/msi-controller2@1572000",
376 126, 121, rev);
377 _fdt_fixup_msi_node(blob, "/soc/msi-controller3@1573000",
378 160, 155, rev);
379
380 _fdt_fixup_pci_msi(blob, "/soc/pcie@3400000", rev);
381 _fdt_fixup_pci_msi(blob, "/soc/pcie@3500000", rev);
382 _fdt_fixup_pci_msi(blob, "/soc/pcie@3600000", rev);
383}
384#endif
385
386#if CONFIG_IS_ENABLED(ARMV8_SEC_FIRMWARE_SUPPORT)
387
388void fdt_fixup_remove_jr(void *blob)
389{
390 int jr_node, addr_cells, len;
391 int crypto_node = fdt_path_offset(blob, "crypto");
392 u64 jr_offset, used_jr;
393 fdt32_t *reg;
394
395 used_jr = sec_firmware_used_jobring_offset();
396 fdt_support_default_count_cells(blob, crypto_node, &addr_cells, NULL);
397
398 jr_node = fdt_node_offset_by_compatible(blob, crypto_node,
399 "fsl,sec-v4.0-job-ring");
400
401 while (jr_node != -FDT_ERR_NOTFOUND) {
402 reg = (fdt32_t *)fdt_getprop(blob, jr_node, "reg", &len);
403 if (reg) {
404 jr_offset = fdt_read_number(reg, addr_cells);
405 if (jr_offset == used_jr) {
406 fdt_del_node(blob, jr_node);
407 break;
408 }
409 }
410 jr_node = fdt_node_offset_by_compatible(blob, jr_node,
411 "fsl,sec-v4.0-job-ring");
412 }
413}
414#endif
415
416#ifdef CONFIG_ARCH_LS1028A
417static void fdt_disable_multimedia(void *blob, unsigned int svr)
418{
419 int off;
420
421 if (IS_MULTIMEDIA_EN(svr))
422 return;
423
424
425 off = fdt_node_offset_by_compatible(blob, -1, "arm,mali-dp500");
426 if (off != -FDT_ERR_NOTFOUND)
427 fdt_status_disabled(blob, off);
428
429
430 off = fdt_node_offset_by_compatible(blob, -1, "vivante,gc");
431 if (off != -FDT_ERR_NOTFOUND)
432 fdt_status_disabled(blob, off);
433}
434#endif
435
436#ifdef CONFIG_PCIE_ECAM_GENERIC
437__weak void fdt_fixup_ecam(void *blob)
438{
439}
440#endif
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461static bool crypto_is_disabled(unsigned int svr)
462{
463 if (IS_E_PROCESSOR(svr))
464 return false;
465
466 if (IS_SVR_DEV(svr, SVR_DEV(SVR_LS1043A)))
467 return true;
468
469 if (IS_SVR_DEV(svr, SVR_DEV(SVR_LS1088A)))
470 return true;
471
472 if (IS_SVR_DEV(svr, SVR_DEV(SVR_LS2080A)))
473 return true;
474
475 if (IS_SVR_DEV(svr, SVR_DEV(SVR_LS2088A)))
476 return true;
477
478 return false;
479}
480
481#ifdef CONFIG_FSL_PFE
482void pfe_set_firmware_in_fdt(void *blob, int pfenode, void *pfw, char *pename,
483 unsigned int len)
484{
485 int rc, fwnode;
486 unsigned int phandle;
487 char subnode_str[32], prop_str[32], phandle_str[32], s[64];
488
489 sprintf(subnode_str, "pfe-%s-firmware", pename);
490 sprintf(prop_str, "fsl,pfe-%s-firmware", pename);
491 sprintf(phandle_str, "fsl,%s-firmware", pename);
492
493
494
495 rc = fdt_increase_size(blob, len);
496 if (rc < 0) {
497 printf("Unable to make room for %s firmware: %s\n", pename,
498 fdt_strerror(rc));
499 return;
500 }
501
502
503 fwnode = fdt_add_subnode(blob, pfenode, subnode_str);
504 if (fwnode < 0) {
505 fdt_get_path(blob, pfenode, s, sizeof(s));
506 printf("Could not add firmware node to %s: %s\n", s,
507 fdt_strerror(fwnode));
508 return;
509 }
510
511 rc = fdt_setprop_string(blob, fwnode, "compatible", prop_str);
512 if (rc < 0) {
513 fdt_get_path(blob, fwnode, s, sizeof(s));
514 printf("Could not add compatible property to node %s: %s\n", s,
515 fdt_strerror(rc));
516 return;
517 }
518
519 rc = fdt_setprop_u32(blob, fwnode, "length", len);
520 if (rc < 0) {
521 fdt_get_path(blob, fwnode, s, sizeof(s));
522 printf("Could not add compatible property to node %s: %s\n", s,
523 fdt_strerror(rc));
524 return;
525 }
526
527
528 phandle = fdt_create_phandle(blob, fwnode);
529 if (!phandle) {
530 fdt_get_path(blob, fwnode, s, sizeof(s));
531 printf("Could not add phandle property to node %s: %s\n", s,
532 fdt_strerror(rc));
533 return;
534 }
535
536 rc = fdt_setprop(blob, fwnode, phandle_str, pfw, len);
537 if (rc < 0) {
538 fdt_get_path(blob, fwnode, s, sizeof(s));
539 printf("Could not add firmware property to node %s: %s\n", s,
540 fdt_strerror(rc));
541 return;
542 }
543}
544
545void fdt_fixup_pfe_firmware(void *blob)
546{
547 int pfenode;
548 unsigned int len_class = 0, len_tmu = 0, len_util = 0;
549 const char *p;
550 void *pclassfw, *ptmufw, *putilfw;
551
552
553 pfenode = fdt_node_offset_by_compatible(blob, -1, "fsl,pfe");
554 if (pfenode < 0)
555
556 return;
557
558
559 if (fdt_node_offset_by_compatible(blob, -1,
560 "fsl,pfe-class-firmware") > 0)
561 return;
562
563
564 p = env_get("class_elf_firmware");
565 if (!p)
566 return;
567
568 pclassfw = (void *)hextoul(p, NULL);
569 if (!pclassfw)
570 return;
571
572 p = env_get("class_elf_size");
573 if (!p)
574 return;
575 len_class = hextoul(p, NULL);
576
577
578 p = env_get("tmu_elf_firmware");
579 if (!p)
580 return;
581
582 ptmufw = (void *)hextoul(p, NULL);
583 if (!ptmufw)
584 return;
585
586 p = env_get("tmu_elf_size");
587 if (!p)
588 return;
589 len_tmu = hextoul(p, NULL);
590
591 if (len_class == 0 || len_tmu == 0) {
592 printf("PFE FW corrupted. CLASS FW size %d, TMU FW size %d\n",
593 len_class, len_tmu);
594 return;
595 }
596
597
598 pfe_set_firmware_in_fdt(blob, pfenode, pclassfw, "class", len_class);
599
600
601 pfe_set_firmware_in_fdt(blob, pfenode, ptmufw, "tmu", len_tmu);
602
603
604 p = env_get("util_elf_firmware");
605 if (!p)
606 return;
607
608 putilfw = (void *)hextoul(p, NULL);
609 if (!putilfw)
610 return;
611
612 p = env_get("util_elf_size");
613 if (!p)
614 return;
615 len_util = hextoul(p, NULL);
616
617 if (len_util) {
618 printf("PFE Util PE firmware is not added to FDT.\n");
619 return;
620 }
621
622 pfe_set_firmware_in_fdt(blob, pfenode, putilfw, "util", len_util);
623}
624#endif
625
626void ft_cpu_setup(void *blob, struct bd_info *bd)
627{
628 struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
629 unsigned int svr = gur_in32(&gur->svr);
630
631
632 if (crypto_is_disabled(svr))
633 fdt_fixup_crypto_node(blob, 0);
634#if CONFIG_SYS_FSL_SEC_COMPAT >= 4
635 else {
636 ccsr_sec_t __iomem *sec;
637
638#if CONFIG_IS_ENABLED(ARMV8_SEC_FIRMWARE_SUPPORT)
639 fdt_fixup_remove_jr(blob);
640 fdt_fixup_kaslr(blob);
641#endif
642
643 sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
644 fdt_fixup_crypto_node(blob, sec_in32(&sec->secvid_ms));
645 }
646#endif
647
648#ifdef CONFIG_MP
649 ft_fixup_cpu(blob);
650#endif
651
652#ifdef CONFIG_SYS_NS16550
653 do_fixup_by_compat_u32(blob, "fsl,ns16550",
654 "clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
655#endif
656
657 do_fixup_by_path_u32(blob, "/sysclk", "clock-frequency",
658 CONFIG_SYS_CLK_FREQ, 1);
659
660#ifdef CONFIG_GIC_V3_ITS
661 ls_gic_rd_tables_init(blob);
662#endif
663
664#if defined(CONFIG_PCIE_LAYERSCAPE) || defined(CONFIG_PCIE_LAYERSCAPE_GEN4)
665 ft_pci_setup(blob, bd);
666#endif
667
668#ifdef CONFIG_FSL_ESDHC
669 fdt_fixup_esdhc(blob, bd);
670#endif
671
672#ifdef CONFIG_SYS_DPAA_QBMAN
673 fdt_fixup_bportals(blob);
674 fdt_fixup_qportals(blob);
675 do_fixup_by_compat_u32(blob, "fsl,qman",
676 "clock-frequency", get_qman_freq(), 1);
677#endif
678
679#ifdef CONFIG_SYS_DPAA_FMAN
680 fdt_fixup_fman_firmware(blob);
681#endif
682#ifdef CONFIG_FSL_PFE
683 fdt_fixup_pfe_firmware(blob);
684#endif
685#ifndef CONFIG_ARCH_LS1012A
686 fsl_fdt_disable_usb(blob);
687#endif
688#ifdef CONFIG_HAS_FEATURE_GIC64K_ALIGN
689 fdt_fixup_gic(blob);
690#endif
691#ifdef CONFIG_HAS_FEATURE_ENHANCED_MSI
692 fdt_fixup_msi(blob);
693#endif
694#ifdef CONFIG_ARCH_LS1028A
695 fdt_disable_multimedia(blob, svr);
696#endif
697#ifdef CONFIG_PCIE_ECAM_GENERIC
698 fdt_fixup_ecam(blob);
699#endif
700}
701
