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7#ifndef _SYS_PROTO_H_
8#define _SYS_PROTO_H_
9
10#include <asm/arch/omap.h>
11#include <asm/io.h>
12#include <asm/arch/clock.h>
13#include <asm/omap_common.h>
14#include <linux/mtd/omap_gpmc.h>
15#include <asm/arch/clock.h>
16#include <asm/ti-common/sys_proto.h>
17
18
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20
21
22
23
24struct iodelay_cfg_entry {
25 u16 offset;
26 u16 a_delay;
27 u16 g_delay;
28};
29
30struct pad_conf_entry {
31 u32 offset;
32 u32 val;
33};
34
35struct mmc_platform_fixups {
36 const char *hw_rev;
37 u32 unsupported_caps;
38 u32 max_freq;
39};
40
41struct omap_sysinfo {
42 char *board_string;
43};
44extern const struct omap_sysinfo sysinfo;
45
46void gpmc_init(void);
47void watchdog_init(void);
48u32 get_device_type(void);
49void do_set_mux(u32 base, struct pad_conf_entry const *array, int size);
50void do_set_mux32(u32 base, struct pad_conf_entry const *array, int size);
51void set_muxconf_regs(void);
52u32 wait_on_value(u32, u32, void *, u32);
53void sdelay(unsigned long);
54void setup_early_clocks(void);
55void prcm_init(void);
56void do_board_detect(void);
57void vcores_init(void);
58void bypass_dpll(u32 const base);
59void freq_update_core(void);
60u32 get_sys_clk_freq(void);
61u32 omap5_ddr_clk(void);
62void cancel_out(u32 *num, u32 *den, u32 den_limit);
63void sdram_init(void);
64u32 omap_sdram_size(void);
65u32 cortex_rev(void);
66void save_omap_boot_params(void);
67void init_omap_revision(void);
68void init_package_revision(void);
69void do_io_settings(void);
70void sri2c_init(void);
71int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
72u32 warm_reset(void);
73void force_emif_self_refresh(void);
74void get_ioregs(const struct ctrl_ioregs **regs);
75void srcomp_enable(void);
76void setup_warmreset_time(void);
77const struct mmc_platform_fixups *platform_fixups_mmc(uint32_t addr);
78
79static inline u32 div_round_up(u32 num, u32 den)
80{
81 return (num + den - 1)/den;
82}
83
84static inline u32 usec_to_32k(u32 usec)
85{
86 return div_round_up(32768 * usec, 1000000);
87}
88
89#define OMAP5_SERVICE_L2ACTLR_SET 0x104
90#define OMAP5_SERVICE_ACR_SET 0x107
91
92#endif
93