LXR uboot/arch/arm/mach-bcm283x/reset.c

   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * (C) Copyright 2012 Stephen Warren
   4 *
   5 * See file CREDITS for list of people who contributed to this
   6 * project.
   7 */
   8
   9#include <common.h>
  10#include <cpu_func.h>
  11#include <asm/io.h>
  12#include <asm/arch/base.h>
  13#include <asm/arch/wdog.h>
  14#include <efi_loader.h>
  15
  16#define RESET_TIMEOUT 10
  17
  18/*
  19 * The Raspberry Pi firmware uses the RSTS register to know which partiton
  20 * to boot from. The partiton value is spread into bits 0, 2, 4, 6, 8, 10.
  21 * Partiton 63 is a special partition used by the firmware to indicate halt.
  22 */
  23#define BCM2835_WDOG_RSTS_RASPBERRYPI_HALT      0x555
  24
  25/* max ticks timeout */
  26#define BCM2835_WDOG_MAX_TIMEOUT        0x000fffff
  27
  28void hw_watchdog_disable(void) {}
  29
  30__efi_runtime_data struct bcm2835_wdog_regs *wdog_regs;
  31
  32static void __efi_runtime
  33__reset_cpu(struct bcm2835_wdog_regs *wdog_regs, ulong ticks)
  34{
  35        uint32_t rstc, timeout;
  36
  37        if (ticks == 0) {
  38                hw_watchdog_disable();
  39                timeout = RESET_TIMEOUT;
  40        } else
  41                timeout = ticks & BCM2835_WDOG_MAX_TIMEOUT;
  42
  43        rstc = readl(&wdog_regs->rstc);
  44        rstc &= ~BCM2835_WDOG_RSTC_WRCFG_MASK;
  45        rstc |= BCM2835_WDOG_RSTC_WRCFG_FULL_RESET;
  46
  47        writel(BCM2835_WDOG_PASSWORD | timeout, &wdog_regs->wdog);
  48        writel(BCM2835_WDOG_PASSWORD | rstc, &wdog_regs->rstc);
  49}
  50
  51void reset_cpu(void)
  52{
  53        struct bcm2835_wdog_regs *regs =
  54                (struct bcm2835_wdog_regs *)BCM2835_WDOG_PHYSADDR;
  55
  56        __reset_cpu(regs, 0);
  57}
  58
  59#ifdef CONFIG_EFI_LOADER
  60
  61void __efi_runtime EFIAPI efi_reset_system(
  62                        enum efi_reset_type reset_type,
  63                        efi_status_t reset_status,
  64                        unsigned long data_size, void *reset_data)
  65{
  66        u32 val;
  67
  68        if (reset_type == EFI_RESET_COLD ||
  69            reset_type == EFI_RESET_WARM ||
  70            reset_type == EFI_RESET_PLATFORM_SPECIFIC) {
  71                __reset_cpu(wdog_regs, 0);
  72        } else if (reset_type == EFI_RESET_SHUTDOWN) {
  73                /*
  74                 * We set the watchdog hard reset bit here to distinguish this reset
  75                 * from the normal (full) reset. bootcode.bin will not reboot after a
  76                 * hard reset.
  77                 */
  78                val = readl(&wdog_regs->rsts);
  79                val |= BCM2835_WDOG_PASSWORD;
  80                val |= BCM2835_WDOG_RSTS_RASPBERRYPI_HALT;
  81                writel(val, &wdog_regs->rsts);
  82                __reset_cpu(wdog_regs, 0);
  83        }
  84
  85        while (1) { }
  86}
  87
  88efi_status_t efi_reset_system_init(void)
  89{
  90        wdog_regs = (struct bcm2835_wdog_regs *)BCM2835_WDOG_PHYSADDR;
  91        return efi_add_runtime_mmio(&wdog_regs, sizeof(*wdog_regs));
  92}
  93
  94#endif
  95