1// SPDX-License-Identifier: GPL-2.0+ 2 3#include <common.h> 4#include <asm/io.h> 5 6#if defined(CONFIG_MX53) 7#define MEMCTL_BASE ESDCTL_BASE_ADDR 8#elif defined(CONFIG_MX6) 9#define MEMCTL_BASE MMDC_P0_BASE_ADDR 10#elif defined(CONFIG_MX7ULP) 11#define MEMCTL_BASE MMDC0_RBASE 12#endif 13static const unsigned char col_lookup[] = {9, 10, 11, 8, 12, 9, 9, 9}; 14static const unsigned char bank_lookup[] = {3, 2}; 15 16/* these MMDC registers are common to the IMX53 and IMX6 */ 17struct esd_mmdc_regs { 18 u32 ctl; 19 u32 pdc; 20 u32 otc; 21 u32 cfg0; 22 u32 cfg1; 23 u32 cfg2; 24 u32 misc; 25}; 26 27#define ESD_MMDC_CTL_GET_ROW(mdctl) ((mdctl >> 24) & 7) 28#define ESD_MMDC_CTL_GET_COLUMN(mdctl) ((mdctl >> 20) & 7) 29#define ESD_MMDC_CTL_GET_WIDTH(mdctl) ((mdctl >> 16) & 3) 30#define ESD_MMDC_CTL_GET_CS1(mdctl) ((mdctl >> 30) & 1) 31#define ESD_MMDC_MISC_GET_BANK(mdmisc) ((mdmisc >> 5) & 1) 32 33/* 34 * imx_ddr_size - return size in bytes of DRAM according MMDC config 35 * The MMDC MDCTL register holds the number of bits for row, col, and data 36 * width and the MMDC MDMISC register holds the number of banks. Combine 37 * all these bits to determine the meme size the MMDC has been configured for 38 */ 39unsigned int imx_ddr_size(void) 40{ 41 struct esd_mmdc_regs *mem = (struct esd_mmdc_regs *)MEMCTL_BASE; 42 unsigned int ctl = readl(&mem->ctl); 43 unsigned int misc = readl(&mem->misc); 44 int bits = 11 + 0 + 0 + 1; /* row + col + bank + width */ 45 46 bits += ESD_MMDC_CTL_GET_ROW(ctl); 47 bits += col_lookup[ESD_MMDC_CTL_GET_COLUMN(ctl)]; 48 bits += bank_lookup[ESD_MMDC_MISC_GET_BANK(misc)]; 49 bits += ESD_MMDC_CTL_GET_WIDTH(ctl); 50 bits += ESD_MMDC_CTL_GET_CS1(ctl); 51 52 /* The MX6 can do only 3840 MiB of DRAM */ 53 if (bits == 32) 54 return 0xf0000000; 55 56 return 1 << bits; 57} 58