LXR uboot/arch/arm/mach-mvebu/serdes/a38x/ctrl

   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * Copyright (C) Marvell International Ltd. and its affiliates
   4 */
   5
   6#include <common.h>
   7#include <spl.h>
   8#include <asm/io.h>
   9#include <asm/arch/cpu.h>
  10#include <asm/arch/soc.h>
  11#include <linux/bitops.h>
  12#include <linux/delay.h>
  13
  14#include "ctrl_pex.h"
  15#include "sys_env_lib.h"
  16
  17__weak void board_pex_config(void)
  18{
  19        /* nothing in this weak default implementation */
  20}
  21
  22int hws_pex_config(const struct serdes_map *serdes_map, u8 count)
  23{
  24        enum serdes_type serdes_type;
  25        u32 idx, tmp;
  26
  27        DEBUG_INIT_FULL_S("\n### hws_pex_config ###\n");
  28
  29        tmp = reg_read(SOC_CONTROL_REG1);
  30        tmp &= ~0x03;
  31
  32        for (idx = 0; idx < count; idx++) {
  33                serdes_type = serdes_map[idx].serdes_type;
  34                if ((serdes_type != PEX0) &&
  35                    ((serdes_map[idx].serdes_mode == PEX_ROOT_COMPLEX_X4) ||
  36                     (serdes_map[idx].serdes_mode == PEX_END_POINT_X4))) {
  37                        /* for PEX by4 - relevant for the first port only */
  38                        continue;
  39                }
  40
  41                switch (serdes_type) {
  42                case PEX0:
  43                        tmp |= 0x1 << PCIE0_ENABLE_OFFS;
  44                        break;
  45                case PEX1:
  46                        tmp |= 0x1 << PCIE1_ENABLE_OFFS;
  47                        break;
  48                case PEX2:
  49                        tmp |= 0x1 << PCIE2_ENABLE_OFFS;
  50                        break;
  51                case PEX3:
  52                        tmp |= 0x1 << PCIE3_ENABLE_OFFS;
  53                        break;
  54                default:
  55                        break;
  56                }
  57        }
  58
  59        reg_write(SOC_CONTROL_REG1, tmp);
  60
  61        board_pex_config();
  62
  63        return MV_OK;
  64}
  65