1if ARCH_ROCKCHIP 2 3config ROCKCHIP_PX30 4 bool "Support Rockchip PX30" 5 select ARM64 6 select SUPPORT_SPL 7 select SUPPORT_TPL 8 select SPL 9 select TPL 10 select TPL_TINY_FRAMEWORK if TPL 11 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL 12 select TPL_NEEDS_SEPARATE_STACK if TPL 13 imply SPL_SEPARATE_BSS 14 select SPL_SERIAL 15 select TPL_SERIAL 16 select DEBUG_UART_BOARD_INIT 17 imply ROCKCHIP_COMMON_BOARD 18 imply SPL_ROCKCHIP_COMMON_BOARD 19 help 20 The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35 21 including NEON and GPU, Mali-400 graphics, several DDR3 options 22 and video codec support. Peripherals include Gigabit Ethernet, 23 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 24 25config ROCKCHIP_RK3036 26 bool "Support Rockchip RK3036" 27 select CPU_V7A 28 select SUPPORT_SPL 29 select SPL 30 imply USB_FUNCTION_ROCKUSB 31 imply CMD_ROCKUSB 32 imply ROCKCHIP_COMMON_BOARD 33 help 34 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7 35 including NEON and GPU, Mali-400 graphics, several DDR3 options 36 and video codec support. Peripherals include Gigabit Ethernet, 37 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 38 39config ROCKCHIP_RK3128 40 bool "Support Rockchip RK3128" 41 select CPU_V7A 42 imply ROCKCHIP_COMMON_BOARD 43 help 44 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7 45 including NEON and GPU, Mali-400 graphics, several DDR3 options 46 and video codec support. Peripherals include Gigabit Ethernet, 47 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 48 49config ROCKCHIP_RK3188 50 bool "Support Rockchip RK3188" 51 select CPU_V7A 52 select SPL_BOARD_INIT if SPL 53 select SUPPORT_SPL 54 select SPL 55 select SPL_CLK 56 select SPL_REGMAP 57 select SPL_SYSCON 58 select SPL_RAM 59 select SPL_DRIVERS_MISC 60 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM 61 select SPL_ROCKCHIP_BACK_TO_BROM 62 select BOARD_LATE_INIT 63 imply ROCKCHIP_COMMON_BOARD 64 imply SPL_ROCKCHIP_COMMON_BOARD 65 help 66 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9 67 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two 68 video interfaces, several memory options and video codec support. 69 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S, 70 UART, SPI, I2C and PWMs. 71 72config ROCKCHIP_RK322X 73 bool "Support Rockchip RK3228/RK3229" 74 select CPU_V7A 75 select SUPPORT_SPL 76 select SUPPORT_TPL 77 select SPL 78 select SPL_DM 79 select SPL_OF_LIBFDT 80 select TPL 81 select TPL_DM 82 select TPL_OF_LIBFDT 83 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL 84 select TPL_NEEDS_SEPARATE_STACK if TPL 85 select SPL_DRIVERS_MISC 86 imply ROCKCHIP_COMMON_BOARD 87 imply SPL_SERIAL 88 imply SPL_ROCKCHIP_COMMON_BOARD 89 imply TPL_SERIAL 90 imply TPL_ROCKCHIP_COMMON_BOARD 91 select TPL_LIBCOMMON_SUPPORT 92 select TPL_LIBGENERIC_SUPPORT 93 help 94 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7 95 including NEON and GPU, Mali-400 graphics, several DDR3 options 96 and video codec support. Peripherals include Gigabit Ethernet, 97 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 98 99config ROCKCHIP_RK3288 100 bool "Support Rockchip RK3288" 101 select CPU_V7A 102 select OF_BOARD_SETUP 103 select SKIP_LOWLEVEL_INIT_ONLY 104 select SUPPORT_SPL 105 select SPL 106 select SUPPORT_TPL 107 imply PRE_CONSOLE_BUFFER 108 imply ROCKCHIP_COMMON_BOARD 109 imply SPL_ROCKCHIP_COMMON_BOARD 110 imply TPL_CLK 111 imply TPL_DM 112 imply TPL_DRIVERS_MISC 113 imply TPL_LIBCOMMON_SUPPORT 114 imply TPL_LIBGENERIC_SUPPORT 115 imply TPL_NEEDS_SEPARATE_TEXT_BASE 116 imply TPL_NEEDS_SEPARATE_STACK 117 imply TPL_OF_CONTROL 118 imply TPL_OF_PLATDATA 119 imply TPL_RAM 120 imply TPL_REGMAP 121 imply TPL_ROCKCHIP_COMMON_BOARD 122 imply TPL_SERIAL 123 imply TPL_SYSCON 124 imply USB_FUNCTION_ROCKUSB 125 imply CMD_ROCKUSB 126 help 127 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17 128 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two 129 video interfaces supporting HDMI and eDP, several DDR3 options 130 and video codec support. Peripherals include Gigabit Ethernet, 131 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. 132 133config ROCKCHIP_RK3308 134 bool "Support Rockchip RK3308" 135 select ARM64 136 select DEBUG_UART_BOARD_INIT 137 select SUPPORT_SPL 138 select SUPPORT_TPL 139 select SPL 140 select SPL_ATF 141 select SPL_ATF_NO_PLATFORM_PARAM 142 select SPL_LOAD_FIT 143 imply ROCKCHIP_COMMON_BOARD 144 imply SPL_ROCKCHIP_COMMON_BOARD 145 imply SPL_CLK 146 imply SPL_REGMAP 147 imply SPL_SYSCON 148 imply SPL_RAM 149 imply SPL_SERIAL 150 imply TPL_SERIAL 151 imply SPL_SEPARATE_BSS 152 help 153 The Rockchip RK3308 is a ARM-based Soc which embedded with quad 154 Cortex-A35 and highly integrated audio interfaces. 155 156config ROCKCHIP_RK3328 157 bool "Support Rockchip RK3328" 158 select ARM64 159 select SUPPORT_SPL 160 select SPL 161 select SUPPORT_TPL 162 select TPL 163 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL 164 select TPL_NEEDS_SEPARATE_STACK if TPL 165 imply ROCKCHIP_COMMON_BOARD 166 imply ROCKCHIP_SDRAM_COMMON 167 imply SPL_ROCKCHIP_COMMON_BOARD 168 imply SPL_SERIAL 169 imply TPL_SERIAL 170 imply SPL_SEPARATE_BSS 171 select ENABLE_ARM_SOC_BOOT0_HOOK 172 select DEBUG_UART_BOARD_INIT 173 select SYS_NS16550 174 help 175 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53. 176 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two 177 video interfaces supporting HDMI and eDP, several DDR3 options 178 and video codec support. Peripherals include Gigabit Ethernet, 179 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. 180 181config ROCKCHIP_RK3368 182 bool "Support Rockchip RK3368" 183 select ARM64 184 select SUPPORT_SPL 185 select SUPPORT_TPL 186 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL 187 select TPL_NEEDS_SEPARATE_STACK if TPL 188 imply ROCKCHIP_COMMON_BOARD 189 imply SPL_ROCKCHIP_COMMON_BOARD 190 imply SPL_SEPARATE_BSS 191 imply SPL_SERIAL 192 imply TPL_SERIAL 193 imply TPL_ROCKCHIP_COMMON_BOARD 194 help 195 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised 196 into a big and little cluster with 4 cores each) Cortex-A53 including 197 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache 198 (for the little cluster), PowerVR G6110 based graphics, one video 199 output processor supporting LVDS/HDMI/eDP, several DDR3 options and 200 video codec support. 201 202 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, 203 I2S, UARTs, SPI, I2C and PWMs. 204 205config ROCKCHIP_RK3399 206 bool "Support Rockchip RK3399" 207 select ARM64 208 select SUPPORT_SPL 209 select SUPPORT_TPL 210 select SPL 211 select SPL_ATF 212 select SPL_BOARD_INIT if SPL 213 select SPL_LOAD_FIT 214 select SPL_CLK if SPL 215 select SPL_PINCTRL if SPL 216 select SPL_RAM if SPL 217 select SPL_REGMAP if SPL 218 select SPL_SYSCON if SPL 219 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL 220 select TPL_NEEDS_SEPARATE_STACK if TPL 221 select SPL_SEPARATE_BSS 222 select SPL_SERIAL 223 select SPL_DRIVERS_MISC 224 select CLK 225 select FIT 226 select PINCTRL 227 select RAM 228 select REGMAP 229 select SYSCON 230 select DM_PMIC 231 select DM_REGULATOR_FIXED 232 select BOARD_LATE_INIT 233 imply PRE_CONSOLE_BUFFER 234 imply ROCKCHIP_COMMON_BOARD 235 imply ROCKCHIP_SDRAM_COMMON 236 imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF 237 imply SPL_ROCKCHIP_COMMON_BOARD 238 imply TPL_SERIAL 239 imply TPL_LIBCOMMON_SUPPORT 240 imply TPL_LIBGENERIC_SUPPORT 241 imply TPL_SYS_MALLOC_SIMPLE 242 imply TPL_DRIVERS_MISC 243 imply TPL_OF_CONTROL 244 imply TPL_DM 245 imply TPL_REGMAP 246 imply TPL_SYSCON 247 imply TPL_RAM 248 imply TPL_CLK 249 imply TPL_TINY_MEMSET 250 imply TPL_ROCKCHIP_COMMON_BOARD 251 imply SYS_BOOTCOUNT_SINGLEWORD if BOOTCOUNT_LIMIT 252 imply CMD_BOOTCOUNT if BOOTCOUNT_LIMIT 253 help 254 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72 255 and quad-core Cortex-A53. 256 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two 257 video interfaces supporting HDMI and eDP, several DDR3 options 258 and video codec support. Peripherals include Gigabit Ethernet, 259 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. 260 261config ROCKCHIP_RK3568 262 bool "Support Rockchip RK3568" 263 select ARM64 264 select SUPPORT_SPL 265 select SPL 266 select CLK 267 select PINCTRL 268 select RAM 269 select REGMAP 270 select SYSCON 271 select BOARD_LATE_INIT 272 imply ROCKCHIP_COMMON_BOARD 273 help 274 The Rockchip RK3568 is a ARM-based SoC with quad-core Cortex-A55, 275 including NEON and GPU, 512K L3 cache, Mali-G52 based graphics, 276 two video interfaces supporting HDMI and eDP, several DDR3 options 277 and video codec support. Peripherals include Gigabit Ethernet, 278 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. 279 280config ROCKCHIP_RV1108 281 bool "Support Rockchip RV1108" 282 select CPU_V7A 283 imply ROCKCHIP_COMMON_BOARD 284 help 285 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7 286 and a DSP. 287 288config ROCKCHIP_USB_UART 289 bool "Route uart output to usb pins" 290 help 291 Rockchip SoCs have the ability to route the signals of the debug 292 uart through the d+ and d- pins of a specific usb phy to enable 293 some form of closed-case debugging. With this option supported 294 SoCs will enable this routing as a debug measure. 295 296config SPL_ROCKCHIP_BACK_TO_BROM 297 bool "SPL returns to bootrom" 298 default y if ROCKCHIP_RK3036 299 select ROCKCHIP_BROM_HELPER 300 select SPL_BOOTROM_SUPPORT 301 depends on SPL 302 help 303 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, 304 SPL will return to the boot rom, which will then load the U-Boot 305 binary to keep going on. 306 307config TPL_ROCKCHIP_BACK_TO_BROM 308 bool "TPL returns to bootrom" 309 default y 310 select ROCKCHIP_BROM_HELPER 311 select TPL_BOOTROM_SUPPORT 312 depends on TPL 313 help 314 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, 315 SPL will return to the boot rom, which will then load the U-Boot 316 binary to keep going on. 317 318config ROCKCHIP_COMMON_BOARD 319 bool "Rockchip common board file" 320 help 321 Rockchip SoCs have similar boot process, Common board file is mainly 322 in charge of common process of board_init() and board_late_init() for 323 U-Boot proper. 324 325config SPL_ROCKCHIP_COMMON_BOARD 326 bool "Rockchip SPL common board file" 327 depends on SPL 328 help 329 Rockchip SoCs have similar boot process, SPL is mainly in charge of 330 load and boot Trust ATF/U-Boot firmware, and DRAM init if there is 331 no TPL for the board. 332 333config TPL_ROCKCHIP_COMMON_BOARD 334 bool "Rockchip TPL common board file" 335 depends on TPL 336 help 337 Rockchip SoCs have similar boot process, prefer to use TPL for DRAM 338 init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL 339 common board is a basic TPL board init which can be shared for most 340 of SoCs to avoid copy-paste for different SoCs. 341 342config ROCKCHIP_BOOT_MODE_REG 343 hex "Rockchip boot mode flag register address" 344 help 345 The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h) 346 according to the value from this register. 347 348config ROCKCHIP_SPL_RESERVE_IRAM 349 hex "Size of IRAM reserved in SPL" 350 default 0 351 help 352 SPL may need reserve memory for firmware loaded by SPL, whose load 353 address is in IRAM and may overlay with SPL text area if not 354 reserved. 355 356config ROCKCHIP_BROM_HELPER 357 bool 358 359config SPL_ROCKCHIP_EARLYRETURN_TO_BROM 360 bool "SPL requires early-return (for RK3188-style BROM) to BROM" 361 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK 362 help 363 Some Rockchip BROM variants (e.g. on the RK3188) load the 364 first stage in segments and enter multiple times. E.g. on 365 the RK3188, the first 1KB of the first stage are loaded 366 first and entered; after returning to the BROM, the 367 remainder of the first stage is loaded, but the BROM 368 re-enters at the same address/to the same code as previously. 369 370 This enables support code in the BOOT0 hook for the SPL stage 371 to allow multiple entries. 372 373config TPL_ROCKCHIP_EARLYRETURN_TO_BROM 374 bool "TPL requires early-return (for RK3188-style BROM) to BROM" 375 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK 376 help 377 Some Rockchip BROM variants (e.g. on the RK3188) load the 378 first stage in segments and enter multiple times. E.g. on 379 the RK3188, the first 1KB of the first stage are loaded 380 first and entered; after returning to the BROM, the 381 remainder of the first stage is loaded, but the BROM 382 re-enters at the same address/to the same code as previously. 383 384 This enables support code in the BOOT0 hook for the TPL stage 385 to allow multiple entries. 386 387config SPL_MMC 388 default y if !SPL_ROCKCHIP_BACK_TO_BROM 389 390config ROCKCHIP_SPI_IMAGE 391 bool "Build a SPI image for rockchip" 392 depends on HAS_ROM 393 help 394 Some Rockchip SoCs support booting from SPI flash. Enable this 395 option to produce a 4MB SPI-flash image (called u-boot.rom) 396 containing U-Boot. The image is built by binman. U-Boot sits near 397 the start of the image. 398 399source "arch/arm/mach-rockchip/px30/Kconfig" 400source "arch/arm/mach-rockchip/rk3036/Kconfig" 401source "arch/arm/mach-rockchip/rk3128/Kconfig" 402source "arch/arm/mach-rockchip/rk3188/Kconfig" 403source "arch/arm/mach-rockchip/rk322x/Kconfig" 404source "arch/arm/mach-rockchip/rk3288/Kconfig" 405source "arch/arm/mach-rockchip/rk3308/Kconfig" 406source "arch/arm/mach-rockchip/rk3328/Kconfig" 407source "arch/arm/mach-rockchip/rk3368/Kconfig" 408source "arch/arm/mach-rockchip/rk3399/Kconfig" 409source "arch/arm/mach-rockchip/rk3568/Kconfig" 410source "arch/arm/mach-rockchip/rv1108/Kconfig" 411endif 412