1
2
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4
5
6#include <common.h>
7#include <console.h>
8#include <dm.h>
9#include <dfu.h>
10#include <malloc.h>
11#include <serial.h>
12#include <watchdog.h>
13#include <asm/arch/sys_proto.h>
14#include <dm/lists.h>
15#include <dm/device-internal.h>
16#include <linux/delay.h>
17#include <asm/global_data.h>
18#include "stm32prog.h"
19
20
21#define USART_BL_VERSION 0x40
22#define UBOOT_BL_VERSION 0x03
23
24#define USART_RAM_BUFFER_SIZE 256
25
26
27#define GET_CMD_COMMAND 0x00
28#define GET_VER_COMMAND 0x01
29#define GET_ID_COMMAND 0x02
30#define GET_PHASE_COMMAND 0x03
31#define RM_COMMAND 0x11
32#define READ_PART_COMMAND 0x12
33#define START_COMMAND 0x21
34#define DOWNLOAD_COMMAND 0x31
35
36
37
38
39
40
41
42
43#define INIT_BYTE 0x7F
44#define ACK_BYTE 0x79
45#define NACK_BYTE 0x1F
46#define ABORT_BYTE 0x5F
47
48struct udevice *down_serial_dev;
49
50const u8 cmd_id[] = {
51 GET_CMD_COMMAND,
52 GET_VER_COMMAND,
53 GET_ID_COMMAND,
54 GET_PHASE_COMMAND,
55 RM_COMMAND,
56 READ_PART_COMMAND,
57 START_COMMAND,
58 DOWNLOAD_COMMAND
59};
60
61#define NB_CMD sizeof(cmd_id)
62
63
64#define TIMEOUT_SERIAL_BUFFER 30
65
66
67static struct dfu_entity *stm32prog_get_entity(struct stm32prog_data *data)
68{
69 int alt_id;
70
71 if (!data->cur_part)
72 if (data->phase == PHASE_FLASHLAYOUT)
73 alt_id = 0;
74 else
75 return NULL;
76 else
77 alt_id = data->cur_part->alt_id;
78
79 return dfu_get_entity(alt_id);
80}
81
82static int stm32prog_write(struct stm32prog_data *data, u8 *buffer,
83 u32 buffer_size)
84{
85 struct dfu_entity *dfu_entity;
86 u8 ret = 0;
87
88 dfu_entity = stm32prog_get_entity(data);
89 if (!dfu_entity)
90 return -ENODEV;
91
92 ret = dfu_write(dfu_entity,
93 buffer,
94 buffer_size,
95 data->dfu_seq);
96
97 if (ret) {
98 stm32prog_err("DFU write failed [%d] cnt: %d",
99 ret, data->dfu_seq);
100 }
101 data->dfu_seq++;
102
103 data->dfu_seq &= 0xffff;
104 if (buffer_size == 0)
105 data->dfu_seq = 0;
106
107 return ret;
108}
109
110static int stm32prog_read(struct stm32prog_data *data, u8 phase, u32 offset,
111 u8 *buffer, u32 buffer_size)
112{
113 struct dfu_entity *dfu_entity;
114 struct stm32prog_part_t *part;
115 u32 size;
116 int ret, i;
117
118 if (data->dfu_seq) {
119 stm32prog_err("DFU write pending for phase %d, seq %d",
120 data->phase, data->dfu_seq);
121 return -EINVAL;
122 }
123 if (phase == PHASE_FLASHLAYOUT || phase > PHASE_LAST_USER) {
124 stm32prog_err("read failed : phase %d is invalid", phase);
125 return -EINVAL;
126 }
127 if (data->read_phase <= PHASE_LAST_USER &&
128 phase != data->read_phase) {
129
130 dfu_entity = dfu_get_entity(data->read_phase - 1);
131 if (dfu_entity)
132 dfu_transaction_cleanup(dfu_entity);
133 }
134
135 dfu_entity = NULL;
136
137 for (i = 0; i < data->part_nb; i++) {
138 part = &data->part_array[i];
139 if (part->id == phase)
140 dfu_entity = dfu_get_entity(part->alt_id);
141 }
142 if (!dfu_entity) {
143 stm32prog_err("read failed : phase %d is unknown", phase);
144 return -ENODEV;
145 }
146
147
148 if (dfu_entity->inited &&
149 (data->read_phase != phase || data->offset != offset))
150 dfu_transaction_cleanup(dfu_entity);
151
152
153 if (!dfu_entity->inited) {
154 ret = dfu_transaction_initiate(dfu_entity, true);
155 if (ret < 0) {
156 stm32prog_err("DFU read init failed [%d] phase = %d offset = 0x%08x",
157 ret, phase, offset);
158 return ret;
159 }
160 }
161
162 if (dfu_entity->offset != offset)
163 dfu_entity->offset = offset;
164 data->offset = offset;
165 data->read_phase = phase;
166 log_debug("\nSTM32 download read %s offset=0x%x\n",
167 dfu_entity->name, offset);
168 ret = dfu_read(dfu_entity, buffer, buffer_size,
169 dfu_entity->i_blk_seq_num);
170 if (ret < 0) {
171 stm32prog_err("DFU read failed [%d] phase = %d offset = 0x%08x",
172 ret, phase, offset);
173 return ret;
174 }
175
176 size = ret;
177
178 if (size < buffer_size) {
179 data->offset = 0;
180 data->read_phase = PHASE_END;
181 memset(buffer + size, 0, buffer_size - size);
182 } else {
183 data->offset += size;
184 }
185
186 return ret;
187}
188
189
190int stm32prog_serial_init(struct stm32prog_data *data, int link_dev)
191{
192 struct udevice *dev = NULL;
193 struct dm_serial_ops *ops;
194
195 u32 serial_config = SERIAL_DEFAULT_CONFIG;
196
197 down_serial_dev = NULL;
198
199 if (uclass_get_device_by_seq(UCLASS_SERIAL, link_dev, &dev)) {
200 log_err("serial %d device not found\n", link_dev);
201 return -ENODEV;
202 }
203
204 down_serial_dev = dev;
205
206
207 if (gd->cur_serial_dev == down_serial_dev)
208 gd->flags |= GD_FLG_DISABLE_CONSOLE | GD_FLG_SILENT;
209 else
210 gd->flags &= ~(GD_FLG_DISABLE_CONSOLE | GD_FLG_SILENT);
211
212 ops = serial_get_ops(down_serial_dev);
213
214 if (!ops) {
215 log_err("serial %d = %s missing ops\n", link_dev, dev->name);
216 return -ENODEV;
217 }
218 if (!ops->setconfig) {
219 log_err("serial %d = %s missing setconfig\n", link_dev, dev->name);
220 return -ENODEV;
221 }
222
223 clrsetbits_le32(&serial_config, SERIAL_PAR_MASK, SERIAL_PAR_EVEN);
224
225 data->buffer = memalign(CONFIG_SYS_CACHELINE_SIZE,
226 USART_RAM_BUFFER_SIZE);
227
228 return ops->setconfig(down_serial_dev, serial_config);
229}
230
231static void stm32prog_serial_flush(void)
232{
233 struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
234 int err;
235
236 do {
237 err = ops->getc(down_serial_dev);
238 } while (err != -EAGAIN);
239}
240
241static int stm32prog_serial_getc_err(void)
242{
243 struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
244 int err;
245
246 do {
247 err = ops->getc(down_serial_dev);
248 if (err == -EAGAIN) {
249 ctrlc();
250 WATCHDOG_RESET();
251 }
252 } while ((err == -EAGAIN) && (!had_ctrlc()));
253
254 return err;
255}
256
257static u8 stm32prog_serial_getc(void)
258{
259 int err;
260
261 err = stm32prog_serial_getc_err();
262
263 return err >= 0 ? err : 0;
264}
265
266static bool stm32prog_serial_get_buffer(u8 *buffer, u32 *count)
267{
268 struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
269 int err;
270 ulong start = get_timer(0);
271
272 do {
273 err = ops->getc(down_serial_dev);
274 if (err >= 0) {
275 *buffer++ = err;
276 *count -= 1;
277 } else if (err == -EAGAIN) {
278 ctrlc();
279 WATCHDOG_RESET();
280 if (get_timer(start) > TIMEOUT_SERIAL_BUFFER) {
281 err = -ETIMEDOUT;
282 break;
283 }
284 } else {
285 break;
286 }
287 } while (*count && !had_ctrlc());
288
289 return !!(err < 0);
290}
291
292static void stm32prog_serial_putc(u8 w_byte)
293{
294 struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
295 int err;
296
297 do {
298 err = ops->putc(down_serial_dev, w_byte);
299 } while (err == -EAGAIN);
300}
301
302
303static u8 stm32prog_start(struct stm32prog_data *data, u32 address)
304{
305 u8 ret = 0;
306 struct dfu_entity *dfu_entity;
307
308 if (address < 0x100) {
309 if (address == PHASE_OTP)
310 return stm32prog_otp_start(data);
311
312 if (address == PHASE_PMIC)
313 return stm32prog_pmic_start(data);
314
315 if (address == PHASE_RESET || address == PHASE_END) {
316 data->cur_part = NULL;
317 data->dfu_seq = 0;
318 data->phase = address;
319 return 0;
320 }
321 if (address != data->phase) {
322 stm32prog_err("invalid received phase id %d, current phase is %d",
323 (u8)address, (u8)data->phase);
324 return -EINVAL;
325 }
326 }
327
328 if (address == DEFAULT_ADDRESS || address == data->phase) {
329 switch (data->phase) {
330 case PHASE_END:
331 case PHASE_RESET:
332 case PHASE_DO_RESET:
333 data->cur_part = NULL;
334 data->phase = PHASE_DO_RESET;
335 return 0;
336 }
337 dfu_entity = stm32prog_get_entity(data);
338 if (!dfu_entity)
339 return -ENODEV;
340
341 ret = dfu_flush(dfu_entity, NULL, 0, data->dfu_seq);
342 if (ret) {
343 stm32prog_err("DFU flush failed [%d]", ret);
344 return ret;
345 }
346 data->dfu_seq = 0;
347
348 printf("\n received length = 0x%x\n", data->cursor);
349
350
351 if (data->phase == PHASE_FLASHLAYOUT)
352 stm32prog_dfu_init(data);
353 } else {
354 void (*entry)(void) = (void *)address;
355
356 printf("## Starting application at 0x%x ...\n", address);
357 (*entry)();
358 printf("## Application terminated\n");
359 ret = -ENOEXEC;
360 }
361
362 return ret;
363}
364
365
366
367
368
369
370
371static u32 get_address(u8 *tmp_xor)
372{
373 u32 address = 0x0;
374 u8 data;
375
376 data = stm32prog_serial_getc();
377 *tmp_xor ^= data;
378 address |= ((u32)data) << 24;
379
380 data = stm32prog_serial_getc();
381 address |= ((u32)data) << 16;
382 *tmp_xor ^= data;
383
384 data = stm32prog_serial_getc();
385 address |= ((u32)data) << 8;
386 *tmp_xor ^= data;
387
388 data = stm32prog_serial_getc();
389 address |= ((u32)data);
390 *tmp_xor ^= data;
391
392 return address;
393}
394
395static void stm32prog_serial_result(u8 result)
396{
397
398 stm32prog_serial_flush();
399 stm32prog_serial_putc(result);
400}
401
402
403
404
405
406
407
408static void get_cmd_command(struct stm32prog_data *data)
409{
410 u32 counter = 0x0;
411
412 stm32prog_serial_putc(NB_CMD);
413 stm32prog_serial_putc(USART_BL_VERSION);
414
415 for (counter = 0; counter < NB_CMD; counter++)
416 stm32prog_serial_putc(cmd_id[counter]);
417
418 stm32prog_serial_result(ACK_BYTE);
419}
420
421
422
423
424
425
426static void get_version_command(struct stm32prog_data *data)
427{
428 stm32prog_serial_putc(UBOOT_BL_VERSION);
429 stm32prog_serial_result(ACK_BYTE);
430}
431
432
433
434
435
436
437static void get_id_command(struct stm32prog_data *data)
438{
439 u32 cpu = get_cpu_dev();
440
441
442 stm32prog_serial_putc(0x1);
443 stm32prog_serial_putc((cpu >> 8) & 0xFF);
444 stm32prog_serial_putc(cpu & 0xFF);
445 stm32prog_serial_result(ACK_BYTE);
446}
447
448
449
450
451
452
453static void get_phase_command(struct stm32prog_data *data)
454{
455 char *err_msg = NULL;
456 u8 i, length = 0;
457 u32 destination = DEFAULT_ADDRESS;
458 int phase = data->phase;
459
460 if (phase == PHASE_RESET || phase == PHASE_DO_RESET) {
461 err_msg = stm32prog_get_error(data);
462 length = strlen(err_msg);
463 }
464 if (phase == PHASE_FLASHLAYOUT)
465 destination = STM32_DDR_BASE;
466
467 stm32prog_serial_putc(length + 5);
468 stm32prog_serial_putc(phase & 0xFF);
469 stm32prog_serial_putc(destination);
470 stm32prog_serial_putc(destination >> 8);
471 stm32prog_serial_putc(destination >> 16);
472 stm32prog_serial_putc(destination >> 24);
473
474 stm32prog_serial_putc(length);
475 for (i = 0; i < length; i++)
476 stm32prog_serial_putc(err_msg[i]);
477 stm32prog_serial_result(ACK_BYTE);
478
479 if (phase == PHASE_RESET)
480 stm32prog_do_reset(data);
481}
482
483
484
485
486
487
488static void read_memory_command(struct stm32prog_data *data)
489{
490 u32 address = 0x0;
491 u8 rcv_data = 0x0, tmp_xor = 0x0;
492 u32 counter = 0x0;
493
494
495 address = get_address(&tmp_xor);
496
497
498 rcv_data = stm32prog_serial_getc();
499 if (rcv_data != tmp_xor) {
500 stm32prog_serial_result(NACK_BYTE);
501 return;
502 }
503
504 stm32prog_serial_result(ACK_BYTE);
505
506
507
508
509 rcv_data = stm32prog_serial_getc();
510 tmp_xor = ~rcv_data;
511 if (stm32prog_serial_getc() != tmp_xor) {
512 stm32prog_serial_result(NACK_BYTE);
513 return;
514 }
515
516
517 stm32prog_serial_result(ACK_BYTE);
518
519
520
521
522 for (counter = (rcv_data + 1); counter != 0; counter--)
523 stm32prog_serial_putc(*(u8 *)(address++));
524}
525
526
527
528
529
530
531
532
533static void start_command(struct stm32prog_data *data)
534{
535 u32 address = 0;
536 u8 tmp_xor = 0x0;
537 u8 ret, rcv_data;
538
539
540 address = get_address(&tmp_xor);
541
542
543 rcv_data = stm32prog_serial_getc();
544 if (rcv_data != tmp_xor) {
545 stm32prog_serial_result(NACK_BYTE);
546 return;
547 }
548
549 ret = stm32prog_start(data,
550 address);
551
552 if (ret)
553 stm32prog_serial_result(ABORT_BYTE);
554 else
555 stm32prog_serial_result(ACK_BYTE);
556}
557
558
559
560
561
562
563
564
565static void download_command(struct stm32prog_data *data)
566{
567 u32 address = 0x0;
568 u8 my_xor = 0x0;
569 u8 rcv_xor;
570 u32 counter = 0x0, codesize = 0x0;
571 u8 *ramaddress = 0;
572 u8 rcv_data = 0x0;
573 u32 cursor = data->cursor;
574 long size = 0;
575 u8 operation;
576 u32 packet_number;
577 u32 result = ACK_BYTE;
578 u8 ret;
579 bool error;
580 int rcv;
581
582 address = get_address(&my_xor);
583
584
585 rcv_xor = stm32prog_serial_getc();
586 if (rcv_xor != my_xor) {
587 result = NACK_BYTE;
588 goto end;
589 }
590
591
592 stm32prog_serial_result(ACK_BYTE);
593
594
595 operation = (u8)((u32)address >> 24);
596 packet_number = ((u32)(((u32)address << 8))) >> 8;
597
598 switch (operation) {
599
600 case PHASE_FLASHLAYOUT:
601 case PHASE_OTP:
602 case PHASE_PMIC:
603 break;
604 default:
605 result = NACK_BYTE;
606 goto end;
607 }
608
609 if (packet_number == 0) {
610
611 data->packet_number = 0;
612 cursor = 0;
613 data->cursor = 0;
614
615 } else {
616 data->packet_number++;
617 }
618
619
620
621
622 if (packet_number != data->packet_number) {
623 data->packet_number--;
624 result = NACK_BYTE;
625 goto end;
626 }
627
628
629
630
631
632
633 rcv_data = stm32prog_serial_getc();
634
635
636 codesize = rcv_data + 0x01;
637
638 if (codesize > USART_RAM_BUFFER_SIZE) {
639 result = NACK_BYTE;
640 goto end;
641 }
642
643
644 my_xor = rcv_data;
645
646
647 counter = codesize;
648 error = stm32prog_serial_get_buffer(data->buffer, &counter);
649
650
651 if (!error) {
652 rcv = stm32prog_serial_getc_err();
653 error = !!(rcv < 0);
654 rcv_xor = rcv;
655 }
656
657 if (error) {
658 printf("transmission error on packet %d, byte %d\n",
659 packet_number, codesize - counter);
660
661 mdelay(TIMEOUT_SERIAL_BUFFER);
662 data->packet_number--;
663 result = NACK_BYTE;
664 goto end;
665 }
666
667
668 ramaddress = data->buffer;
669 for (counter = codesize; counter != 0; counter--)
670 my_xor ^= *(ramaddress++);
671
672
673 if (rcv_xor != my_xor) {
674 printf("checksum error on packet %d\n",
675 packet_number);
676
677
678
679 mdelay(TIMEOUT_SERIAL_BUFFER);
680 data->packet_number--;
681 result = NACK_BYTE;
682 goto end;
683 }
684
685 switch (operation) {
686 case PHASE_OTP:
687 size = codesize;
688 ret = stm32prog_otp_write(data, cursor, data->buffer, &size);
689 break;
690
691 case PHASE_PMIC:
692 size = codesize;
693 ret = stm32prog_pmic_write(data, cursor, data->buffer, &size);
694 break;
695
696 default:
697 ret = stm32prog_write(data, data->buffer, codesize);
698 break;
699 }
700
701 if (ret)
702 result = ABORT_BYTE;
703 else
704
705 data->cursor += codesize;
706
707end:
708 stm32prog_serial_result(result);
709}
710
711
712
713
714
715
716
717
718static void read_partition_command(struct stm32prog_data *data)
719{
720 u32 i, part_id, codesize, offset = 0, rcv_data;
721 long size;
722 u8 tmp_xor;
723 int res;
724 u8 buffer[256];
725
726 part_id = stm32prog_serial_getc();
727 tmp_xor = part_id;
728
729 offset = get_address(&tmp_xor);
730
731 rcv_data = stm32prog_serial_getc();
732 if (rcv_data != tmp_xor) {
733 log_debug("1st checksum received = %x, computed %x\n",
734 rcv_data, tmp_xor);
735 goto error;
736 }
737 stm32prog_serial_putc(ACK_BYTE);
738
739
740 rcv_data = stm32prog_serial_getc();
741 codesize = rcv_data + 0x01;
742 tmp_xor = rcv_data;
743
744 rcv_data = stm32prog_serial_getc();
745 if ((rcv_data ^ tmp_xor) != 0xFF) {
746 log_debug("2nd checksum received = %x, computed %x\n",
747 rcv_data, tmp_xor);
748 goto error;
749 }
750
751 log_debug("%s : %x\n", __func__, part_id);
752 rcv_data = 0;
753 switch (part_id) {
754 case PHASE_OTP:
755 size = codesize;
756 if (!stm32prog_otp_read(data, offset, buffer, &size))
757 rcv_data = size;
758 break;
759 case PHASE_PMIC:
760 size = codesize;
761 if (!stm32prog_pmic_read(data, offset, buffer, &size))
762 rcv_data = size;
763 break;
764 default:
765 res = stm32prog_read(data, part_id, offset,
766 buffer, codesize);
767 if (res > 0)
768 rcv_data = res;
769 break;
770 }
771 if (rcv_data > 0) {
772 stm32prog_serial_putc(ACK_BYTE);
773
774 for (i = 0; i < rcv_data; i++)
775 stm32prog_serial_putc(buffer[i]);
776
777 for (; i < codesize; i++)
778 stm32prog_serial_putc(0x0);
779 return;
780 }
781 stm32prog_serial_result(ABORT_BYTE);
782 return;
783
784error:
785 stm32prog_serial_result(NACK_BYTE);
786}
787
788
789
790
791
792
793
794
795
796bool stm32prog_serial_loop(struct stm32prog_data *data)
797{
798 u32 counter = 0x0;
799 u8 command = 0x0;
800 u8 found;
801 int phase = data->phase;
802
803
804 void (*cmd_func[NB_CMD])(struct stm32prog_data *) = {
805 get_cmd_command,
806 get_version_command,
807 get_id_command,
808 get_phase_command,
809 read_memory_command,
810 read_partition_command,
811 start_command,
812 download_command
813 };
814
815
816
817
818 stm32prog_serial_result(NACK_BYTE);
819
820 clear_ctrlc();
821 while (!had_ctrlc()) {
822 phase = data->phase;
823
824 if (phase == PHASE_DO_RESET)
825 return true;
826
827
828 command = stm32prog_serial_getc();
829
830 if (command == INIT_BYTE) {
831 puts("\nConnected\n");
832 stm32prog_serial_result(ACK_BYTE);
833 continue;
834 }
835
836 found = 0;
837 for (counter = 0; counter < NB_CMD; counter++)
838 if (cmd_id[counter] == command) {
839 found = 1;
840 break;
841 }
842 if (found)
843 if ((command ^ stm32prog_serial_getc()) != 0xFF)
844 found = 0;
845 if (!found) {
846
847
848
849 mdelay(3);
850 stm32prog_serial_result(NACK_BYTE);
851 } else {
852 stm32prog_serial_result(ACK_BYTE);
853 cmd_func[counter](data);
854 }
855 WATCHDOG_RESET();
856 }
857
858
859 if (gd->cur_serial_dev == down_serial_dev) {
860
861 gd->flags &= ~(GD_FLG_DISABLE_CONSOLE | GD_FLG_SILENT);
862 }
863 down_serial_dev = NULL;
864
865 return false;
866}
867