LXR uboot/arch/arm/mach-sunxi/prcm.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Sunxi A31 Power Management Unit
   4 *
   5 * (C) Copyright 2013 Oliver Schinagl <oliver@schinagl.nl>
   6 * http://linux-sunxi.org
   7 *
   8 * Based on sun6i sources and earlier U-Boot Allwinner A10 SPL work
   9 *
  10 * (C) Copyright 2006-2013
  11 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
  12 * Berg Xing <bergxing@allwinnertech.com>
  13 * Tom Cubie <tangliang@allwinnertech.com>
  14 */
  15
  16#include <common.h>
  17#include <errno.h>
  18#include <asm/io.h>
  19#include <asm/arch/cpu.h>
  20#include <asm/arch/prcm.h>
  21#include <asm/arch/sys_proto.h>
  22
  23/* APB0 clock gate and reset bit offsets are the same. */
  24void prcm_apb0_enable(u32 flags)
  25{
  26        struct sunxi_prcm_reg *prcm =
  27                (struct sunxi_prcm_reg *)SUNXI_PRCM_BASE;
  28
  29        /* open the clock for module */
  30        setbits_le32(&prcm->apb0_gate, flags);
  31
  32        /* deassert reset for module */
  33        setbits_le32(&prcm->apb0_reset, flags);
  34}
  35
  36void prcm_apb0_disable(u32 flags)
  37{
  38        struct sunxi_prcm_reg *prcm =
  39                (struct sunxi_prcm_reg *)SUNXI_PRCM_BASE;
  40
  41        /* assert reset for module */
  42        clrbits_le32(&prcm->apb0_reset, flags);
  43
  44        /* close the clock for module */
  45        clrbits_le32(&prcm->apb0_gate, flags);
  46}
  47