LXR uboot/arch/mips/include/asm/processor.h

   1/* SPDX-License-Identifier: GPL-2.0 */
   2/*
   3 * Copyright (C) 1994 Waldorf GMBH
   4 * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001, 2002, 2003 Ralf Baechle
   5 * Copyright (C) 1996 Paul M. Antoine
   6 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
   7 */
   8#ifndef _ASM_PROCESSOR_H
   9#define _ASM_PROCESSOR_H
  10
  11#include <asm/isadep.h>
  12
  13#include <asm/cachectl.h>
  14#include <asm/mipsregs.h>
  15#include <asm/reg.h>
  16#include <asm/system.h>
  17
  18/*
  19 * Return current * instruction pointer ("program counter").
  20 */
  21#define current_text_addr() ({ __label__ _l; _l: &&_l;})
  22
  23/*
  24 * System setup and hardware flags..
  25 */
  26extern void (*cpu_wait)(void);
  27
  28extern unsigned int vced_count, vcei_count;
  29
  30#define NUM_FPU_REGS    32
  31
  32typedef __u64 fpureg_t;
  33
  34/*
  35 * It would be nice to add some more fields for emulator statistics, but there
  36 * are a number of fixed offsets in offset.h and elsewhere that would have to
  37 * be recalculated by hand.  So the additional information will be private to
  38 * the FPU emulator for now.  See asm-mips/fpu_emulator.h.
  39 */
  40
  41struct mips_fpu_struct {
  42        fpureg_t        fpr[NUM_FPU_REGS];
  43        unsigned int    fcr31;
  44};
  45
  46#define NUM_DSP_REGS   6
  47
  48typedef __u32 dspreg_t;
  49
  50struct mips_dsp_state {
  51        dspreg_t        dspr[NUM_DSP_REGS];
  52        unsigned int    dspcontrol;
  53};
  54
  55typedef struct {
  56        unsigned long seg;
  57} mm_segment_t;
  58
  59#define ARCH_MIN_TASKALIGN      8
  60
  61struct mips_abi;
  62
  63/*
  64 * If you change thread_struct remember to change the #defines below too!
  65 */
  66struct thread_struct {
  67        /* Saved main processor registers. */
  68        unsigned long reg16;
  69        unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23;
  70        unsigned long reg29, reg30, reg31;
  71
  72        /* Saved cp0 stuff. */
  73        unsigned long cp0_status;
  74
  75        /* Saved fpu/fpu emulator stuff. */
  76        struct mips_fpu_struct fpu;
  77#ifdef CONFIG_MIPS_MT_FPAFF
  78        /* Emulated instruction count */
  79        unsigned long emulated_fp;
  80        /* Saved per-thread scheduler affinity mask */
  81        cpumask_t user_cpus_allowed;
  82#endif /* CONFIG_MIPS_MT_FPAFF */
  83
  84        /* Saved state of the DSP ASE, if available. */
  85        struct mips_dsp_state dsp;
  86
  87        /* Other stuff associated with the thread. */
  88        unsigned long cp0_badvaddr;     /* Last user fault */
  89        unsigned long cp0_baduaddr;     /* Last kernel fault accessing USEG */
  90        unsigned long error_code;
  91        unsigned long trap_no;
  92        unsigned long irix_trampoline;  /* Wheee... */
  93        unsigned long irix_oldctx;
  94        struct mips_abi *abi;
  95};
  96
  97struct task_struct;
  98
  99/* Free all resources held by a thread. */
 100#define release_thread(thread) do { } while(0)
 101
 102/* Prepare to copy thread state - unlazy all lazy status */
 103#define prepare_to_copy(tsk)    do { } while (0)
 104
 105#define cpu_relax()     barrier()
 106
 107/*
 108 * Return_address is a replacement for __builtin_return_address(count)
 109 * which on certain architectures cannot reasonably be implemented in GCC
 110 * (MIPS, Alpha) or is unuseable with -fomit-frame-pointer (i386).
 111 * Note that __builtin_return_address(x>=1) is forbidden because GCC
 112 * aborts compilation on some CPUs.  It's simply not possible to unwind
 113 * some CPU's stackframes.
 114 *
 115 * __builtin_return_address works only for non-leaf functions.  We avoid the
 116 * overhead of a function call by forcing the compiler to save the return
 117 * address register on the stack.
 118 */
 119#define return_address() ({__asm__ __volatile__("":::"$31");__builtin_return_address(0);})
 120
 121#ifdef CONFIG_CPU_HAS_PREFETCH
 122
 123#define ARCH_HAS_PREFETCH
 124
 125static inline void prefetch(const void *addr)
 126{
 127        __asm__ __volatile__(
 128        "       .set    mips4           \n"
 129        "       pref    %0, (%1)        \n"
 130        "       .set    mips0           \n"
 131        :
 132        : "i" (Pref_Load), "r" (addr));
 133}
 134
 135#endif
 136
 137#endif /* _ASM_PROCESSOR_H */
 138