LXR uboot/arch/powerpc/cpu/mpc8xx/speed.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * (C) Copyright 2000-2004
   4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   5 */
   6
   7#include <common.h>
   8#include <clock_legacy.h>
   9#include <mpc8xx.h>
  10#include <asm/global_data.h>
  11#include <asm/processor.h>
  12#include <asm/io.h>
  13
  14DECLARE_GLOBAL_DATA_PTR;
  15
  16/*
  17 * get_clocks() fills in gd->cpu_clock depending on CONFIG_8xx_GCLK_FREQ
  18 */
  19int get_clocks(void)
  20{
  21        immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
  22        uint sccr = in_be32(&immap->im_clkrst.car_sccr);
  23        uint divider = 1 << (((sccr & SCCR_DFBRG11) >> 11) * 2);
  24
  25        /*
  26         * If for some reason measuring the gclk frequency won't
  27         * work, we return the hardwired value.
  28         * (For example, the cogent CMA286-60 CPU module has no
  29         * separate oscillator for PITRTCLK)
  30         */
  31        gd->cpu_clk = CONFIG_8xx_GCLK_FREQ;
  32
  33        if ((sccr & SCCR_EBDF11) == 0) {
  34                /* No Bus Divider active */
  35                gd->bus_clk = gd->cpu_clk;
  36        } else {
  37                /* The MPC8xx has only one BDF: half clock speed */
  38                gd->bus_clk = gd->cpu_clk / 2;
  39        }
  40
  41        gd->arch.brg_clk = gd->cpu_clk / divider;
  42
  43        return 0;
  44}
  45