LXR uboot/arch/x86/cpu/broadwell/cpu.c

   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * Copyright (c) 2016 Google, Inc
   4 *
   5 * Based on code from coreboot src/soc/intel/broadwell/cpu.c
   6 */
   7
   8#include <common.h>
   9#include <dm.h>
  10#include <cpu.h>
  11#include <init.h>
  12#include <log.h>
  13#include <asm/cpu.h>
  14#include <asm/cpu_x86.h>
  15#include <asm/cpu_common.h>
  16#include <asm/global_data.h>
  17#include <asm/intel_regs.h>
  18#include <asm/lpc_common.h>
  19#include <asm/msr.h>
  20#include <asm/pci.h>
  21#include <asm/post.h>
  22#include <asm/turbo.h>
  23#include <asm/arch/cpu.h>
  24#include <asm/arch/pch.h>
  25#include <asm/arch/rcb.h>
  26
  27int arch_cpu_init_dm(void)
  28{
  29        struct udevice *dev;
  30        int ret;
  31
  32        /* Start up the LPC so we have serial */
  33        ret = uclass_first_device(UCLASS_LPC, &dev);
  34        if (ret)
  35                return ret;
  36        if (!dev)
  37                return -ENODEV;
  38        ret = cpu_set_flex_ratio_to_tdp_nominal();
  39        if (ret)
  40                return ret;
  41
  42        return 0;
  43}
  44
  45void set_max_freq(void)
  46{
  47        msr_t msr, perf_ctl;
  48
  49        if (cpu_config_tdp_levels()) {
  50                /* Set to nominal TDP ratio */
  51                msr = msr_read(MSR_CONFIG_TDP_NOMINAL);
  52                perf_ctl.lo = (msr.lo & 0xff) << 8;
  53        } else {
  54                /* Platform Info bits 15:8 give max ratio */
  55                msr = msr_read(MSR_PLATFORM_INFO);
  56                perf_ctl.lo = msr.lo & 0xff00;
  57        }
  58
  59        perf_ctl.hi = 0;
  60        msr_write(MSR_IA32_PERF_CTL, perf_ctl);
  61
  62        debug("CPU: frequency set to %d MHz\n",
  63              ((perf_ctl.lo >> 8) & 0xff) * INTEL_BCLK_MHZ);
  64}
  65
  66int arch_cpu_init(void)
  67{
  68        post_code(POST_CPU_INIT);
  69
  70#ifdef CONFIG_TPL
  71        /* Do a mini-init if TPL has already done the full init */
  72        return x86_cpu_reinit_f();
  73#else
  74        return x86_cpu_init_f();
  75#endif
  76}
  77
  78int checkcpu(void)
  79{
  80        int ret;
  81
  82        set_max_freq();
  83
  84        ret = cpu_common_init();
  85        if (ret)
  86                return ret;
  87        gd->arch.pei_boot_mode = PEI_BOOT_NONE;
  88
  89        return 0;
  90}
  91
  92int print_cpuinfo(void)
  93{
  94        char processor_name[CPU_MAX_NAME_LEN];
  95        const char *name;
  96
  97        /* Print processor name */
  98        name = cpu_get_name(processor_name);
  99        printf("CPU:   %s\n", name);
 100
 101        return 0;
 102}
 103
 104void board_debug_uart_init(void)
 105{
 106        /* com1 / com2 decode range */
 107        pci_x86_write_config(PCH_DEV_LPC, LPC_IO_DEC, 1 << 4, PCI_SIZE_16);
 108
 109        pci_x86_write_config(PCH_DEV_LPC, LPC_EN, COMA_LPC_EN, PCI_SIZE_16);
 110}
 111