uboot/board/BuS/eb_cpu5282/eb_cpu5282.c
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   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * (C) Copyright 2005-2009
   4 * BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
   5 *
   6 * (C) Copyright 2000-2003
   7 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   8 */
   9
  10#include <common.h>
  11#include <command.h>
  12#include <asm/global_data.h>
  13#include "asm/m5282.h"
  14#include <bmp_layout.h>
  15#include <env.h>
  16#include <init.h>
  17#include <status_led.h>
  18#include <bus_vcxk.h>
  19
  20/*---------------------------------------------------------------------------*/
  21
  22DECLARE_GLOBAL_DATA_PTR;
  23
  24#if IS_ENABLED(CONFIG_VIDEO_VCXK)
  25extern unsigned long display_width;
  26extern unsigned long display_height;
  27#endif
  28
  29/*---------------------------------------------------------------------------*/
  30
  31int checkboard (void)
  32{
  33        puts("Board: EB+CPU5282 (BuS Elektronik GmbH & Co. KG)\n");
  34#if (CONFIG_SYS_TEXT_BASE ==  CONFIG_SYS_INT_FLASH_BASE)
  35        puts("       Boot from Internal FLASH\n");
  36#endif
  37        return 0;
  38}
  39
  40int dram_init(void)
  41{
  42        int size, i;
  43
  44        size = 0;
  45        MCFSDRAMC_DCR = MCFSDRAMC_DCR_RTIM_6 |
  46                        MCFSDRAMC_DCR_RC((15 * CONFIG_SYS_CLK / 1000000) >> 4);
  47        asm (" nop");
  48#ifdef CONFIG_SYS_SDRAM_BASE0
  49        MCFSDRAMC_DACR0 = MCFSDRAMC_DACR_BASE(CONFIG_SYS_SDRAM_BASE0)|
  50                MCFSDRAMC_DACR_CASL(1) | MCFSDRAMC_DACR_CBM(3) |
  51                MCFSDRAMC_DACR_PS_32;
  52        asm (" nop");
  53
  54        MCFSDRAMC_DMR0 = MCFSDRAMC_DMR_BAM_16M | MCFSDRAMC_DMR_V;
  55        asm (" nop");
  56
  57        MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_IP;
  58        asm (" nop");
  59        for (i = 0; i < 10; i++)
  60                asm (" nop");
  61
  62        *(unsigned long *)(CONFIG_SYS_SDRAM_BASE0) = 0xA5A5A5A5;
  63        asm (" nop");
  64        MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_RE;
  65        asm (" nop");
  66
  67        for (i = 0; i < 2000; i++)
  68                asm (" nop");
  69
  70        MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_IMRS;
  71        asm (" nop");
  72        /* write SDRAM mode register */
  73        *(unsigned long *)(CONFIG_SYS_SDRAM_BASE0 + 0x80440) = 0xA5A5A5A5;
  74        asm (" nop");
  75        size += CONFIG_SYS_SDRAM_SIZE0 * 1024 * 1024;
  76#endif
  77#ifdef CONFIG_SYS_SDRAM_BASE1xx
  78        MCFSDRAMC_DACR1 = MCFSDRAMC_DACR_BASE (CONFIG_SYS_SDRAM_BASE1)
  79                        | MCFSDRAMC_DACR_CASL (1)
  80                        | MCFSDRAMC_DACR_CBM (3)
  81                        | MCFSDRAMC_DACR_PS_16;
  82
  83        MCFSDRAMC_DMR1 = MCFSDRAMC_DMR_BAM_16M | MCFSDRAMC_DMR_V;
  84
  85        MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IP;
  86
  87        *(unsigned short *) (CONFIG_SYS_SDRAM_BASE1) = 0xA5A5;
  88        MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_RE;
  89
  90        for (i = 0; i < 2000; i++)
  91                asm (" nop");
  92
  93        MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IMRS;
  94        *(unsigned int *) (CONFIG_SYS_SDRAM_BASE1 + 0x220) = 0xA5A5;
  95        size += CONFIG_SYS_SDRAM_SIZE1 * 1024 * 1024;
  96#endif
  97        gd->ram_size = size;
  98
  99        return 0;
 100}
 101
 102#if defined(CONFIG_SYS_DRAM_TEST)
 103int testdram(void)
 104{
 105        uint *pstart = (uint *) CONFIG_SYS_MEMTEST_START;
 106        uint *pend = (uint *) CONFIG_SYS_MEMTEST_END;
 107        uint *p;
 108
 109        printf("SDRAM test phase 1:\n");
 110        for (p = pstart; p < pend; p++)
 111                *p = 0xaaaaaaaa;
 112
 113        for (p = pstart; p < pend; p++) {
 114                if (*p != 0xaaaaaaaa) {
 115                        printf ("SDRAM test fails at: %08x\n", (uint) p);
 116                        return 1;
 117                }
 118        }
 119
 120        printf("SDRAM test phase 2:\n");
 121        for (p = pstart; p < pend; p++)
 122                *p = 0x55555555;
 123
 124        for (p = pstart; p < pend; p++) {
 125                if (*p != 0x55555555) {
 126                        printf ("SDRAM test fails at: %08x\n", (uint) p);
 127                        return 1;
 128                }
 129        }
 130
 131        printf("SDRAM test passed.\n");
 132        return 0;
 133}
 134#endif
 135
 136#if defined(CONFIG_HW_WATCHDOG)
 137
 138void hw_watchdog_init(void)
 139{
 140        char *s;
 141        int enable;
 142
 143        enable = 1;
 144        s = env_get("watchdog");
 145        if (s != NULL)
 146                if ((strncmp(s, "off", 3) == 0) || (strncmp(s, "0", 1) == 0))
 147                        enable = 0;
 148        if (enable)
 149                MCFGPTA_GPTDDR  |= (1<<2);
 150        else
 151                MCFGPTA_GPTDDR  &= ~(1<<2);
 152}
 153
 154void hw_watchdog_reset(void)
 155{
 156        MCFGPTA_GPTPORT  ^= (1<<2);
 157}
 158#endif
 159
 160int misc_init_r(void)
 161{
 162#ifdef  CONFIG_HW_WATCHDOG
 163        hw_watchdog_init();
 164#endif
 165        return 1;
 166}
 167
 168void __led_toggle(led_id_t mask)
 169{
 170        MCFGPTA_GPTPORT ^= (1 << 3);
 171}
 172
 173void __led_init(led_id_t mask, int state)
 174{
 175        __led_set(mask, state);
 176        MCFGPTA_GPTDDR  |= (1 << 3);
 177}
 178
 179void __led_set(led_id_t mask, int state)
 180{
 181        if (state == CONFIG_LED_STATUS_ON)
 182                MCFGPTA_GPTPORT |= (1 << 3);
 183        else
 184                MCFGPTA_GPTPORT &= ~(1 << 3);
 185}
 186
 187#if IS_ENABLED(CONFIG_VIDEO_VCXK)
 188int drv_video_init(void)
 189{
 190        char *s;
 191#ifdef CONFIG_SPLASH_SCREEN
 192        unsigned long splash;
 193#endif
 194        printf("Init Video as ");
 195        s = env_get("displaywidth");
 196        if (s != NULL)
 197                display_width = dectoul(s, NULL);
 198        else
 199                display_width = 256;
 200
 201        s = env_get("displayheight");
 202        if (s != NULL)
 203                display_height = dectoul(s, NULL);
 204        else
 205                display_height = 256;
 206
 207        printf("%lu x %lu pixel matrix\n", display_width, display_height);
 208
 209        MCFCCM_CCR &= ~MCFCCM_CCR_SZEN;
 210        MCFGPIO_PEPAR &= ~MCFGPIO_PEPAR_PEPA2;
 211
 212        vcxk_init(display_width, display_height);
 213
 214#ifdef CONFIG_SPLASH_SCREEN
 215        s = env_get("splashimage");
 216        if (s != NULL) {
 217                splash = hextoul(s, NULL);
 218                vcxk_acknowledge_wait();
 219                video_display_bitmap(splash, 0, 0);
 220        }
 221#endif
 222        return 0;
 223}
 224#endif
 225
 226/*---------------------------------------------------------------------------*/
 227
 228#if IS_ENABLED(CONFIG_VIDEO_VCXK)
 229int do_brightness(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 230{
 231        int rcode = 0;
 232        ulong side;
 233        ulong bright;
 234
 235        switch (argc) {
 236        case 3:
 237                side = dectoul(argv[1], NULL);
 238                bright = dectoul(argv[2], NULL);
 239                if ((side >= 0) && (side <= 3) &&
 240                        (bright >= 0) && (bright <= 1000)) {
 241                        vcxk_setbrightness(side, bright);
 242                        rcode = 0;
 243                } else {
 244                        printf("parameters out of range\n");
 245                        printf("Usage:\n%s\n", cmdtp->usage);
 246                        rcode = 1;
 247                }
 248                break;
 249        default:
 250                printf("Usage:\n%s\n", cmdtp->usage);
 251                rcode = 1;
 252                break;
 253        }
 254        return rcode;
 255}
 256
 257/*---------------------------------------------------------------------------*/
 258
 259U_BOOT_CMD(
 260        bright, 3,      0,      do_brightness,
 261        "sets the display brightness\n",
 262        " <side> <0..1000>\n        side: 0/3=both; 1=first; 2=second\n"
 263);
 264
 265#endif
 266
 267/* EOF EB+MCF-EV123.c */
 268