LXR uboot/board/compulab/common/omap3

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * (C) Copyright 2014 CompuLab, Ltd. <www.compulab.co.il>
   4 *
   5 * Authors: Igor Grinberg <grinberg@compulab.co.il>
   6 */
   7
   8#include <common.h>
   9#include <netdev.h>
  10#include <linux/delay.h>
  11
  12#include <asm/io.h>
  13#include <linux/errno.h>
  14#include <asm/arch/cpu.h>
  15#include <asm/arch/mem.h>
  16#include <asm/arch/sys_proto.h>
  17#include <asm/gpio.h>
  18
  19#include "common.h"
  20
  21static u32 cl_omap3_smc911x_gpmc_net_config[GPMC_MAX_REG] = {
  22        NET_GPMC_CONFIG1,
  23        NET_GPMC_CONFIG2,
  24        NET_GPMC_CONFIG3,
  25        NET_GPMC_CONFIG4,
  26        NET_GPMC_CONFIG5,
  27        NET_GPMC_CONFIG6,
  28        0
  29};
  30
  31static void cl_omap3_smc911x_setup_net_chip_gmpc(int cs, u32 base_addr)
  32{
  33        struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
  34
  35        enable_gpmc_cs_config(cl_omap3_smc911x_gpmc_net_config,
  36                              &gpmc_cfg->cs[cs], base_addr, GPMC_SIZE_16M);
  37
  38        /* Enable off mode for NWE in PADCONF_GPMC_NWE register */
  39        writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
  40
  41        /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
  42        writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
  43
  44        /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
  45        writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
  46               &ctrl_base->gpmc_nadv_ale);
  47}
  48
  49#ifdef CONFIG_OMAP_GPIO
  50static int cl_omap3_smc911x_reset_net_chip(int gpio)
  51{
  52        int err;
  53
  54        if (!gpio_is_valid(gpio))
  55                return -EINVAL;
  56
  57        err = gpio_request(gpio, "eth rst");
  58        if (err)
  59                return err;
  60
  61        /* Set gpio as output and send a pulse */
  62        gpio_direction_output(gpio, 1);
  63        udelay(1);
  64        gpio_set_value(gpio, 0);
  65        mdelay(40);
  66        gpio_set_value(gpio, 1);
  67        mdelay(1);
  68
  69        return 0;
  70}
  71#else /* !CONFIG_OMAP_GPIO */
  72static inline int cl_omap3_smc911x_reset_net_chip(int gpio) { return 0; }
  73#endif /* CONFIG_OMAP_GPIO */
  74
  75int cl_omap3_smc911x_init(int id, int cs, u32 base_addr,
  76                          int (*reset)(int), int rst_gpio)
  77{
  78        int ret;
  79
  80        cl_omap3_smc911x_setup_net_chip_gmpc(cs, base_addr);
  81
  82        if (reset)
  83                reset(rst_gpio);
  84        else
  85                cl_omap3_smc911x_reset_net_chip(rst_gpio);
  86
  87        ret = smc911x_initialize(id, base_addr);
  88        if (ret > 0)
  89                return ret;
  90
  91        printf("Failed initializing SMC911x! ");
  92        return 0;
  93}
  94