LXR uboot/board/davinci/da8xxevm/omapl138

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
   4 *
   5 * Based on da850evm.c. Original Copyrights follow:
   6 *
   7 * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
   8 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
   9 */
  10
  11#include <common.h>
  12#include <env.h>
  13#include <i2c.h>
  14#include <init.h>
  15#include <net.h>
  16#include <asm/arch/hardware.h>
  17#include <asm/global_data.h>
  18#include <asm/ti-common/davinci_nand.h>
  19#include <asm/io.h>
  20#include <ns16550.h>
  21#include <dm/platdata.h>
  22#include <linux/errno.h>
  23#include <asm/mach-types.h>
  24#include <asm/arch/davinci_misc.h>
  25#ifdef CONFIG_MMC_DAVINCI
  26#include <mmc.h>
  27#include <asm/arch/sdmmc_defs.h>
  28#endif
  29
  30DECLARE_GLOBAL_DATA_PTR;
  31
  32#define pinmux(x)       (&davinci_syscfg_regs->pinmux[x])
  33
  34#ifdef CONFIG_MMC_DAVINCI
  35/* MMC0 pin muxer settings */
  36const struct pinmux_config mmc0_pins[] = {
  37        /* GP0[11] is required for SD to work on Rev 3 EVMs */
  38        { pinmux(0),  8, 4 },   /* GP0[11] */
  39        { pinmux(10), 2, 0 },   /* MMCSD0_CLK */
  40        { pinmux(10), 2, 1 },   /* MMCSD0_CMD */
  41        { pinmux(10), 2, 2 },   /* MMCSD0_DAT_0 */
  42        { pinmux(10), 2, 3 },   /* MMCSD0_DAT_1 */
  43        { pinmux(10), 2, 4 },   /* MMCSD0_DAT_2 */
  44        { pinmux(10), 2, 5 },   /* MMCSD0_DAT_3 */
  45        /* LCDK supports only 4-bit mode, remaining pins are not configured */
  46};
  47#endif
  48
  49/* UART pin muxer settings */
  50static const struct pinmux_config uart_pins[] = {
  51        { pinmux(0), 4, 6 },
  52        { pinmux(0), 4, 7 },
  53        { pinmux(4), 2, 4 },
  54        { pinmux(4), 2, 5 }
  55};
  56
  57#ifdef CONFIG_DRIVER_TI_EMAC
  58static const struct pinmux_config emac_pins[] = {
  59        { pinmux(2), 8, 1 },
  60        { pinmux(2), 8, 2 },
  61        { pinmux(2), 8, 3 },
  62        { pinmux(2), 8, 4 },
  63        { pinmux(2), 8, 5 },
  64        { pinmux(2), 8, 6 },
  65        { pinmux(2), 8, 7 },
  66        { pinmux(3), 8, 0 },
  67        { pinmux(3), 8, 1 },
  68        { pinmux(3), 8, 2 },
  69        { pinmux(3), 8, 3 },
  70        { pinmux(3), 8, 4 },
  71        { pinmux(3), 8, 5 },
  72        { pinmux(3), 8, 6 },
  73        { pinmux(3), 8, 7 },
  74        { pinmux(4), 8, 0 },
  75        { pinmux(4), 8, 1 }
  76};
  77#endif /* CONFIG_DRIVER_TI_EMAC */
  78
  79/* I2C pin muxer settings */
  80static const struct pinmux_config i2c_pins[] = {
  81        { pinmux(4), 2, 2 },
  82        { pinmux(4), 2, 3 }
  83};
  84
  85#ifdef CONFIG_NAND_DAVINCI
  86const struct pinmux_config nand_pins[] = {
  87        { pinmux(7), 1, 1 },
  88        { pinmux(7), 1, 2 },
  89        { pinmux(7), 1, 4 },
  90        { pinmux(7), 1, 5 },
  91        { pinmux(8), 1, 0 },
  92        { pinmux(8), 1, 1 },
  93        { pinmux(8), 1, 2 },
  94        { pinmux(8), 1, 3 },
  95        { pinmux(8), 1, 4 },
  96        { pinmux(8), 1, 5 },
  97        { pinmux(8), 1, 6 },
  98        { pinmux(8), 1, 7 },
  99        { pinmux(9), 1, 0 },
 100        { pinmux(9), 1, 1 },
 101        { pinmux(9), 1, 2 },
 102        { pinmux(9), 1, 3 },
 103        { pinmux(9), 1, 4 },
 104        { pinmux(9), 1, 5 },
 105        { pinmux(9), 1, 6 },
 106        { pinmux(9), 1, 7 },
 107        { pinmux(12), 1, 5 },
 108        { pinmux(12), 1, 6 }
 109};
 110
 111#endif
 112
 113#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
 114#define HAS_RMII 1
 115#else
 116#define HAS_RMII 0
 117#endif
 118
 119const struct pinmux_resource pinmuxes[] = {
 120        PINMUX_ITEM(uart_pins),
 121        PINMUX_ITEM(i2c_pins),
 122#ifdef CONFIG_NAND_DAVINCI
 123        PINMUX_ITEM(nand_pins),
 124#endif
 125};
 126
 127const int pinmuxes_size = ARRAY_SIZE(pinmuxes);
 128
 129const struct lpsc_resource lpsc[] = {
 130        { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
 131        { DAVINCI_LPSC_SPI1 },  /* Serial Flash */
 132        { DAVINCI_LPSC_EMAC },  /* image download */
 133        { DAVINCI_LPSC_UART2 }, /* console */
 134        { DAVINCI_LPSC_GPIO },
 135#ifdef CONFIG_MMC_DAVINCI
 136        { DAVINCI_LPSC_MMC_SD },
 137#endif
 138};
 139
 140const int lpsc_size = ARRAY_SIZE(lpsc);
 141
 142#ifndef CONFIG_DA850_EVM_MAX_CPU_CLK
 143#define CONFIG_DA850_EVM_MAX_CPU_CLK    456000000
 144#endif
 145
 146int board_early_init_f(void)
 147{
 148        /*
 149         * Power on required peripherals
 150         * ARM does not have access by default to PSC0 and PSC1
 151         * assuming here that the DSP bootloader has set the IOPU
 152         * such that PSC access is available to ARM
 153         */
 154        if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
 155                return 1;
 156
 157        return 0;
 158}
 159
 160int board_init(void)
 161{
 162        irq_init();
 163
 164        /* arch number of the board */
 165        gd->bd->bi_arch_number = MACH_TYPE_OMAPL138_LCDK;
 166
 167        /* address of boot parameters */
 168        gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
 169
 170
 171        /* setup the SUSPSRC for ARM to control emulation suspend */
 172        writel(readl(&davinci_syscfg_regs->suspsrc) &
 173               ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
 174                 DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
 175                 DAVINCI_SYSCFG_SUSPSRC_UART2),
 176               &davinci_syscfg_regs->suspsrc);
 177
 178        /* configure pinmux settings */
 179        if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
 180                return 1;
 181
 182#ifdef CONFIG_NAND_DAVINCI
 183        /*
 184         * NAND CS setup - cycle counts based on da850evm NAND timings in the
 185         * Linux kernel @ 25MHz EMIFA
 186         */
 187        writel((DAVINCI_ABCR_WSETUP(15) |
 188                DAVINCI_ABCR_WSTROBE(63) |
 189                DAVINCI_ABCR_WHOLD(7) |
 190                DAVINCI_ABCR_RSETUP(15) |
 191                DAVINCI_ABCR_RSTROBE(63) |
 192                DAVINCI_ABCR_RHOLD(7) |
 193                DAVINCI_ABCR_TA(3) |
 194                DAVINCI_ABCR_ASIZE_16BIT),
 195               &davinci_emif_regs->ab2cr); /* CS3 */
 196#endif
 197
 198
 199#ifdef CONFIG_MMC_DAVINCI
 200        if (davinci_configure_pin_mux(mmc0_pins, ARRAY_SIZE(mmc0_pins)) != 0)
 201                return 1;
 202#endif
 203
 204#ifdef CONFIG_DRIVER_TI_EMAC
 205        if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0)
 206                return 1;
 207        davinci_emac_mii_mode_sel(HAS_RMII);
 208#endif /* CONFIG_DRIVER_TI_EMAC */
 209
 210        /* enable the console UART */
 211        writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
 212                DAVINCI_UART_PWREMU_MGMT_UTRST),
 213               &davinci_uart2_ctrl_regs->pwremu_mgmt);
 214
 215        return 0;
 216}
 217
 218#define CFG_MAC_ADDR_SPI_BUS    0
 219#define CFG_MAC_ADDR_SPI_CS     0
 220#define CFG_MAC_ADDR_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
 221#define CFG_MAC_ADDR_SPI_MODE   SPI_MODE_3
 222
 223#define CFG_MAC_ADDR_OFFSET     (flash->size - SZ_64K)
 224
 225void dsp_lpsc_on(unsigned domain, unsigned int id)
 226{
 227        dv_reg_p mdstat, mdctl, ptstat, ptcmd;
 228        struct davinci_psc_regs *psc_regs;
 229
 230        psc_regs = davinci_psc0_regs;
 231        mdstat = &psc_regs->psc0.mdstat[id];
 232        mdctl = &psc_regs->psc0.mdctl[id];
 233        ptstat = &psc_regs->ptstat;
 234        ptcmd = &psc_regs->ptcmd;
 235
 236        while (*ptstat & (0x1 << domain))
 237                ;
 238
 239        if ((*mdstat & 0x1f) == 0x03)
 240                return;                 /* Already on and enabled */
 241
 242        *mdctl |= 0x03;
 243
 244        *ptcmd = 0x1 << domain;
 245
 246        while (*ptstat & (0x1 << domain))
 247                ;
 248        while ((*mdstat & 0x1f) != 0x03)
 249                ;               /* Probably an overkill... */
 250}
 251
 252static void dspwake(void)
 253{
 254        unsigned *resetvect = (unsigned *)DAVINCI_L3CBARAM_BASE;
 255
 256        /* if the device is ARM only, return */
 257        if ((REG(CHIP_REV_ID_REG) & 0x3f) == 0x10)
 258                return;
 259
 260        if (!strcmp(env_get("dspwake"), "no"))
 261                return;
 262
 263        *resetvect++ = 0x1E000; /* DSP Idle */
 264        /* clear out the next 10 words as NOP */
 265        memset(resetvect, 0, sizeof(unsigned) * 10);
 266
 267        /* setup the DSP reset vector */
 268        REG(HOST1CFG) = DAVINCI_L3CBARAM_BASE;
 269
 270        dsp_lpsc_on(1, DAVINCI_LPSC_GEM);
 271        REG(PSC0_MDCTL + (15 * 4)) |= 0x100;
 272}
 273
 274#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
 275/**
 276 * rmii_hw_init
 277 *
 278 */
 279int rmii_hw_init(void)
 280{
 281        return 0;
 282}
 283#endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */
 284
 285int misc_init_r(void)
 286{
 287#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
 288        /* Select RMII fucntion through the expander */
 289        if (rmii_hw_init())
 290                printf("RMII hardware init failed!!!\n");
 291#endif
 292
 293        dspwake();
 294
 295        return 0;
 296}
 297
 298#if !CONFIG_IS_ENABLED(DM_MMC)
 299#ifdef CONFIG_MMC_DAVINCI
 300static struct davinci_mmc mmc_sd0 = {
 301        .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
 302        .host_caps = MMC_MODE_4BIT,     /* DA850 supports only 4-bit SD/MMC */
 303        .voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
 304};
 305
 306int board_mmc_init(struct bd_info *bis)
 307{
 308        mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID);
 309
 310        /* Add slot-0 to mmc subsystem */
 311        return davinci_mmc_init(bis, &mmc_sd0);
 312}
 313#endif
 314#endif
 315
 316#ifdef CONFIG_SPL_BUILD
 317static const struct ns16550_plat serial_pdata = {
 318        .base = DAVINCI_UART2_BASE,
 319        .reg_shift = 2,
 320        .clock = 228000000,
 321        .fcr = UART_FCR_DEFVAL,
 322};
 323
 324U_BOOT_DRVINFO(omapl138_uart) = {
 325        .name = "ns16550_serial",
 326        .plat = &serial_pdata,
 327};
 328
 329static const struct davinci_mmc_plat mmc_plat = {
 330        .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
 331        .cfg = {
 332                .f_min = 200000,
 333                .f_max = 25000000,
 334                .voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
 335                .host_caps = MMC_MODE_4BIT,
 336                .b_max = DAVINCI_MAX_BLOCKS,
 337                .name = "da830-mmc",
 338        },
 339};
 340U_BOOT_DRVINFO(omapl138_mmc) = {
 341        .name = "ti_da830_mmc",
 342        .plat = &mmc_plat,
 343};
 344
 345void spl_board_init(void)
 346{
 347        davinci_configure_pin_mux(mmc0_pins, ARRAY_SIZE(mmc0_pins));
 348}
 349#endif
 350