LXR uboot/board/freescale/p1_p2_rdb

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright 2013 Freescale Semiconductor, Inc.
   4 */
   5
   6#include <common.h>
   7#include <clock_legacy.h>
   8#include <console.h>
   9#include <env.h>
  10#include <env_internal.h>
  11#include <init.h>
  12#include <ns16550.h>
  13#include <malloc.h>
  14#include <mmc.h>
  15#include <nand.h>
  16#include <i2c.h>
  17#include <fsl_esdhc.h>
  18#include <spi_flash.h>
  19#include <asm/global_data.h>
  20#include "../common/spl.h"
  21
  22DECLARE_GLOBAL_DATA_PTR;
  23
  24phys_size_t get_effective_memsize(void)
  25{
  26        return CONFIG_SYS_L2_SIZE;
  27}
  28
  29void board_init_f(ulong bootflag)
  30{
  31        u32 plat_ratio, bus_clk;
  32        ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
  33
  34        console_init_f();
  35
  36        /* Set pmuxcr to allow both i2c1 and i2c2 */
  37        setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000);
  38        setbits_be32(&gur->pmuxcr,
  39                     in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA);
  40
  41        /* Read back the register to synchronize the write. */
  42        in_be32(&gur->pmuxcr);
  43
  44#ifdef CONFIG_SPL_SPI_BOOT
  45        clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA);
  46#endif
  47
  48        /* initialize selected port with appropriate baud rate */
  49        plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
  50        plat_ratio >>= 1;
  51        bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
  52        gd->bus_clk = bus_clk;
  53
  54        ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1,
  55                     bus_clk / 16 / CONFIG_BAUDRATE);
  56#ifdef CONFIG_SPL_MMC_BOOT
  57        puts("\nSD boot...\n");
  58#elif defined(CONFIG_SPL_SPI_BOOT)
  59        puts("\nSPI Flash boot...\n");
  60#endif
  61
  62        /* copy code to RAM and jump to it - this should not return */
  63        /* NOTE - code has to be copied out of NAND buffer before
  64         * other blocks can be read.
  65         */
  66        relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE);
  67}
  68
  69void board_init_r(gd_t *gd, ulong dest_addr)
  70{
  71        /* Pointer is writable since we allocated a register for it */
  72        gd = (gd_t *)CONFIG_SPL_GD_ADDR;
  73        struct bd_info *bd;
  74
  75        memset(gd, 0, sizeof(gd_t));
  76        bd = (struct bd_info *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t));
  77        memset(bd, 0, sizeof(struct bd_info));
  78        gd->bd = bd;
  79
  80        arch_cpu_init();
  81        get_clocks();
  82        mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
  83                        CONFIG_SPL_RELOC_MALLOC_SIZE);
  84        gd->flags |= GD_FLG_FULL_MALLOC_INIT;
  85
  86#ifndef CONFIG_SPL_NAND_BOOT
  87        env_init();
  88#endif
  89#ifdef CONFIG_SPL_MMC_BOOT
  90        mmc_initialize(bd);
  91#endif
  92        /* relocate environment function pointers etc. */
  93#ifdef CONFIG_SPL_NAND_BOOT
  94        nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
  95                            (uchar *)SPL_ENV_ADDR);
  96        gd->env_addr  = (ulong)(SPL_ENV_ADDR);
  97        gd->env_valid = ENV_VALID;
  98#else
  99        env_relocate();
 100#endif
 101
 102#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
 103        i2c_init_all();
 104#else
 105        i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 106#endif
 107
 108        dram_init();
 109#ifdef CONFIG_SPL_NAND_BOOT
 110        puts("Tertiary program loader running in sram...");
 111#else
 112        puts("Second program loader running in sram...\n");
 113#endif
 114
 115#ifdef CONFIG_SPL_MMC_BOOT
 116        mmc_boot();
 117#elif defined(CONFIG_SPL_SPI_BOOT)
 118        fsl_spi_boot();
 119#elif defined(CONFIG_SPL_NAND_BOOT)
 120        nand_boot();
 121#endif
 122}
 123