LXR uboot/board/freescale/t102xrdb/cpld.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/**
   3 * Copyright 2014 Freescale Semiconductor
   4 *
   5 * Freescale T1024RDB board-specific CPLD controlling supports.
   6 *
   7 * The following macros need to be defined:
   8 */
   9
  10#include <common.h>
  11#include <command.h>
  12#include <asm/io.h>
  13#include "cpld.h"
  14
  15u8 cpld_read(unsigned int reg)
  16{
  17        void *p = (void *)CONFIG_SYS_CPLD_BASE;
  18
  19        return in_8(p + reg);
  20}
  21
  22void cpld_write(unsigned int reg, u8 value)
  23{
  24        void *p = (void *)CONFIG_SYS_CPLD_BASE;
  25
  26        out_8(p + reg, value);
  27}
  28
  29/**
  30 * Set the boot bank to the alternate bank
  31 */
  32void cpld_set_altbank(void)
  33{
  34        u8 reg = CPLD_READ(flash_csr);
  35
  36        reg = (reg & ~CPLD_BANK_SEL_MASK) | CPLD_LBMAP_ALTBANK;
  37
  38        CPLD_WRITE(flash_csr, reg);
  39        CPLD_WRITE(reset_ctl1, CPLD_LBMAP_RESET);
  40}
  41
  42/**
  43 * Set the boot bank to the default bank
  44 */
  45void cpld_set_defbank(void)
  46{
  47        u8 reg = CPLD_READ(flash_csr);
  48
  49        reg = (reg & ~CPLD_BANK_SEL_MASK) | CPLD_LBMAP_DFLTBANK;
  50
  51        CPLD_WRITE(flash_csr, reg);
  52        CPLD_WRITE(reset_ctl1, CPLD_LBMAP_RESET);
  53}
  54
  55static void cpld_dump_regs(void)
  56{
  57        printf("cpld_ver         = 0x%02x\n", CPLD_READ(cpld_ver));
  58        printf("cpld_ver_sub     = 0x%02x\n", CPLD_READ(cpld_ver_sub));
  59        printf("hw_ver           = 0x%02x\n", CPLD_READ(hw_ver));
  60        printf("sw_ver           = 0x%02x\n", CPLD_READ(sw_ver));
  61        printf("reset_ctl1       = 0x%02x\n", CPLD_READ(reset_ctl1));
  62        printf("reset_ctl2       = 0x%02x\n", CPLD_READ(reset_ctl2));
  63        printf("int_status       = 0x%02x\n", CPLD_READ(int_status));
  64        printf("flash_csr        = 0x%02x\n", CPLD_READ(flash_csr));
  65        printf("fan_ctl_status   = 0x%02x\n", CPLD_READ(fan_ctl_status));
  66        printf("led_ctl_status   = 0x%02x\n", CPLD_READ(led_ctl_status));
  67        printf("sfp_ctl_status   = 0x%02x\n", CPLD_READ(sfp_ctl_status));
  68        printf("misc_ctl_status  = 0x%02x\n", CPLD_READ(misc_ctl_status));
  69        printf("boot_override    = 0x%02x\n", CPLD_READ(boot_override));
  70        printf("boot_config1     = 0x%02x\n", CPLD_READ(boot_config1));
  71        printf("boot_config2     = 0x%02x\n", CPLD_READ(boot_config2));
  72        putc('\n');
  73}
  74
  75int do_cpld(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
  76{
  77        int rc = 0;
  78
  79        if (argc <= 1)
  80                return cmd_usage(cmdtp);
  81
  82        if (strcmp(argv[1], "reset") == 0) {
  83                if (strcmp(argv[2], "altbank") == 0)
  84                        cpld_set_altbank();
  85                else
  86                        cpld_set_defbank();
  87        } else if (strcmp(argv[1], "dump") == 0) {
  88                cpld_dump_regs();
  89        } else {
  90                rc = cmd_usage(cmdtp);
  91        }
  92
  93        return rc;
  94}
  95
  96U_BOOT_CMD(
  97        cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
  98        "Reset the board or alternate bank",
  99        "reset - hard reset to default bank\n"
 100        "cpld reset altbank - reset to alternate bank\n"
 101        "cpld dump - display the CPLD registers\n"
 102        );
 103