uboot/board/kontron/sl-mx6ul/sl-mx6ul.c
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   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright (C) 2018 Kontron Electronics GmbH
   4 */
   5
   6#include <asm/arch/clock.h>
   7#include <asm/arch/sys_proto.h>
   8#include <asm/global_data.h>
   9#include <fdt_support.h>
  10#include <phy.h>
  11
  12DECLARE_GLOBAL_DATA_PTR;
  13
  14int dram_init(void)
  15{
  16        gd->ram_size = imx_ddr_size();
  17
  18        return 0;
  19}
  20
  21int ft_board_setup(void *blob, struct bd_info *bd)
  22{
  23        /*
  24         * Overwrite the memory size in the devicetree that is
  25         * passed to the kernel with the actual size detected.
  26         */
  27        return fdt_fixup_memory(blob, PHYS_SDRAM, gd->ram_size);
  28}
  29
  30static int setup_fec(void)
  31{
  32        struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
  33        int ret;
  34
  35        /*
  36         * Use 50M anatop loopback REF_CLK1 for ENET1,
  37         * clear gpr1[13], set gpr1[17].
  38         */
  39        clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC1_MASK,
  40                        IOMUX_GPR1_FEC1_CLOCK_MUX1_SEL_MASK);
  41
  42        /*
  43         * Use 50M anatop loopback REF_CLK2 for ENET2,
  44         * clear gpr1[14], set gpr1[18].
  45         */
  46        clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC2_MASK,
  47                        IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK);
  48
  49        ret = enable_fec_anatop_clock(0, ENET_50MHZ);
  50        if (ret)
  51                return ret;
  52
  53        ret = enable_fec_anatop_clock(1, ENET_50MHZ);
  54        if (ret)
  55                return ret;
  56
  57        return 0;
  58}
  59
  60int board_phy_config(struct phy_device *phydev)
  61{
  62        phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x8190);
  63
  64        if (phydev->drv->config)
  65                phydev->drv->config(phydev);
  66
  67        return 0;
  68}
  69
  70int board_early_init_f(void)
  71{
  72        enable_qspi_clk(0);
  73
  74        return 0;
  75}
  76
  77int board_init(void)
  78{
  79        /* Address of boot parameters */
  80        gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
  81
  82        setup_fec();
  83
  84        return 0;
  85}
  86