LXR uboot/board/samsung/common/sromc.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright 2021 Google LLC
   4 */
   5
   6#define LOG_CATEGORY    UCLASS_ETH
   7
   8#include <common.h>
   9#include <dm.h>
  10#include <log.h>
  11#include <asm/arch/pinmux.h>
  12#include <asm/arch/sromc.h>
  13
  14enum {
  15        FDT_SROM_PMC,
  16        FDT_SROM_TACP,
  17        FDT_SROM_TAH,
  18        FDT_SROM_TCOH,
  19        FDT_SROM_TACC,
  20        FDT_SROM_TCOS,
  21        FDT_SROM_TACS,
  22
  23        FDT_SROM_TIMING_COUNT,
  24};
  25
  26static int exyno5_sromc_probe(struct udevice *dev)
  27{
  28        u32 timing[FDT_SROM_TIMING_COUNT]; /* timing parameters */
  29        u32 smc_bw_conf, smc_bc_conf;
  30        int bank;       /* srom bank number */
  31        int width;      /* bus width in bytes */
  32        int ret;
  33
  34        if (!IS_ENABLED(CONFIG_SMC911X))
  35                return 0;
  36
  37        bank = dev_read_s32_default(dev, "bank", 0);
  38        width = dev_read_s32_default(dev, "width", 2);
  39
  40        /* Ethernet needs data bus width of 16 bits */
  41        if (width != 2) {
  42                log_debug("Unsupported bus width %d\n", width);
  43                return log_msg_ret("width", -EINVAL);
  44        }
  45        ret = dev_read_u32_array(dev, "srom-timing", timing,
  46                                 FDT_SROM_TIMING_COUNT);
  47        if (ret)
  48                return log_msg_ret("sromc", -EINVAL);
  49
  50        smc_bw_conf = SROMC_DATA16_WIDTH(bank) | SROMC_BYTE_ENABLE(bank);
  51        smc_bc_conf = SROMC_BC_TACS(timing[FDT_SROM_TACS])   |
  52                        SROMC_BC_TCOS(timing[FDT_SROM_TCOS]) |
  53                        SROMC_BC_TACC(timing[FDT_SROM_TACC]) |
  54                        SROMC_BC_TCOH(timing[FDT_SROM_TCOH]) |
  55                        SROMC_BC_TAH(timing[FDT_SROM_TAH])   |
  56                        SROMC_BC_TACP(timing[FDT_SROM_TACP]) |
  57                        SROMC_BC_PMC(timing[FDT_SROM_PMC]);
  58
  59        /* Select and configure the SROMC bank */
  60        exynos_pinmux_config(PERIPH_ID_SROMC, bank);
  61        s5p_config_sromc(bank, smc_bw_conf, smc_bc_conf);
  62
  63        return 0;
  64}
  65
  66static const struct udevice_id exyno5_sromc_ids[] = {
  67        { .compatible = "samsung,exynos5-sromc" },
  68        {}
  69};
  70
  71U_BOOT_DRIVER(exyno5_sromc) = {
  72        .name           = "exyno5_sromc",
  73        .id             = UCLASS_SIMPLE_BUS,
  74        .of_match       = exyno5_sromc_ids,
  75        .probe          = exyno5_sromc_probe,
  76};
  77