LXR uboot/board/ti/ks2_evm/board

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * K2E EVM : Board initialization
   4 *
   5 * (C) Copyright 2014
   6 *     Texas Instruments Incorporated, <www.ti.com>
   7 */
   8
   9#include <common.h>
  10#include <image.h>
  11#include <init.h>
  12#include <asm/arch/ddr3.h>
  13#include <asm/arch/hardware.h>
  14#include <asm/ti-common/keystone_net.h>
  15
  16unsigned int get_external_clk(u32 clk)
  17{
  18        unsigned int clk_freq;
  19
  20        switch (clk) {
  21        case sys_clk:
  22                clk_freq = 100000000;
  23                break;
  24        case alt_core_clk:
  25                clk_freq = 100000000;
  26                break;
  27        case pa_clk:
  28                clk_freq = 100000000;
  29                break;
  30        case ddr3a_clk:
  31                clk_freq = 100000000;
  32                break;
  33        default:
  34                clk_freq = 0;
  35                break;
  36        }
  37
  38        return clk_freq;
  39}
  40
  41static struct pll_init_data core_pll_config[NUM_SPDS] = {
  42        [SPD800]        = CORE_PLL_800,
  43        [SPD850]        = CORE_PLL_850,
  44        [SPD1000]       = CORE_PLL_1000,
  45        [SPD1250]       = CORE_PLL_1250,
  46        [SPD1350]       = CORE_PLL_1350,
  47        [SPD1400]       = CORE_PLL_1400,
  48        [SPD1500]       = CORE_PLL_1500,
  49};
  50
  51/* DEV and ARM speed definitions as specified in DEVSPEED register */
  52int speeds[DEVSPEED_NUMSPDS] = {
  53        SPD850,
  54        SPD1000,
  55        SPD1250,
  56        SPD1350,
  57        SPD1400,
  58        SPD1500,
  59        SPD1400,
  60        SPD1350,
  61        SPD1250,
  62        SPD1000,
  63        SPD850,
  64        SPD800,
  65};
  66
  67s16 divn_val[16] = {
  68        0, 0, 1, 4, 23, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
  69};
  70
  71static struct pll_init_data pa_pll_config =
  72        PASS_PLL_1000;
  73
  74struct pll_init_data *get_pll_init_data(int pll)
  75{
  76        int speed;
  77        struct pll_init_data *data;
  78
  79        switch (pll) {
  80        case MAIN_PLL:
  81                speed = get_max_dev_speed(speeds);
  82                data = &core_pll_config[speed];
  83                break;
  84        case PASS_PLL:
  85                data = &pa_pll_config;
  86                break;
  87        default:
  88                data = NULL;
  89        }
  90
  91        return data;
  92}
  93
  94#if defined(CONFIG_MULTI_DTB_FIT)
  95int board_fit_config_name_match(const char *name)
  96{
  97        if (!strcmp(name, "keystone-k2e-evm"))
  98                return 0;
  99
 100        return -1;
 101}
 102#endif
 103
 104#if defined(CONFIG_BOARD_EARLY_INIT_F)
 105int board_early_init_f(void)
 106{
 107        init_plls();
 108
 109        return 0;
 110}
 111#endif
 112
 113#ifdef CONFIG_SPL_BUILD
 114void spl_init_keystone_plls(void)
 115{
 116        init_plls();
 117}
 118#endif
 119