LXR uboot/board/toradex/apalis_t30/apalis

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 *  (C) Copyright 2014-2018
   4 *  Marcel Ziswiler <marcel@ziswiler.com>
   5 */
   6
   7#include <common.h>
   8#include <init.h>
   9#include <log.h>
  10#include <asm/arch/gp_padctrl.h>
  11#include <asm/arch/pinmux.h>
  12#include <asm/arch-tegra/ap.h>
  13#include <asm/arch-tegra/tegra.h>
  14#include <asm/global_data.h>
  15#include <asm/gpio.h>
  16#include <asm/io.h>
  17#include <dm.h>
  18#include <i2c.h>
  19#include <pci_tegra.h>
  20#include <linux/delay.h>
  21#include "../common/tdx-common.h"
  22
  23#include "pinmux-config-apalis_t30.h"
  24
  25DECLARE_GLOBAL_DATA_PTR;
  26
  27#define PMU_I2C_ADDRESS         0x2D
  28#define MAX_I2C_RETRY           3
  29
  30#ifdef CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT
  31#define PEX_PERST_N     TEGRA_GPIO(S, 7) /* Apalis GPIO7 */
  32#define RESET_MOCI_CTRL TEGRA_GPIO(I, 4)
  33
  34static int pci_reset_status;
  35#endif /* CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT */
  36
  37int arch_misc_init(void)
  38{
  39        if (readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BOOTTYPE) ==
  40            NVBOOTTYPE_RECOVERY)
  41                printf("USB recovery mode\n");
  42
  43        return 0;
  44}
  45
  46int checkboard(void)
  47{
  48        printf("Model: Toradex Apalis T30 %dGB\n",
  49               (gd->ram_size == 0x40000000) ? 1 : 2);
  50
  51        return 0;
  52}
  53
  54#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
  55int ft_board_setup(void *blob, struct bd_info *bd)
  56{
  57        return ft_common_board_setup(blob, bd);
  58}
  59#endif
  60
  61/*
  62 * Routine: pinmux_init
  63 * Description: Do individual peripheral pinmux configs
  64 */
  65void pinmux_init(void)
  66{
  67        pinmux_config_pingrp_table(tegra3_pinmux_common,
  68                                   ARRAY_SIZE(tegra3_pinmux_common));
  69
  70        pinmux_config_pingrp_table(unused_pins_lowpower,
  71                                   ARRAY_SIZE(unused_pins_lowpower));
  72
  73        /* Initialize any non-default pad configs (APB_MISC_GP regs) */
  74        pinmux_config_drvgrp_table(apalis_t30_padctrl,
  75                                   ARRAY_SIZE(apalis_t30_padctrl));
  76}
  77
  78#ifdef CONFIG_PCI_TEGRA
  79int tegra_pcie_board_init(void)
  80{
  81        struct udevice *dev;
  82        u8 addr, data[1];
  83        int err;
  84
  85        err = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, &dev);
  86        if (err) {
  87                debug("%s: Cannot find PMIC I2C chip\n", __func__);
  88                return err;
  89        }
  90
  91        /* TPS659110: VDD2_OP_REG = 1.05V */
  92        data[0] = 0x27;
  93        addr = 0x25;
  94
  95        err = dm_i2c_write(dev, addr, data, 1);
  96        if (err) {
  97                debug("failed to set VDD supply\n");
  98                return err;
  99        }
 100
 101        /* TPS659110: VDD2_REG 7.5 mV/us, ACTIVE */
 102        data[0] = 0x0D;
 103        addr = 0x24;
 104
 105        err = dm_i2c_write(dev, addr, data, 1);
 106        if (err) {
 107                debug("failed to enable VDD supply\n");
 108                return err;
 109        }
 110
 111        /* TPS659110: LDO6_REG = 1.1V, ACTIVE */
 112        data[0] = 0x0D;
 113        addr = 0x35;
 114
 115        err = dm_i2c_write(dev, addr, data, 1);
 116        if (err) {
 117                debug("failed to set AVDD supply\n");
 118                return err;
 119        }
 120
 121#ifdef CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT
 122        gpio_request(PEX_PERST_N, "PEX_PERST_N");
 123        gpio_request(RESET_MOCI_CTRL, "RESET_MOCI_CTRL");
 124#endif /* CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT */
 125
 126        return 0;
 127}
 128
 129void tegra_pcie_board_port_reset(struct tegra_pcie_port *port)
 130{
 131        int index = tegra_pcie_port_index_of_port(port);
 132
 133        if (index == 2) { /* I210 Gigabit Ethernet Controller (On-module) */
 134                tegra_pcie_port_reset(port);
 135        }
 136#ifdef CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT
 137        /*
 138         * Apalis PCIe aka port 1 and Apalis Type Specific 4 Lane PCIe aka port
 139         * 0 share the same RESET_MOCI therefore only assert it once for both
 140         * ports to avoid losing the previously brought up port again.
 141         */
 142        else if ((index == 1) || (index == 0)) {
 143                /* only do it once per init cycle */
 144                if (pci_reset_status % 2 == 0) {
 145                        /*
 146                         * Reset PLX PEX 8605 PCIe Switch plus PCIe devices on
 147                         * Apalis Evaluation Board
 148                         */
 149                        gpio_direction_output(PEX_PERST_N, 0);
 150                        gpio_direction_output(RESET_MOCI_CTRL, 0);
 151
 152                        /*
 153                         * Must be asserted for 100 ms after power and clocks
 154                         * are stable
 155                         */
 156                        mdelay(100);
 157
 158                        gpio_set_value(PEX_PERST_N, 1);
 159                        /*
 160                         * Err_5: PEX_REFCLK_OUTpx/nx Clock Outputs is not
 161                         * Guaranteed Until 900 us After PEX_PERST# De-assertion
 162                         */
 163                        mdelay(1);
 164                        gpio_set_value(RESET_MOCI_CTRL, 1);
 165                }
 166                pci_reset_status++;
 167        }
 168#endif /* CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT */
 169}
 170#endif /* CONFIG_PCI_TEGRA */
 171
 172/*
 173 * Backlight off before OS handover
 174 */
 175void board_preboot_os(void)
 176{
 177        gpio_request(TEGRA_GPIO(V, 2), "BKL1_ON");
 178        gpio_direction_output(TEGRA_GPIO(V, 2), 0);
 179}
 180