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7#include <common.h>
8#include <errno.h>
9#include <fpga.h>
10#include <gzip.h>
11#include <image.h>
12#include <log.h>
13#include <malloc.h>
14#include <mapmem.h>
15#include <spl.h>
16#include <sysinfo.h>
17#include <asm/cache.h>
18#include <asm/global_data.h>
19#include <linux/libfdt.h>
20
21DECLARE_GLOBAL_DATA_PTR;
22
23#ifndef CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY_BUF_SZ
24#define CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY_BUF_SZ (64 * 1024)
25#endif
26
27#ifndef CONFIG_SYS_BOOTM_LEN
28#define CONFIG_SYS_BOOTM_LEN (64 << 20)
29#endif
30
31struct spl_fit_info {
32 const void *fit;
33 size_t ext_data_offset;
34 int images_node;
35 int conf_node;
36};
37
38__weak void board_spl_fit_post_load(const void *fit)
39{
40}
41
42__weak ulong board_spl_fit_size_align(ulong size)
43{
44 return size;
45}
46
47static int find_node_from_desc(const void *fit, int node, const char *str)
48{
49 int child;
50
51 if (node < 0)
52 return -EINVAL;
53
54
55 for (child = fdt_first_subnode(fit, node); child >= 0;
56 child = fdt_next_subnode(fit, child)) {
57 int len;
58 const char *desc = fdt_getprop(fit, child, "description", &len);
59
60 if (!desc)
61 continue;
62
63 if (!strcmp(desc, str))
64 return child;
65 }
66
67 return -ENOENT;
68}
69
70
71
72
73
74
75
76
77
78
79
80
81
82static int spl_fit_get_image_name(const struct spl_fit_info *ctx,
83 const char *type, int index,
84 const char **outname)
85{
86 struct udevice *sysinfo;
87 const char *name, *str;
88 __maybe_unused int node;
89 int len, i;
90 bool found = true;
91
92 name = fdt_getprop(ctx->fit, ctx->conf_node, type, &len);
93 if (!name) {
94 debug("cannot find property '%s': %d\n", type, len);
95 return -EINVAL;
96 }
97
98 str = name;
99 for (i = 0; i < index; i++) {
100 str = strchr(str, '\0') + 1;
101 if (!str || (str - name >= len)) {
102 found = false;
103 break;
104 }
105 }
106
107 if (!found && CONFIG_IS_ENABLED(SYSINFO) && !sysinfo_get(&sysinfo)) {
108 int rc;
109
110
111
112
113 rc = sysinfo_detect(sysinfo);
114 if (rc)
115 return rc;
116
117 rc = sysinfo_get_fit_loadable(sysinfo, index - i - 1, type,
118 &str);
119 if (rc && rc != -ENOENT)
120 return rc;
121
122 if (!rc) {
123
124
125
126
127
128
129 int node;
130 int images = fdt_path_offset(ctx->fit, FIT_IMAGES_PATH);
131
132 node = find_node_from_desc(ctx->fit, images, str);
133 if (node > 0)
134 str = fdt_get_name(ctx->fit, node, NULL);
135
136 found = true;
137 }
138 }
139
140 if (!found) {
141 debug("no string for index %d\n", index);
142 return -E2BIG;
143 }
144
145 *outname = str;
146 return 0;
147}
148
149
150
151
152
153
154
155
156
157
158
159
160
161static int spl_fit_get_image_node(const struct spl_fit_info *ctx,
162 const char *type, int index)
163{
164 const char *str;
165 int err;
166 int node;
167
168 err = spl_fit_get_image_name(ctx, type, index, &str);
169 if (err)
170 return err;
171
172 debug("%s: '%s'\n", type, str);
173
174 node = fdt_subnode_offset(ctx->fit, ctx->images_node, str);
175 if (node < 0) {
176 pr_err("cannot find image node '%s': %d\n", str, node);
177 return -EINVAL;
178 }
179
180 return node;
181}
182
183static int get_aligned_image_offset(struct spl_load_info *info, int offset)
184{
185
186
187
188
189
190 if (info->filename)
191 return offset & ~(ARCH_DMA_MINALIGN - 1);
192
193 return offset / info->bl_len;
194}
195
196static int get_aligned_image_overhead(struct spl_load_info *info, int offset)
197{
198
199
200
201
202
203
204 if (info->filename)
205 return offset & (ARCH_DMA_MINALIGN - 1);
206
207 return offset % info->bl_len;
208}
209
210static int get_aligned_image_size(struct spl_load_info *info, int data_size,
211 int offset)
212{
213 data_size = data_size + get_aligned_image_overhead(info, offset);
214
215 if (info->filename)
216 return data_size;
217
218 return (data_size + info->bl_len - 1) / info->bl_len;
219}
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
236 const struct spl_fit_info *ctx, int node,
237 struct spl_image_info *image_info)
238{
239 int offset;
240 size_t length;
241 int len;
242 ulong size;
243 ulong load_addr;
244 void *load_ptr;
245 void *src;
246 ulong overhead;
247 int nr_sectors;
248 uint8_t image_comp = -1, type = -1;
249 const void *data;
250 const void *fit = ctx->fit;
251 bool external_data = false;
252
253 if (IS_ENABLED(CONFIG_SPL_FPGA) ||
254 (IS_ENABLED(CONFIG_SPL_OS_BOOT) && IS_ENABLED(CONFIG_SPL_GZIP))) {
255 if (fit_image_get_type(fit, node, &type))
256 puts("Cannot get image type.\n");
257 else
258 debug("%s ", genimg_get_type_name(type));
259 }
260
261 if (IS_ENABLED(CONFIG_SPL_GZIP)) {
262 fit_image_get_comp(fit, node, &image_comp);
263 debug("%s ", genimg_get_comp_name(image_comp));
264 }
265
266 if (fit_image_get_load(fit, node, &load_addr)) {
267 if (!image_info->load_addr) {
268 printf("Can't load %s: No load address and no buffer\n",
269 fit_get_name(fit, node, NULL));
270 return -ENOBUFS;
271 }
272 load_addr = image_info->load_addr;
273 }
274
275 if (!fit_image_get_data_position(fit, node, &offset)) {
276 external_data = true;
277 } else if (!fit_image_get_data_offset(fit, node, &offset)) {
278 offset += ctx->ext_data_offset;
279 external_data = true;
280 }
281
282 if (external_data) {
283 void *src_ptr;
284
285
286 if (fit_image_get_data_size(fit, node, &len))
287 return -ENOENT;
288
289 src_ptr = map_sysmem(ALIGN(load_addr, ARCH_DMA_MINALIGN), len);
290 length = len;
291
292 overhead = get_aligned_image_overhead(info, offset);
293 nr_sectors = get_aligned_image_size(info, length, offset);
294
295 if (info->read(info,
296 sector + get_aligned_image_offset(info, offset),
297 nr_sectors, src_ptr) != nr_sectors)
298 return -EIO;
299
300 debug("External data: dst=%p, offset=%x, size=%lx\n",
301 src_ptr, offset, (unsigned long)length);
302 src = src_ptr + overhead;
303 } else {
304
305 if (fit_image_get_data(fit, node, &data, &length)) {
306 puts("Cannot get image data/size\n");
307 return -ENOENT;
308 }
309 debug("Embedded data: dst=%lx, size=%lx\n", load_addr,
310 (unsigned long)length);
311 src = (void *)data;
312 }
313
314 if (CONFIG_IS_ENABLED(FIT_SIGNATURE)) {
315 printf("## Checking hash(es) for Image %s ... ",
316 fit_get_name(fit, node, NULL));
317 if (!fit_image_verify_with_data(fit, node, src, length))
318 return -EPERM;
319 puts("OK\n");
320 }
321
322 if (CONFIG_IS_ENABLED(FIT_IMAGE_POST_PROCESS))
323 board_fit_image_post_process(fit, node, &src, &length);
324
325 load_ptr = map_sysmem(load_addr, length);
326 if (IS_ENABLED(CONFIG_SPL_GZIP) && image_comp == IH_COMP_GZIP) {
327 size = length;
328 if (gunzip(load_ptr, CONFIG_SYS_BOOTM_LEN, src, &size)) {
329 puts("Uncompressing error\n");
330 return -EIO;
331 }
332 length = size;
333 } else {
334 memcpy(load_ptr, src, length);
335 }
336
337 if (image_info) {
338 ulong entry_point;
339
340 image_info->load_addr = load_addr;
341 image_info->size = length;
342
343 if (!fit_image_get_entry(fit, node, &entry_point))
344 image_info->entry_point = entry_point;
345 else
346 image_info->entry_point = FDT_ERROR;
347 }
348
349 return 0;
350}
351
352static bool os_takes_devicetree(uint8_t os)
353{
354 switch (os) {
355 case IH_OS_U_BOOT:
356 return true;
357 case IH_OS_LINUX:
358 return IS_ENABLED(CONFIG_SPL_OS_BOOT);
359 default:
360 return false;
361 }
362}
363
364static int spl_fit_append_fdt(struct spl_image_info *spl_image,
365 struct spl_load_info *info, ulong sector,
366 const struct spl_fit_info *ctx)
367{
368 struct spl_image_info image_info;
369 int node, ret = 0, index = 0;
370
371
372
373
374
375 image_info.load_addr = spl_image->load_addr + spl_image->size;
376
377
378 node = spl_fit_get_image_node(ctx, FIT_FDT_PROP, index++);
379 if (node < 0) {
380 debug("%s: cannot find FDT node\n", __func__);
381
382
383
384
385
386 if (gd->fdt_blob)
387 memcpy((void *)image_info.load_addr, gd->fdt_blob,
388 fdt_totalsize(gd->fdt_blob));
389 else
390 return node;
391 } else {
392 ret = spl_load_fit_image(info, sector, ctx, node,
393 &image_info);
394 if (ret < 0)
395 return ret;
396 }
397
398
399 spl_image->fdt_addr = map_sysmem(image_info.load_addr, 0);
400 if (CONFIG_IS_ENABLED(FIT_IMAGE_TINY))
401 return 0;
402
403 if (CONFIG_IS_ENABLED(LOAD_FIT_APPLY_OVERLAY)) {
404 void *tmpbuffer = NULL;
405
406 for (; ; index++) {
407 node = spl_fit_get_image_node(ctx, FIT_FDT_PROP, index);
408 if (node == -E2BIG) {
409 debug("%s: No additional FDT node\n", __func__);
410 break;
411 } else if (node < 0) {
412 debug("%s: unable to find FDT node %d\n",
413 __func__, index);
414 continue;
415 }
416
417 if (!tmpbuffer) {
418
419
420
421
422
423
424 tmpbuffer = malloc(CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY_BUF_SZ);
425 if (!tmpbuffer)
426 debug("%s: unable to allocate space for overlays\n",
427 __func__);
428 }
429 image_info.load_addr = (ulong)tmpbuffer;
430 ret = spl_load_fit_image(info, sector, ctx,
431 node, &image_info);
432 if (ret < 0)
433 break;
434
435
436 ret = fdt_increase_size(spl_image->fdt_addr,
437 image_info.size);
438 if (ret < 0)
439 break;
440
441 ret = fdt_overlay_apply_verbose(spl_image->fdt_addr,
442 (void *)image_info.load_addr);
443 if (ret) {
444 pr_err("failed to apply DT overlay %s\n",
445 fit_get_name(ctx->fit, node, NULL));
446 break;
447 }
448
449 debug("%s: DT overlay %s applied\n", __func__,
450 fit_get_name(ctx->fit, node, NULL));
451 }
452 free(tmpbuffer);
453 if (ret)
454 return ret;
455 }
456
457 ret = fdt_shrink_to_minimum(spl_image->fdt_addr, 8192);
458 if (ret < 0)
459 return ret;
460
461 return ret;
462}
463
464static int spl_fit_record_loadable(const struct spl_fit_info *ctx, int index,
465 void *blob, struct spl_image_info *image)
466{
467 int ret = 0;
468 const char *name;
469 int node;
470
471 if (CONFIG_IS_ENABLED(FIT_IMAGE_TINY))
472 return 0;
473
474 ret = spl_fit_get_image_name(ctx, "loadables", index, &name);
475 if (ret < 0)
476 return ret;
477
478 node = spl_fit_get_image_node(ctx, "loadables", index);
479
480 ret = fdt_record_loadable(blob, index, name, image->load_addr,
481 image->size, image->entry_point,
482 fdt_getprop(ctx->fit, node, "type", NULL),
483 fdt_getprop(ctx->fit, node, "os", NULL),
484 fdt_getprop(ctx->fit, node, "arch", NULL));
485 return ret;
486}
487
488static int spl_fit_image_is_fpga(const void *fit, int node)
489{
490 const char *type;
491
492 if (!IS_ENABLED(CONFIG_SPL_FPGA))
493 return 0;
494
495 type = fdt_getprop(fit, node, FIT_TYPE_PROP, NULL);
496 if (!type)
497 return 0;
498
499 return !strcmp(type, "fpga");
500}
501
502static int spl_fit_image_get_os(const void *fit, int noffset, uint8_t *os)
503{
504 if (!CONFIG_IS_ENABLED(FIT_IMAGE_TINY) || CONFIG_IS_ENABLED(OS_BOOT))
505 return fit_image_get_os(fit, noffset, os);
506
507 const char *name = fdt_getprop(fit, noffset, FIT_OS_PROP, NULL);
508 if (!name)
509 return -ENOENT;
510
511
512
513
514
515
516 if (!strcmp(name, "u-boot"))
517 *os = IH_OS_U_BOOT;
518 else
519 *os = IH_OS_INVALID;
520
521 return 0;
522}
523
524
525
526
527
528static void *spl_get_fit_load_buffer(size_t size)
529{
530 void *buf;
531
532 buf = malloc(size);
533 if (!buf) {
534 pr_err("Could not get FIT buffer of %lu bytes\n", (ulong)size);
535 pr_err("\tcheck CONFIG_SYS_SPL_MALLOC_SIZE\n");
536 buf = spl_get_load_buffer(0, size);
537 }
538 return buf;
539}
540
541__weak void *board_spl_fit_buffer_addr(ulong fit_size, int sectors, int bl_len)
542{
543 return spl_get_fit_load_buffer(sectors * bl_len);
544}
545
546
547
548
549
550
551__weak bool spl_load_simple_fit_skip_processing(void)
552{
553 return false;
554}
555
556
557
558
559
560__weak void *spl_load_simple_fit_fix_load(const void *fit)
561{
562 return (void *)fit;
563}
564
565static void warn_deprecated(const char *msg)
566{
567 printf("DEPRECATED: %s\n", msg);
568 printf("\tSee doc/uImage.FIT/source_file_format.txt\n");
569}
570
571static int spl_fit_upload_fpga(struct spl_fit_info *ctx, int node,
572 struct spl_image_info *fpga_image)
573{
574 const char *compatible;
575 int ret;
576
577 debug("FPGA bitstream at: %x, size: %x\n",
578 (u32)fpga_image->load_addr, fpga_image->size);
579
580 compatible = fdt_getprop(ctx->fit, node, "compatible", NULL);
581 if (!compatible)
582 warn_deprecated("'fpga' image without 'compatible' property");
583 else if (strcmp(compatible, "u-boot,fpga-legacy"))
584 printf("Ignoring compatible = %s property\n", compatible);
585
586 ret = fpga_load(0, (void *)fpga_image->load_addr, fpga_image->size,
587 BIT_FULL);
588 if (ret) {
589 printf("%s: Cannot load the image to the FPGA\n", __func__);
590 return ret;
591 }
592
593 puts("FPGA image loaded from FIT\n");
594
595 return 0;
596}
597
598static int spl_fit_load_fpga(struct spl_fit_info *ctx,
599 struct spl_load_info *info, ulong sector)
600{
601 int node, ret;
602
603 struct spl_image_info fpga_image = {
604 .load_addr = 0,
605 };
606
607 node = spl_fit_get_image_node(ctx, "fpga", 0);
608 if (node < 0)
609 return node;
610
611 warn_deprecated("'fpga' property in config node. Use 'loadables'");
612
613
614 ret = spl_load_fit_image(info, sector, ctx, node, &fpga_image);
615 if (ret) {
616 printf("%s: Cannot load the FPGA: %i\n", __func__, ret);
617 return ret;
618 }
619
620 return spl_fit_upload_fpga(ctx, node, &fpga_image);
621}
622
623static int spl_simple_fit_read(struct spl_fit_info *ctx,
624 struct spl_load_info *info, ulong sector,
625 const void *fit_header)
626{
627 unsigned long count, size;
628 int sectors;
629 void *buf;
630
631
632
633
634
635
636 size = ALIGN(fdt_totalsize(fit_header), 4);
637 size = board_spl_fit_size_align(size);
638 ctx->ext_data_offset = ALIGN(size, 4);
639
640
641
642
643
644
645
646
647 sectors = get_aligned_image_size(info, size, 0);
648 buf = board_spl_fit_buffer_addr(size, sectors, info->bl_len);
649
650 count = info->read(info, sector, sectors, buf);
651 ctx->fit = buf;
652 debug("fit read sector %lx, sectors=%d, dst=%p, count=%lu, size=0x%lx\n",
653 sector, sectors, buf, count, size);
654
655 return (count == 0) ? -EIO : 0;
656}
657
658static int spl_simple_fit_parse(struct spl_fit_info *ctx)
659{
660
661 ctx->conf_node = fit_find_config_node(ctx->fit);
662 if (ctx->conf_node < 0)
663 return -EINVAL;
664
665 if (IS_ENABLED(CONFIG_SPL_FIT_SIGNATURE)) {
666 printf("## Checking hash(es) for config %s ... ",
667 fit_get_name(ctx->fit, ctx->conf_node, NULL));
668 if (fit_config_verify(ctx->fit, ctx->conf_node))
669 return -EPERM;
670 puts("OK\n");
671 }
672
673
674 ctx->images_node = fdt_path_offset(ctx->fit, FIT_IMAGES_PATH);
675 if (ctx->images_node < 0) {
676 debug("%s: Cannot find /images node: %d\n", __func__,
677 ctx->images_node);
678 return -EINVAL;
679 }
680
681 return 0;
682}
683
684int spl_load_simple_fit(struct spl_image_info *spl_image,
685 struct spl_load_info *info, ulong sector, void *fit)
686{
687 struct spl_image_info image_info;
688 struct spl_fit_info ctx;
689 int node = -1;
690 int ret;
691 int index = 0;
692 int firmware_node;
693
694 ret = spl_simple_fit_read(&ctx, info, sector, fit);
695 if (ret < 0)
696 return ret;
697
698
699 if (spl_load_simple_fit_skip_processing())
700 return 0;
701
702 ctx.fit = spl_load_simple_fit_fix_load(ctx.fit);
703
704 ret = spl_simple_fit_parse(&ctx);
705 if (ret < 0)
706 return ret;
707
708 if (IS_ENABLED(CONFIG_SPL_FPGA))
709 spl_fit_load_fpga(&ctx, info, sector);
710
711
712
713
714
715
716
717 if (node < 0)
718 node = spl_fit_get_image_node(&ctx, FIT_FIRMWARE_PROP, 0);
719
720 if (node < 0 && IS_ENABLED(CONFIG_SPL_OS_BOOT))
721 node = spl_fit_get_image_node(&ctx, FIT_KERNEL_PROP, 0);
722
723 if (node < 0) {
724 debug("could not find firmware image, trying loadables...\n");
725 node = spl_fit_get_image_node(&ctx, "loadables", 0);
726
727
728
729
730 index = 1;
731 }
732 if (node < 0) {
733 debug("%s: Cannot find u-boot image node: %d\n",
734 __func__, node);
735 return -1;
736 }
737
738
739 ret = spl_load_fit_image(info, sector, &ctx, node, spl_image);
740 if (ret)
741 return ret;
742
743
744
745
746
747 if (!spl_fit_image_get_os(ctx.fit, node, &spl_image->os))
748 debug("Image OS is %s\n", genimg_get_os_name(spl_image->os));
749 else if (!IS_ENABLED(CONFIG_SPL_OS_BOOT))
750 spl_image->os = IH_OS_U_BOOT;
751
752
753
754
755
756 if (os_takes_devicetree(spl_image->os)) {
757 ret = spl_fit_append_fdt(spl_image, info, sector, &ctx);
758 if (ret < 0 && spl_image->os != IH_OS_U_BOOT)
759 return ret;
760 }
761
762 firmware_node = node;
763
764 for (; ; index++) {
765 uint8_t os_type = IH_OS_INVALID;
766
767 node = spl_fit_get_image_node(&ctx, "loadables", index);
768 if (node < 0)
769 break;
770
771
772
773
774
775
776 if (firmware_node == node)
777 continue;
778
779 image_info.load_addr = 0;
780 ret = spl_load_fit_image(info, sector, &ctx, node, &image_info);
781 if (ret < 0) {
782 printf("%s: can't load image loadables index %d (ret = %d)\n",
783 __func__, index, ret);
784 return ret;
785 }
786
787 if (spl_fit_image_is_fpga(ctx.fit, node))
788 spl_fit_upload_fpga(&ctx, node, &image_info);
789
790 if (!spl_fit_image_get_os(ctx.fit, node, &os_type))
791 debug("Loadable is %s\n", genimg_get_os_name(os_type));
792
793 if (os_takes_devicetree(os_type)) {
794 spl_fit_append_fdt(&image_info, info, sector, &ctx);
795 spl_image->fdt_addr = image_info.fdt_addr;
796 }
797
798
799
800
801
802 if (spl_image->entry_point == FDT_ERROR &&
803 image_info.entry_point != FDT_ERROR)
804 spl_image->entry_point = image_info.entry_point;
805
806
807 if (spl_image->fdt_addr)
808 spl_fit_record_loadable(&ctx, index,
809 spl_image->fdt_addr,
810 &image_info);
811 }
812
813
814
815
816
817
818 if (spl_image->entry_point == FDT_ERROR || spl_image->entry_point == 0)
819 spl_image->entry_point = spl_image->load_addr;
820
821 spl_image->flags |= SPL_FIT_FOUND;
822
823 if (IS_ENABLED(CONFIG_IMX_HAB))
824 board_spl_fit_post_load(ctx.fit);
825
826 return 0;
827}
828