LXR uboot/drivers/clk/uniphier/clk-uniphier.h

   1/* SPDX-License-Identifier: GPL-2.0+ */
   2/*
   3 * Copyright (C) 2016 Socionext Inc.
   4 *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
   5 */
   6
   7#ifndef __CLK_UNIPHIER_H__
   8#define __CLK_UNIPHIER_H__
   9
  10#include <linux/kernel.h>
  11#include <linux/types.h>
  12
  13#define UNIPHIER_CLK_MUX_MAX_PARENTS            8
  14
  15#define UNIPHIER_CLK_TYPE_END                   0
  16#define UNIPHIER_CLK_TYPE_FIXED_RATE            2
  17#define UNIPHIER_CLK_TYPE_GATE                  3
  18#define UNIPHIER_CLK_TYPE_MUX                   4
  19
  20#define UNIPHIER_CLK_ID_INVALID                 (U8_MAX)
  21
  22struct uniphier_clk_fixed_rate_data {
  23        unsigned long fixed_rate;
  24};
  25
  26struct uniphier_clk_gate_data {
  27        u8 parent_id;
  28        u16 reg;
  29        u8 bit;
  30};
  31
  32struct uniphier_clk_mux_data {
  33        u8 parent_ids[UNIPHIER_CLK_MUX_MAX_PARENTS];
  34        u8 num_parents;
  35        u16 reg;
  36        u32 masks[UNIPHIER_CLK_MUX_MAX_PARENTS];
  37        u32 vals[UNIPHIER_CLK_MUX_MAX_PARENTS];
  38};
  39
  40struct uniphier_clk_data {
  41        u8 type;
  42        u8 id;
  43        union {
  44                struct uniphier_clk_fixed_rate_data rate;
  45                struct uniphier_clk_gate_data gate;
  46                struct uniphier_clk_mux_data mux;
  47        } data;
  48};
  49
  50#define UNIPHIER_CLK_RATE(_id, _rate)                           \
  51        {                                                       \
  52                .type = UNIPHIER_CLK_TYPE_FIXED_RATE,           \
  53                .id = (_id),                                    \
  54                .data.rate = {                                  \
  55                        .fixed_rate = (_rate),                  \
  56                },                                              \
  57        }
  58
  59#define UNIPHIER_CLK_GATE(_id, _parent, _reg, _bit)             \
  60        {                                                       \
  61                .type = UNIPHIER_CLK_TYPE_GATE,                 \
  62                .id = (_id),                                    \
  63                .data.gate = {                                  \
  64                        .parent_id = (_parent),                 \
  65                        .reg = (_reg),                          \
  66                        .bit = (_bit),                          \
  67                },                                              \
  68        }
  69
  70#define UNIPHIER_CLK_GATE_SIMPLE(_id, _reg, _bit)               \
  71        UNIPHIER_CLK_GATE(_id, UNIPHIER_CLK_ID_INVALID, _reg, _bit)
  72
  73extern const struct uniphier_clk_data uniphier_pxs2_sys_clk_data[];
  74extern const struct uniphier_clk_data uniphier_ld20_sys_clk_data[];
  75extern const struct uniphier_clk_data uniphier_pxs3_sys_clk_data[];
  76extern const struct uniphier_clk_data uniphier_mio_clk_data[];
  77
  78#endif /* __CLK_UNIPHIER_H__ */
  79