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10#include <common.h>
11#include <i2c.h>
12#include <log.h>
13#include <asm/global_data.h>
14#include <linux/delay.h>
15#include <linux/errno.h>
16#include <asm/io.h>
17#include <linux/bitops.h>
18#include <linux/compat.h>
19#if CONFIG_IS_ENABLED(DM_I2C)
20#include <clk.h>
21#include <dm.h>
22#include <reset.h>
23#endif
24
25DECLARE_GLOBAL_DATA_PTR;
26
27
28
29
30
31
32#if !CONFIG_IS_ENABLED(DM_I2C)
33#if defined(CONFIG_ARCH_ORION5X)
34#include <asm/arch/orion5x.h>
35#elif (defined(CONFIG_ARCH_KIRKWOOD) || defined(CONFIG_ARCH_MVEBU))
36#include <asm/arch/soc.h>
37#elif defined(CONFIG_ARCH_SUNXI)
38#include <asm/arch/i2c.h>
39#else
40#error Driver mvtwsi not supported by SoC or board
41#endif
42#endif
43
44
45
46
47
48#if CONFIG_IS_ENABLED(DM_I2C) && defined(CONFIG_ARCH_SUNXI)
49#include <asm/arch/i2c.h>
50#endif
51
52
53
54
55
56#ifdef CONFIG_ARCH_SUNXI
57
58struct mvtwsi_registers {
59 u32 slave_address;
60 u32 xtnd_slave_addr;
61 u32 data;
62 u32 control;
63 u32 status;
64 u32 baudrate;
65 u32 soft_reset;
66 u32 debug;
67};
68
69#else
70
71struct mvtwsi_registers {
72 u32 slave_address;
73 u32 data;
74 u32 control;
75 union {
76 u32 status;
77 u32 baudrate;
78 };
79 u32 xtnd_slave_addr;
80 u32 reserved0[2];
81 u32 soft_reset;
82 u32 reserved1[27];
83 u32 debug;
84};
85
86#endif
87
88#if CONFIG_IS_ENABLED(DM_I2C)
89struct mvtwsi_i2c_dev {
90
91 struct mvtwsi_registers *base;
92
93 int index;
94
95 u8 slaveadd;
96
97 uint speed;
98
99 uint tick;
100};
101#endif
102
103
104
105
106
107enum mvtwsi_ctrl_register_fields {
108
109 MVTWSI_CONTROL_ACK = 0x00000004,
110
111 MVTWSI_CONTROL_IFLG = 0x00000008,
112
113 MVTWSI_CONTROL_STOP = 0x00000010,
114
115 MVTWSI_CONTROL_START = 0x00000020,
116
117 MVTWSI_CONTROL_TWSIEN = 0x00000040,
118
119 MVTWSI_CONTROL_INTEN = 0x00000080,
120};
121
122
123
124
125
126
127#if defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_SUN50I_GEN_H6)
128#define MVTWSI_CONTROL_CLEAR_IFLG 0x00000008
129#else
130#define MVTWSI_CONTROL_CLEAR_IFLG 0x00000000
131#endif
132
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141
142
143
144enum mvstwsi_status_values {
145
146 MVTWSI_STATUS_START = 0x08,
147
148 MVTWSI_STATUS_REPEATED_START = 0x10,
149
150 MVTWSI_STATUS_ADDR_W_ACK = 0x18,
151
152 MVTWSI_STATUS_DATA_W_ACK = 0x28,
153
154 MVTWSI_STATUS_ADDR_R_ACK = 0x40,
155
156 MVTWSI_STATUS_ADDR_R_NAK = 0x48,
157
158 MVTWSI_STATUS_DATA_R_ACK = 0x50,
159
160 MVTWSI_STATUS_DATA_R_NAK = 0x58,
161
162 MVTWSI_STATUS_IDLE = 0xF8,
163};
164
165
166
167
168
169enum mvtwsi_ack_flags {
170
171 MVTWSI_READ_NAK = 0,
172
173 MVTWSI_READ_ACK = 1,
174};
175
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180
181
182inline uint calc_tick(uint speed)
183{
184
185
186 return (1000000000u / speed) + 100;
187}
188
189#if !CONFIG_IS_ENABLED(DM_I2C)
190
191
192
193
194
195
196
197static struct mvtwsi_registers *twsi_get_base(struct i2c_adapter *adap)
198{
199 switch (adap->hwadapnr) {
200#ifdef CONFIG_I2C_MVTWSI_BASE0
201 case 0:
202 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE0;
203#endif
204#ifdef CONFIG_I2C_MVTWSI_BASE1
205 case 1:
206 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE1;
207#endif
208#ifdef CONFIG_I2C_MVTWSI_BASE2
209 case 2:
210 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE2;
211#endif
212#ifdef CONFIG_I2C_MVTWSI_BASE3
213 case 3:
214 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE3;
215#endif
216#ifdef CONFIG_I2C_MVTWSI_BASE4
217 case 4:
218 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE4;
219#endif
220#ifdef CONFIG_I2C_MVTWSI_BASE5
221 case 5:
222 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE5;
223#endif
224 default:
225 printf("Missing mvtwsi controller %d base\n", adap->hwadapnr);
226 break;
227 }
228
229 return NULL;
230}
231#endif
232
233
234
235
236enum mvtwsi_error_class {
237
238 MVTWSI_ERROR_WRONG_STATUS = 0x01,
239
240 MVTWSI_ERROR_TIMEOUT = 0x02,
241};
242
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255
256inline uint mvtwsi_error(uint ec, uint lc, uint ls, uint es)
257{
258 return ((ec << 24) & 0xFF000000)
259 | ((lc << 16) & 0x00FF0000)
260 | ((ls << 8) & 0x0000FF00)
261 | (es & 0xFF);
262}
263
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269
270static int twsi_wait(struct mvtwsi_registers *twsi, int expected_status,
271 uint tick)
272{
273 int control, status;
274 int timeout = 1000;
275
276 do {
277 control = readl(&twsi->control);
278 if (control & MVTWSI_CONTROL_IFLG) {
279
280
281
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286
287
288
289 ndelay(100);
290 status = readl(&twsi->status);
291 if (status == expected_status)
292 return 0;
293 else
294 return mvtwsi_error(
295 MVTWSI_ERROR_WRONG_STATUS,
296 control, status, expected_status);
297 }
298 ndelay(tick);
299 } while (timeout--);
300 status = readl(&twsi->status);
301 return mvtwsi_error(MVTWSI_ERROR_TIMEOUT, control, status,
302 expected_status);
303}
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317
318static int twsi_start(struct mvtwsi_registers *twsi, int expected_status,
319 uint tick)
320{
321
322 writel(MVTWSI_CONTROL_TWSIEN | MVTWSI_CONTROL_START |
323 MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control);
324
325 return twsi_wait(twsi, expected_status, tick);
326}
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339
340
341static int twsi_send(struct mvtwsi_registers *twsi, u8 byte,
342 int expected_status, uint tick)
343{
344
345 writel(byte, &twsi->data);
346
347 writel(MVTWSI_CONTROL_TWSIEN | MVTWSI_CONTROL_CLEAR_IFLG,
348 &twsi->control);
349
350 return twsi_wait(twsi, expected_status, tick);
351}
352
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365
366static int twsi_recv(struct mvtwsi_registers *twsi, u8 *byte, int ack_flag,
367 uint tick)
368{
369 int expected_status, status, control;
370
371
372 expected_status = ack_flag ? MVTWSI_STATUS_DATA_R_ACK :
373 MVTWSI_STATUS_DATA_R_NAK;
374
375 control = MVTWSI_CONTROL_TWSIEN;
376 control |= ack_flag == MVTWSI_READ_ACK ? MVTWSI_CONTROL_ACK : 0;
377 writel(control | MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control);
378
379 status = twsi_wait(twsi, expected_status, tick);
380
381 if (status == 0)
382 *byte = readl(&twsi->data);
383 return status;
384}
385
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396
397static int twsi_stop(struct mvtwsi_registers *twsi, uint tick)
398{
399 int control, stop_status;
400 int status = 0;
401 int timeout = 1000;
402
403
404 control = MVTWSI_CONTROL_TWSIEN | MVTWSI_CONTROL_STOP;
405 writel(control | MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control);
406
407 do {
408 stop_status = readl(&twsi->status);
409 if (stop_status == MVTWSI_STATUS_IDLE)
410 break;
411 ndelay(tick);
412 } while (timeout--);
413 control = readl(&twsi->control);
414 if (stop_status != MVTWSI_STATUS_IDLE)
415 status = mvtwsi_error(MVTWSI_ERROR_TIMEOUT,
416 control, status, MVTWSI_STATUS_IDLE);
417 return status;
418}
419
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423
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425
426
427static uint twsi_calc_freq(const int n, const int m)
428{
429#ifdef CONFIG_ARCH_SUNXI
430 return CONFIG_SYS_TCLK / (10 * (m + 1) * (1 << n));
431#else
432 return CONFIG_SYS_TCLK / (10 * (m + 1) * (2 << n));
433#endif
434}
435
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443
444static void twsi_reset(struct mvtwsi_registers *twsi)
445{
446
447 writel(0, &twsi->soft_reset);
448
449 udelay(20000);
450}
451
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461
462
463static uint __twsi_i2c_set_bus_speed(struct mvtwsi_registers *twsi,
464 uint requested_speed)
465{
466 uint tmp_speed, highest_speed, n, m;
467 uint baud = 0x44;
468
469 highest_speed = 0;
470
471
472
473 for (n = 0; n < 8; n++) {
474 for (m = 0; m < 16; m++) {
475 tmp_speed = twsi_calc_freq(n, m);
476 if ((tmp_speed <= requested_speed) &&
477 (tmp_speed > highest_speed)) {
478 highest_speed = tmp_speed;
479 baud = (m << 3) | n;
480 }
481 }
482 }
483 writel(baud, &twsi->baudrate);
484
485
486#if CONFIG_IS_ENABLED(DM_I2C)
487 ndelay(calc_tick(highest_speed));
488#else
489 ndelay(10000);
490#endif
491 return highest_speed;
492}
493
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505
506static void __twsi_i2c_init(struct mvtwsi_registers *twsi, int speed,
507 int slaveadd, uint *actual_speed)
508{
509 uint tmp_speed;
510
511
512 twsi_reset(twsi);
513
514 tmp_speed = __twsi_i2c_set_bus_speed(twsi, speed);
515 if (actual_speed)
516 *actual_speed = tmp_speed;
517
518 writel(slaveadd, &twsi->slave_address);
519 writel(0, &twsi->xtnd_slave_addr);
520
521#if CONFIG_IS_ENABLED(DM_I2C)
522 (void) twsi_stop(twsi, calc_tick(*actual_speed));
523#else
524 (void) twsi_stop(twsi, 10000);
525#endif
526}
527
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545static int i2c_begin(struct mvtwsi_registers *twsi, int expected_start_status,
546 u8 addr, uint tick)
547{
548 int status, expected_addr_status;
549
550
551
552 if (addr & 1)
553 expected_addr_status = MVTWSI_STATUS_ADDR_R_ACK;
554 else
555 expected_addr_status = MVTWSI_STATUS_ADDR_W_ACK;
556
557 status = twsi_start(twsi, expected_start_status, tick);
558
559 if (status == 0)
560 status = twsi_send(twsi, addr, expected_addr_status, tick);
561
562 return status;
563}
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576
577static int __twsi_i2c_probe_chip(struct mvtwsi_registers *twsi, uchar chip,
578 uint tick)
579{
580 u8 dummy_byte;
581 int status;
582
583
584 status = i2c_begin(twsi, MVTWSI_STATUS_START, (chip << 1) | 1, tick);
585
586 if (status == 0)
587 status = twsi_recv(twsi, &dummy_byte, MVTWSI_READ_NAK, tick);
588
589 twsi_stop(twsi, tick);
590
591 return status;
592}
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616static int __twsi_i2c_read(struct mvtwsi_registers *twsi, uchar chip,
617 u8 *addr, int alen, uchar *data, int length,
618 uint tick)
619{
620 int status = 0;
621 int stop_status;
622 int expected_start = MVTWSI_STATUS_START;
623
624 if (alen > 0) {
625
626 status = i2c_begin(twsi, expected_start, (chip << 1), tick);
627
628 while ((status == 0) && alen--)
629 status = twsi_send(twsi, addr[alen],
630 MVTWSI_STATUS_DATA_W_ACK, tick);
631
632 expected_start = MVTWSI_STATUS_REPEATED_START;
633 }
634
635 if (status == 0)
636 status = i2c_begin(twsi, expected_start, (chip << 1) | 1, tick);
637
638
639 while ((status == 0) && length--)
640 status = twsi_recv(twsi, data++,
641 length > 0 ?
642 MVTWSI_READ_ACK : MVTWSI_READ_NAK, tick);
643
644 stop_status = twsi_stop(twsi, tick);
645
646 return status != 0 ? status : stop_status;
647}
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664
665static int __twsi_i2c_write(struct mvtwsi_registers *twsi, uchar chip,
666 u8 *addr, int alen, uchar *data, int length,
667 uint tick)
668{
669 int status, stop_status;
670
671
672
673 status = i2c_begin(twsi, MVTWSI_STATUS_START, (chip << 1), tick);
674
675 while ((status == 0) && (alen-- > 0))
676 status = twsi_send(twsi, addr[alen], MVTWSI_STATUS_DATA_W_ACK,
677 tick);
678
679 while ((status == 0) && (length-- > 0))
680 status = twsi_send(twsi, *(data++), MVTWSI_STATUS_DATA_W_ACK,
681 tick);
682
683 stop_status = twsi_stop(twsi, tick);
684
685 return status != 0 ? status : stop_status;
686}
687
688#if !CONFIG_IS_ENABLED(DM_I2C)
689static void twsi_i2c_init(struct i2c_adapter *adap, int speed,
690 int slaveadd)
691{
692 struct mvtwsi_registers *twsi = twsi_get_base(adap);
693 __twsi_i2c_init(twsi, speed, slaveadd, NULL);
694}
695
696static uint twsi_i2c_set_bus_speed(struct i2c_adapter *adap,
697 uint requested_speed)
698{
699 struct mvtwsi_registers *twsi = twsi_get_base(adap);
700 __twsi_i2c_set_bus_speed(twsi, requested_speed);
701 return 0;
702}
703
704static int twsi_i2c_probe(struct i2c_adapter *adap, uchar chip)
705{
706 struct mvtwsi_registers *twsi = twsi_get_base(adap);
707 return __twsi_i2c_probe_chip(twsi, chip, 10000);
708}
709
710static int twsi_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
711 int alen, uchar *data, int length)
712{
713 struct mvtwsi_registers *twsi = twsi_get_base(adap);
714 u8 addr_bytes[4];
715
716 addr_bytes[0] = (addr >> 0) & 0xFF;
717 addr_bytes[1] = (addr >> 8) & 0xFF;
718 addr_bytes[2] = (addr >> 16) & 0xFF;
719 addr_bytes[3] = (addr >> 24) & 0xFF;
720
721 return __twsi_i2c_read(twsi, chip, addr_bytes, alen, data, length,
722 10000);
723}
724
725static int twsi_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
726 int alen, uchar *data, int length)
727{
728 struct mvtwsi_registers *twsi = twsi_get_base(adap);
729 u8 addr_bytes[4];
730
731 addr_bytes[0] = (addr >> 0) & 0xFF;
732 addr_bytes[1] = (addr >> 8) & 0xFF;
733 addr_bytes[2] = (addr >> 16) & 0xFF;
734 addr_bytes[3] = (addr >> 24) & 0xFF;
735
736 return __twsi_i2c_write(twsi, chip, addr_bytes, alen, data, length,
737 10000);
738}
739
740#ifdef CONFIG_I2C_MVTWSI_BASE0
741U_BOOT_I2C_ADAP_COMPLETE(twsi0, twsi_i2c_init, twsi_i2c_probe,
742 twsi_i2c_read, twsi_i2c_write,
743 twsi_i2c_set_bus_speed,
744 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 0)
745#endif
746#ifdef CONFIG_I2C_MVTWSI_BASE1
747U_BOOT_I2C_ADAP_COMPLETE(twsi1, twsi_i2c_init, twsi_i2c_probe,
748 twsi_i2c_read, twsi_i2c_write,
749 twsi_i2c_set_bus_speed,
750 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 1)
751
752#endif
753#ifdef CONFIG_I2C_MVTWSI_BASE2
754U_BOOT_I2C_ADAP_COMPLETE(twsi2, twsi_i2c_init, twsi_i2c_probe,
755 twsi_i2c_read, twsi_i2c_write,
756 twsi_i2c_set_bus_speed,
757 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 2)
758
759#endif
760#ifdef CONFIG_I2C_MVTWSI_BASE3
761U_BOOT_I2C_ADAP_COMPLETE(twsi3, twsi_i2c_init, twsi_i2c_probe,
762 twsi_i2c_read, twsi_i2c_write,
763 twsi_i2c_set_bus_speed,
764 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 3)
765
766#endif
767#ifdef CONFIG_I2C_MVTWSI_BASE4
768U_BOOT_I2C_ADAP_COMPLETE(twsi4, twsi_i2c_init, twsi_i2c_probe,
769 twsi_i2c_read, twsi_i2c_write,
770 twsi_i2c_set_bus_speed,
771 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 4)
772
773#endif
774#ifdef CONFIG_I2C_MVTWSI_BASE5
775U_BOOT_I2C_ADAP_COMPLETE(twsi5, twsi_i2c_init, twsi_i2c_probe,
776 twsi_i2c_read, twsi_i2c_write,
777 twsi_i2c_set_bus_speed,
778 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 5)
779
780#endif
781#else
782
783static int mvtwsi_i2c_probe_chip(struct udevice *bus, u32 chip_addr,
784 u32 chip_flags)
785{
786 struct mvtwsi_i2c_dev *dev = dev_get_priv(bus);
787 return __twsi_i2c_probe_chip(dev->base, chip_addr, dev->tick);
788}
789
790static int mvtwsi_i2c_set_bus_speed(struct udevice *bus, uint speed)
791{
792 struct mvtwsi_i2c_dev *dev = dev_get_priv(bus);
793
794 dev->speed = __twsi_i2c_set_bus_speed(dev->base, speed);
795 dev->tick = calc_tick(dev->speed);
796
797 return 0;
798}
799
800static int mvtwsi_i2c_of_to_plat(struct udevice *bus)
801{
802 struct mvtwsi_i2c_dev *dev = dev_get_priv(bus);
803
804 dev->base = dev_read_addr_ptr(bus);
805
806 if (!dev->base)
807 return -ENOMEM;
808
809 dev->index = fdtdec_get_int(gd->fdt_blob, dev_of_offset(bus),
810 "cell-index", -1);
811 dev->slaveadd = fdtdec_get_int(gd->fdt_blob, dev_of_offset(bus),
812 "u-boot,i2c-slave-addr", 0x0);
813 dev->speed = dev_read_u32_default(bus, "clock-frequency",
814 I2C_SPEED_STANDARD_RATE);
815
816 return 0;
817}
818
819static void twsi_disable_i2c_slave(struct mvtwsi_registers *twsi)
820{
821 clrbits_le32(&twsi->debug, BIT(18));
822}
823
824static int mvtwsi_i2c_bind(struct udevice *bus)
825{
826 struct mvtwsi_registers *twsi = dev_read_addr_ptr(bus);
827
828
829 if ((IS_ENABLED(CONFIG_ARMADA_38X) ||
830 IS_ENABLED(CONFIG_ARCH_KIRKWOOD) ||
831 IS_ENABLED(CONFIG_ARMADA_8K)) && !dev_seq(bus))
832 twsi_disable_i2c_slave(twsi);
833
834 return 0;
835}
836
837static int mvtwsi_i2c_probe(struct udevice *bus)
838{
839 struct mvtwsi_i2c_dev *dev = dev_get_priv(bus);
840 struct reset_ctl reset;
841 struct clk clk;
842 uint actual_speed;
843 int ret;
844
845 ret = reset_get_by_index(bus, 0, &reset);
846 if (!ret)
847 reset_deassert(&reset);
848
849 ret = clk_get_by_index(bus, 0, &clk);
850 if (!ret)
851 clk_enable(&clk);
852
853 __twsi_i2c_init(dev->base, dev->speed, dev->slaveadd, &actual_speed);
854 dev->speed = actual_speed;
855 dev->tick = calc_tick(dev->speed);
856 return 0;
857}
858
859static int mvtwsi_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs)
860{
861 struct mvtwsi_i2c_dev *dev = dev_get_priv(bus);
862 struct i2c_msg *dmsg, *omsg, dummy;
863 u8 *addr_buf_ptr;
864 u8 addr_buf[4];
865 int i;
866
867 memset(&dummy, 0, sizeof(struct i2c_msg));
868
869
870
871 if (nmsgs > 2 || nmsgs == 0) {
872 debug("%s: Only one or two messages are supported.", __func__);
873 return -1;
874 }
875
876 omsg = nmsgs == 1 ? &dummy : msg;
877 dmsg = nmsgs == 1 ? msg : msg + 1;
878
879
880 addr_buf_ptr = &addr_buf[0];
881 for (i = omsg->len; i > 0; i--)
882 *addr_buf_ptr++ = omsg->buf[i - 1];
883
884 if (dmsg->flags & I2C_M_RD)
885 return __twsi_i2c_read(dev->base, dmsg->addr, addr_buf,
886 omsg->len, dmsg->buf, dmsg->len,
887 dev->tick);
888 else
889 return __twsi_i2c_write(dev->base, dmsg->addr, addr_buf,
890 omsg->len, dmsg->buf, dmsg->len,
891 dev->tick);
892}
893
894static const struct dm_i2c_ops mvtwsi_i2c_ops = {
895 .xfer = mvtwsi_i2c_xfer,
896 .probe_chip = mvtwsi_i2c_probe_chip,
897 .set_bus_speed = mvtwsi_i2c_set_bus_speed,
898};
899
900static const struct udevice_id mvtwsi_i2c_ids[] = {
901 { .compatible = "marvell,mv64xxx-i2c", },
902 { .compatible = "marvell,mv78230-i2c", },
903 { .compatible = "allwinner,sun6i-a31-i2c", },
904 { }
905};
906
907U_BOOT_DRIVER(i2c_mvtwsi) = {
908 .name = "i2c_mvtwsi",
909 .id = UCLASS_I2C,
910 .of_match = mvtwsi_i2c_ids,
911 .bind = mvtwsi_i2c_bind,
912 .probe = mvtwsi_i2c_probe,
913 .of_to_plat = mvtwsi_i2c_of_to_plat,
914 .priv_auto = sizeof(struct mvtwsi_i2c_dev),
915 .ops = &mvtwsi_i2c_ops,
916};
917#endif
918