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8
9#include <dm.h>
10#include <sdhci.h>
11#include <clk.h>
12#include <linux/errno.h>
13#include <mach/pic32.h>
14
15struct pic32_sdhci_plat {
16 struct mmc_config cfg;
17 struct mmc mmc;
18};
19
20static int pic32_sdhci_probe(struct udevice *dev)
21{
22 struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
23 struct pic32_sdhci_plat *plat = dev_get_plat(dev);
24 struct sdhci_host *host = dev_get_priv(dev);
25
26 struct clk clk;
27 ulong clk_rate;
28 int ret;
29
30 ret = clk_get_by_name(dev, "base_clk", &clk);
31 if (ret)
32 return ret;
33
34 clk_rate = clk_get_rate(&clk);
35 clk_free(&clk);
36
37 if (IS_ERR_VALUE(clk_rate))
38 return clk_rate;
39
40 host->ioaddr = dev_remap_addr(dev);
41
42 if (!host->ioaddr)
43 return -EINVAL;
44
45 host->name = dev->name;
46 host->quirks = SDHCI_QUIRK_NO_HISPD_BIT;
47 host->bus_width = dev_read_u32_default(dev, "bus-width", 4);
48 host->max_clk = clk_rate;
49
50 host->mmc = &plat->mmc;
51 host->mmc->dev = dev;
52
53 ret = sdhci_setup_cfg(&plat->cfg, host, 0, 0);
54 if (ret)
55 return ret;
56
57 host->mmc->priv = host;
58 upriv->mmc = host->mmc;
59
60 ret = sdhci_probe(dev);
61 if (ret)
62 return ret;
63
64 if (!dev_read_bool(dev, "microchip,use-sdcd")) {
65
66 u8 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
67 ctrl = (ctrl & ~SDHCI_CTRL_CD_TEST_INS) | SDHCI_CTRL_CD_TEST;
68 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
69 }
70
71 return 0;
72}
73
74static int pic32_sdhci_bind(struct udevice *dev)
75{
76 struct pic32_sdhci_plat *plat = dev_get_plat(dev);
77
78 return sdhci_bind(dev, &plat->mmc, &plat->cfg);
79}
80
81static const struct udevice_id pic32_sdhci_ids[] = {
82 { .compatible = "microchip,pic32mzda-sdhci" },
83 { }
84};
85
86U_BOOT_DRIVER(pic32_sdhci_drv) = {
87 .name = "pic32_sdhci",
88 .id = UCLASS_MMC,
89 .of_match = pic32_sdhci_ids,
90 .ops = &sdhci_ops,
91 .bind = pic32_sdhci_bind,
92 .probe = pic32_sdhci_probe,
93 .priv_auto = sizeof(struct sdhci_host),
94 .plat_auto = sizeof(struct pic32_sdhci_plat)
95};
96