LXR uboot/drivers/mtd/spi/sf

   1/* SPDX-License-Identifier: GPL-2.0+ */
   2/*
   3 * SPI flash internal definitions
   4 *
   5 * Copyright (C) 2008 Atmel Corporation
   6 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
   7 */
   8
   9#ifndef _SF_INTERNAL_H_
  10#define _SF_INTERNAL_H_
  11
  12#include <linux/bitops.h>
  13#include <linux/types.h>
  14#include <linux/compiler.h>
  15
  16#define SPI_NOR_MAX_ID_LEN      6
  17#define SPI_NOR_MAX_ADDR_WIDTH  4
  18
  19struct flash_info {
  20#if !CONFIG_IS_ENABLED(SPI_FLASH_TINY)
  21        char            *name;
  22#endif
  23
  24        /*
  25         * This array stores the ID bytes.
  26         * The first three bytes are the JEDIC ID.
  27         * JEDEC ID zero means "no ID" (mostly older chips).
  28         */
  29        u8              id[SPI_NOR_MAX_ID_LEN];
  30        u8              id_len;
  31
  32        /* The size listed here is what works with SPINOR_OP_SE, which isn't
  33         * necessarily called a "sector" by the vendor.
  34         */
  35        unsigned int    sector_size;
  36        u16             n_sectors;
  37
  38        u16             page_size;
  39        u16             addr_width;
  40
  41        u32             flags;
  42#define SECT_4K                 BIT(0)  /* SPINOR_OP_BE_4K works uniformly */
  43#define SPI_NOR_NO_ERASE        BIT(1)  /* No erase command needed */
  44#define SST_WRITE               BIT(2)  /* use SST byte programming */
  45#define SPI_NOR_NO_FR           BIT(3)  /* Can't do fastread */
  46#define SECT_4K_PMC             BIT(4)  /* SPINOR_OP_BE_4K_PMC works uniformly */
  47#define SPI_NOR_DUAL_READ       BIT(5)  /* Flash supports Dual Read */
  48#define SPI_NOR_QUAD_READ       BIT(6)  /* Flash supports Quad Read */
  49#define USE_FSR                 BIT(7)  /* use flag status register */
  50#define SPI_NOR_HAS_LOCK        BIT(8)  /* Flash supports lock/unlock via SR */
  51#define SPI_NOR_HAS_TB          BIT(9)  /*
  52                                         * Flash SR has Top/Bottom (TB) protect
  53                                         * bit. Must be used with
  54                                         * SPI_NOR_HAS_LOCK.
  55                                         */
  56#define SPI_S3AN                BIT(10) /*
  57                                         * Xilinx Spartan 3AN In-System Flash
  58                                         * (MFR cannot be used for probing
  59                                         * because it has the same value as
  60                                         * ATMEL flashes)
  61                                         */
  62#define SPI_NOR_4B_OPCODES      BIT(11) /*
  63                                         * Use dedicated 4byte address op codes
  64                                         * to support memory size above 128Mib.
  65                                         */
  66#define NO_CHIP_ERASE           BIT(12) /* Chip does not support chip erase */
  67#define SPI_NOR_SKIP_SFDP       BIT(13) /* Skip parsing of SFDP tables */
  68#define USE_CLSR                BIT(14) /* use CLSR command */
  69#define SPI_NOR_HAS_SST26LOCK   BIT(15) /* Flash supports lock/unlock via BPR */
  70#define SPI_NOR_OCTAL_READ      BIT(16) /* Flash supports Octal Read */
  71#define SPI_NOR_OCTAL_DTR_READ  BIT(17) /* Flash supports Octal DTR Read */
  72};
  73
  74extern const struct flash_info spi_nor_ids[];
  75
  76#define JEDEC_MFR(info) ((info)->id[0])
  77#define JEDEC_ID(info)          (((info)->id[1]) << 8 | ((info)->id[2]))
  78
  79/* Get software write-protect value (BP bits) */
  80int spi_flash_cmd_get_sw_write_prot(struct spi_flash *flash);
  81
  82
  83#if CONFIG_IS_ENABLED(SPI_FLASH_MTD)
  84int spi_flash_mtd_register(struct spi_flash *flash);
  85void spi_flash_mtd_unregister(struct spi_flash *flash);
  86#else
  87static inline int spi_flash_mtd_register(struct spi_flash *flash)
  88{
  89        return 0;
  90}
  91
  92static inline void spi_flash_mtd_unregister(struct spi_flash *flash)
  93{
  94}
  95#endif
  96
  97#endif /* _SF_INTERNAL_H_ */
  98