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10#include <common.h>
11#include <console.h>
12#include <dm.h>
13#include <log.h>
14#include <malloc.h>
15#include <net.h>
16#include <command.h>
17#include <miiphy.h>
18#include <phy.h>
19#include <errno.h>
20#include <asm/global_data.h>
21#include <dm/of_extra.h>
22#include <linux/bitops.h>
23#include <linux/delay.h>
24#include <linux/err.h>
25#include <linux/compiler.h>
26
27DECLARE_GLOBAL_DATA_PTR;
28
29
30
31
32
33
34
35
36
37
38
39
40static int genphy_config_advert(struct phy_device *phydev)
41{
42 u32 advertise;
43 int oldadv, adv, bmsr;
44 int err, changed = 0;
45
46
47 phydev->advertising &= phydev->supported;
48 advertise = phydev->advertising;
49
50
51 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
52 oldadv = adv;
53
54 if (adv < 0)
55 return adv;
56
57 adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
58 ADVERTISE_PAUSE_ASYM);
59 if (advertise & ADVERTISED_10baseT_Half)
60 adv |= ADVERTISE_10HALF;
61 if (advertise & ADVERTISED_10baseT_Full)
62 adv |= ADVERTISE_10FULL;
63 if (advertise & ADVERTISED_100baseT_Half)
64 adv |= ADVERTISE_100HALF;
65 if (advertise & ADVERTISED_100baseT_Full)
66 adv |= ADVERTISE_100FULL;
67 if (advertise & ADVERTISED_Pause)
68 adv |= ADVERTISE_PAUSE_CAP;
69 if (advertise & ADVERTISED_Asym_Pause)
70 adv |= ADVERTISE_PAUSE_ASYM;
71 if (advertise & ADVERTISED_1000baseX_Half)
72 adv |= ADVERTISE_1000XHALF;
73 if (advertise & ADVERTISED_1000baseX_Full)
74 adv |= ADVERTISE_1000XFULL;
75
76 if (adv != oldadv) {
77 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv);
78
79 if (err < 0)
80 return err;
81 changed = 1;
82 }
83
84 bmsr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
85 if (bmsr < 0)
86 return bmsr;
87
88
89
90
91
92 if (!(bmsr & BMSR_ESTATEN))
93 return changed;
94
95
96 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
97 oldadv = adv;
98
99 if (adv < 0)
100 return adv;
101
102 adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
103
104 if (phydev->supported & (SUPPORTED_1000baseT_Half |
105 SUPPORTED_1000baseT_Full)) {
106 if (advertise & SUPPORTED_1000baseT_Half)
107 adv |= ADVERTISE_1000HALF;
108 if (advertise & SUPPORTED_1000baseT_Full)
109 adv |= ADVERTISE_1000FULL;
110 }
111
112 if (adv != oldadv)
113 changed = 1;
114
115 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, adv);
116 if (err < 0)
117 return err;
118
119 return changed;
120}
121
122
123
124
125
126
127
128
129static int genphy_setup_forced(struct phy_device *phydev)
130{
131 int err;
132 int ctl = BMCR_ANRESTART;
133
134 phydev->pause = 0;
135 phydev->asym_pause = 0;
136
137 if (phydev->speed == SPEED_1000)
138 ctl |= BMCR_SPEED1000;
139 else if (phydev->speed == SPEED_100)
140 ctl |= BMCR_SPEED100;
141
142 if (phydev->duplex == DUPLEX_FULL)
143 ctl |= BMCR_FULLDPLX;
144
145 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
146
147 return err;
148}
149
150
151
152
153
154int genphy_restart_aneg(struct phy_device *phydev)
155{
156 int ctl;
157
158 ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
159
160 if (ctl < 0)
161 return ctl;
162
163 ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
164
165
166 ctl &= ~(BMCR_ISOLATE);
167
168 ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
169
170 return ctl;
171}
172
173
174
175
176
177
178
179
180
181int genphy_config_aneg(struct phy_device *phydev)
182{
183 int result;
184
185 if (phydev->autoneg != AUTONEG_ENABLE)
186 return genphy_setup_forced(phydev);
187
188 result = genphy_config_advert(phydev);
189
190 if (result < 0)
191 return result;
192
193 if (result == 0) {
194
195
196
197
198 int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
199
200 if (ctl < 0)
201 return ctl;
202
203 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
204 result = 1;
205 }
206
207
208
209
210
211 if (result > 0)
212 result = genphy_restart_aneg(phydev);
213
214 return result;
215}
216
217
218
219
220
221
222
223
224
225int genphy_update_link(struct phy_device *phydev)
226{
227 unsigned int mii_reg;
228
229
230
231
232
233 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
234
235
236
237
238
239 if (phydev->link && mii_reg & BMSR_LSTATUS)
240 return 0;
241
242 if ((phydev->autoneg == AUTONEG_ENABLE) &&
243 !(mii_reg & BMSR_ANEGCOMPLETE)) {
244 int i = 0;
245
246 printf("%s Waiting for PHY auto negotiation to complete",
247 phydev->dev->name);
248 while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
249
250
251
252 if (i > (PHY_ANEG_TIMEOUT / 50)) {
253 printf(" TIMEOUT !\n");
254 phydev->link = 0;
255 return -ETIMEDOUT;
256 }
257
258 if (ctrlc()) {
259 puts("user interrupt!\n");
260 phydev->link = 0;
261 return -EINTR;
262 }
263
264 if ((i++ % 10) == 0)
265 printf(".");
266
267 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
268 mdelay(50);
269 }
270 printf(" done\n");
271 phydev->link = 1;
272 } else {
273
274 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
275
276 if (mii_reg & BMSR_LSTATUS)
277 phydev->link = 1;
278 else
279 phydev->link = 0;
280 }
281
282 return 0;
283}
284
285
286
287
288
289
290
291
292
293
294int genphy_parse_link(struct phy_device *phydev)
295{
296 int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
297
298
299 if (phydev->autoneg == AUTONEG_ENABLE) {
300 u32 lpa = 0;
301 int gblpa = 0;
302 u32 estatus = 0;
303
304
305 if (phydev->supported & (SUPPORTED_1000baseT_Full |
306 SUPPORTED_1000baseT_Half)) {
307
308
309
310 gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
311 if (gblpa < 0) {
312 debug("Could not read MII_STAT1000. ");
313 debug("Ignoring gigabit capability\n");
314 gblpa = 0;
315 }
316 gblpa &= phy_read(phydev,
317 MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
318 }
319
320
321
322
323 phydev->speed = SPEED_10;
324 phydev->duplex = DUPLEX_HALF;
325
326
327 if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
328 phydev->speed = SPEED_1000;
329
330 if (gblpa & PHY_1000BTSR_1000FD)
331 phydev->duplex = DUPLEX_FULL;
332
333
334 return 0;
335 }
336
337 lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
338 lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA);
339
340 if (lpa & (LPA_100FULL | LPA_100HALF)) {
341 phydev->speed = SPEED_100;
342
343 if (lpa & LPA_100FULL)
344 phydev->duplex = DUPLEX_FULL;
345
346 } else if (lpa & LPA_10FULL) {
347 phydev->duplex = DUPLEX_FULL;
348 }
349
350
351
352
353
354
355
356
357
358 if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP))
359 estatus = phy_read(phydev, MDIO_DEVAD_NONE,
360 MII_ESTATUS);
361
362 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF |
363 ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) {
364 phydev->speed = SPEED_1000;
365 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL))
366 phydev->duplex = DUPLEX_FULL;
367 }
368
369 } else {
370 u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
371
372 phydev->speed = SPEED_10;
373 phydev->duplex = DUPLEX_HALF;
374
375 if (bmcr & BMCR_FULLDPLX)
376 phydev->duplex = DUPLEX_FULL;
377
378 if (bmcr & BMCR_SPEED1000)
379 phydev->speed = SPEED_1000;
380 else if (bmcr & BMCR_SPEED100)
381 phydev->speed = SPEED_100;
382 }
383
384 return 0;
385}
386
387int genphy_config(struct phy_device *phydev)
388{
389 int val;
390 u32 features;
391
392 features = (SUPPORTED_TP | SUPPORTED_MII
393 | SUPPORTED_AUI | SUPPORTED_FIBRE |
394 SUPPORTED_BNC);
395
396
397 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
398
399 if (val < 0)
400 return val;
401
402 if (val & BMSR_ANEGCAPABLE)
403 features |= SUPPORTED_Autoneg;
404
405 if (val & BMSR_100FULL)
406 features |= SUPPORTED_100baseT_Full;
407 if (val & BMSR_100HALF)
408 features |= SUPPORTED_100baseT_Half;
409 if (val & BMSR_10FULL)
410 features |= SUPPORTED_10baseT_Full;
411 if (val & BMSR_10HALF)
412 features |= SUPPORTED_10baseT_Half;
413
414 if (val & BMSR_ESTATEN) {
415 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS);
416
417 if (val < 0)
418 return val;
419
420 if (val & ESTATUS_1000_TFULL)
421 features |= SUPPORTED_1000baseT_Full;
422 if (val & ESTATUS_1000_THALF)
423 features |= SUPPORTED_1000baseT_Half;
424 if (val & ESTATUS_1000_XFULL)
425 features |= SUPPORTED_1000baseX_Full;
426 if (val & ESTATUS_1000_XHALF)
427 features |= SUPPORTED_1000baseX_Half;
428 }
429
430 phydev->supported &= features;
431 phydev->advertising &= features;
432
433 genphy_config_aneg(phydev);
434
435 return 0;
436}
437
438int genphy_startup(struct phy_device *phydev)
439{
440 int ret;
441
442 ret = genphy_update_link(phydev);
443 if (ret)
444 return ret;
445
446 return genphy_parse_link(phydev);
447}
448
449int genphy_shutdown(struct phy_device *phydev)
450{
451 return 0;
452}
453
454static struct phy_driver genphy_driver = {
455 .uid = 0xffffffff,
456 .mask = 0xffffffff,
457 .name = "Generic PHY",
458 .features = PHY_GBIT_FEATURES | SUPPORTED_MII |
459 SUPPORTED_AUI | SUPPORTED_FIBRE |
460 SUPPORTED_BNC,
461 .config = genphy_config,
462 .startup = genphy_startup,
463 .shutdown = genphy_shutdown,
464};
465
466static int genphy_init(void)
467{
468 return phy_register(&genphy_driver);
469}
470
471static LIST_HEAD(phy_drivers);
472
473int phy_init(void)
474{
475#ifdef CONFIG_NEEDS_MANUAL_RELOC
476
477
478
479
480
481 struct list_head *head = &phy_drivers;
482
483 head->next = (void *)head->next + gd->reloc_off;
484 head->prev = (void *)head->prev + gd->reloc_off;
485#endif
486
487#ifdef CONFIG_B53_SWITCH
488 phy_b53_init();
489#endif
490#ifdef CONFIG_MV88E61XX_SWITCH
491 phy_mv88e61xx_init();
492#endif
493#ifdef CONFIG_PHY_AQUANTIA
494 phy_aquantia_init();
495#endif
496#ifdef CONFIG_PHY_ATHEROS
497 phy_atheros_init();
498#endif
499#ifdef CONFIG_PHY_BROADCOM
500 phy_broadcom_init();
501#endif
502#ifdef CONFIG_PHY_CORTINA
503 phy_cortina_init();
504#endif
505#ifdef CONFIG_PHY_CORTINA_ACCESS
506 phy_cortina_access_init();
507#endif
508#ifdef CONFIG_PHY_DAVICOM
509 phy_davicom_init();
510#endif
511#ifdef CONFIG_PHY_ET1011C
512 phy_et1011c_init();
513#endif
514#ifdef CONFIG_PHY_LXT
515 phy_lxt_init();
516#endif
517#ifdef CONFIG_PHY_MARVELL
518 phy_marvell_init();
519#endif
520#ifdef CONFIG_PHY_MICREL_KSZ8XXX
521 phy_micrel_ksz8xxx_init();
522#endif
523#ifdef CONFIG_PHY_MICREL_KSZ90X1
524 phy_micrel_ksz90x1_init();
525#endif
526#ifdef CONFIG_PHY_MESON_GXL
527 phy_meson_gxl_init();
528#endif
529#ifdef CONFIG_PHY_NATSEMI
530 phy_natsemi_init();
531#endif
532#ifdef CONFIG_NXP_C45_TJA11XX_PHY
533 phy_nxp_tja11xx_init();
534#endif
535#ifdef CONFIG_PHY_REALTEK
536 phy_realtek_init();
537#endif
538#ifdef CONFIG_PHY_SMSC
539 phy_smsc_init();
540#endif
541#ifdef CONFIG_PHY_TERANETICS
542 phy_teranetics_init();
543#endif
544#ifdef CONFIG_PHY_TI
545 phy_ti_init();
546#endif
547#ifdef CONFIG_PHY_VITESSE
548 phy_vitesse_init();
549#endif
550#ifdef CONFIG_PHY_XILINX
551 phy_xilinx_init();
552#endif
553#ifdef CONFIG_PHY_MSCC
554 phy_mscc_init();
555#endif
556#ifdef CONFIG_PHY_FIXED
557 phy_fixed_init();
558#endif
559#ifdef CONFIG_PHY_NCSI
560 phy_ncsi_init();
561#endif
562#ifdef CONFIG_PHY_XILINX_GMII2RGMII
563 phy_xilinx_gmii2rgmii_init();
564#endif
565 genphy_init();
566
567 return 0;
568}
569
570int phy_register(struct phy_driver *drv)
571{
572 INIT_LIST_HEAD(&drv->list);
573 list_add_tail(&drv->list, &phy_drivers);
574
575#ifdef CONFIG_NEEDS_MANUAL_RELOC
576 if (drv->probe)
577 drv->probe += gd->reloc_off;
578 if (drv->config)
579 drv->config += gd->reloc_off;
580 if (drv->startup)
581 drv->startup += gd->reloc_off;
582 if (drv->shutdown)
583 drv->shutdown += gd->reloc_off;
584 if (drv->readext)
585 drv->readext += gd->reloc_off;
586 if (drv->writeext)
587 drv->writeext += gd->reloc_off;
588 if (drv->read_mmd)
589 drv->read_mmd += gd->reloc_off;
590 if (drv->write_mmd)
591 drv->write_mmd += gd->reloc_off;
592#endif
593 return 0;
594}
595
596int phy_set_supported(struct phy_device *phydev, u32 max_speed)
597{
598
599
600
601
602 phydev->supported &= PHY_DEFAULT_FEATURES;
603
604 switch (max_speed) {
605 default:
606 return -ENOTSUPP;
607 case SPEED_1000:
608 phydev->supported |= PHY_1000BT_FEATURES;
609
610 case SPEED_100:
611 phydev->supported |= PHY_100BT_FEATURES;
612
613 case SPEED_10:
614 phydev->supported |= PHY_10BT_FEATURES;
615 }
616
617 return 0;
618}
619
620static int phy_probe(struct phy_device *phydev)
621{
622 int err = 0;
623
624 phydev->advertising = phydev->drv->features;
625 phydev->supported = phydev->drv->features;
626
627 phydev->mmds = phydev->drv->mmds;
628
629 if (phydev->drv->probe)
630 err = phydev->drv->probe(phydev);
631
632 return err;
633}
634
635static struct phy_driver *generic_for_interface(phy_interface_t interface)
636{
637#ifdef CONFIG_PHYLIB_10G
638 if (is_10g_interface(interface))
639 return &gen10g_driver;
640#endif
641
642 return &genphy_driver;
643}
644
645static struct phy_driver *get_phy_driver(struct phy_device *phydev,
646 phy_interface_t interface)
647{
648 struct list_head *entry;
649 int phy_id = phydev->phy_id;
650 struct phy_driver *drv = NULL;
651
652 list_for_each(entry, &phy_drivers) {
653 drv = list_entry(entry, struct phy_driver, list);
654 if ((drv->uid & drv->mask) == (phy_id & drv->mask))
655 return drv;
656 }
657
658
659 return generic_for_interface(interface);
660}
661
662static struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
663 u32 phy_id, bool is_c45,
664 phy_interface_t interface)
665{
666 struct phy_device *dev;
667
668
669
670
671
672 dev = malloc(sizeof(*dev));
673 if (!dev) {
674 printf("Failed to allocate PHY device for %s:%d\n",
675 bus ? bus->name : "(null bus)", addr);
676 return NULL;
677 }
678
679 memset(dev, 0, sizeof(*dev));
680
681 dev->duplex = -1;
682 dev->link = 0;
683 dev->interface = interface;
684
685#ifdef CONFIG_DM_ETH
686 dev->node = ofnode_null();
687#endif
688
689 dev->autoneg = AUTONEG_ENABLE;
690
691 dev->addr = addr;
692 dev->phy_id = phy_id;
693 dev->is_c45 = is_c45;
694 dev->bus = bus;
695
696 dev->drv = get_phy_driver(dev, interface);
697
698 if (phy_probe(dev)) {
699 printf("%s, PHY probe failed\n", __func__);
700 return NULL;
701 }
702
703 if (addr >= 0 && addr < PHY_MAX_ADDR && phy_id != PHY_FIXED_ID)
704 bus->phymap[addr] = dev;
705
706 return dev;
707}
708
709
710
711
712
713
714
715
716
717
718int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
719{
720 int phy_reg;
721
722
723
724
725
726 phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
727
728 if (phy_reg < 0)
729 return -EIO;
730
731 *phy_id = (phy_reg & 0xffff) << 16;
732
733
734 phy_reg = bus->read(bus, addr, devad, MII_PHYSID2);
735
736 if (phy_reg < 0)
737 return -EIO;
738
739 *phy_id |= (phy_reg & 0xffff);
740
741 return 0;
742}
743
744static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
745 uint phy_mask, int devad,
746 phy_interface_t interface)
747{
748 u32 phy_id = 0xffffffff;
749 bool is_c45;
750
751 while (phy_mask) {
752 int addr = ffs(phy_mask) - 1;
753 int r = get_phy_id(bus, addr, devad, &phy_id);
754
755
756
757
758
759
760
761 if (r == 0 && phy_id == 0)
762 goto next;
763
764
765 if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff) {
766 is_c45 = (devad == MDIO_DEVAD_NONE) ? false : true;
767 return phy_device_create(bus, addr, phy_id, is_c45,
768 interface);
769 }
770next:
771 phy_mask &= ~(1 << addr);
772 }
773 return NULL;
774}
775
776static struct phy_device *search_for_existing_phy(struct mii_dev *bus,
777 uint phy_mask,
778 phy_interface_t interface)
779{
780
781 while (phy_mask) {
782 int addr = ffs(phy_mask) - 1;
783
784 if (bus->phymap[addr]) {
785 bus->phymap[addr]->interface = interface;
786 return bus->phymap[addr];
787 }
788 phy_mask &= ~(1 << addr);
789 }
790 return NULL;
791}
792
793static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
794 uint phy_mask,
795 phy_interface_t interface)
796{
797 struct phy_device *phydev;
798 int devad[] = {
799
800 MDIO_DEVAD_NONE,
801
802 MDIO_MMD_PMAPMD,
803 MDIO_MMD_WIS,
804 MDIO_MMD_PCS,
805 MDIO_MMD_PHYXS,
806 MDIO_MMD_VEND1,
807 };
808 int i, devad_cnt;
809
810 devad_cnt = sizeof(devad)/sizeof(int);
811 phydev = search_for_existing_phy(bus, phy_mask, interface);
812 if (phydev)
813 return phydev;
814
815 for (i = 0; i < devad_cnt; i++) {
816 phydev = create_phy_by_mask(bus, phy_mask,
817 devad[i], interface);
818 if (IS_ERR(phydev))
819 return NULL;
820 if (phydev)
821 return phydev;
822 }
823
824 debug("\n%s PHY: ", bus->name);
825 while (phy_mask) {
826 int addr = ffs(phy_mask) - 1;
827
828 debug("%d ", addr);
829 phy_mask &= ~(1 << addr);
830 }
831 debug("not found\n");
832
833 return NULL;
834}
835
836
837
838
839
840
841
842
843
844
845static struct phy_device *get_phy_device(struct mii_dev *bus, int addr,
846 phy_interface_t interface)
847{
848 return get_phy_device_by_mask(bus, 1 << addr, interface);
849}
850
851int phy_reset(struct phy_device *phydev)
852{
853 int reg;
854 int timeout = 500;
855 int devad = MDIO_DEVAD_NONE;
856
857 if (phydev->flags & PHY_FLAG_BROKEN_RESET)
858 return 0;
859
860#ifdef CONFIG_PHYLIB_10G
861
862 if (is_10g_interface(phydev->interface)) {
863 if (!phydev->mmds)
864 gen10g_discover_mmds(phydev);
865
866 devad = ffs(phydev->mmds) - 1;
867 }
868#endif
869
870 if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) {
871 debug("PHY reset failed\n");
872 return -1;
873 }
874
875#ifdef CONFIG_PHY_RESET_DELAY
876 udelay(CONFIG_PHY_RESET_DELAY);
877#endif
878
879
880
881
882
883 reg = phy_read(phydev, devad, MII_BMCR);
884 while ((reg & BMCR_RESET) && timeout--) {
885 reg = phy_read(phydev, devad, MII_BMCR);
886
887 if (reg < 0) {
888 debug("PHY status read failed\n");
889 return -1;
890 }
891 udelay(1000);
892 }
893
894 if (reg & BMCR_RESET) {
895 puts("PHY reset timed out\n");
896 return -1;
897 }
898
899 return 0;
900}
901
902int miiphy_reset(const char *devname, unsigned char addr)
903{
904 struct mii_dev *bus = miiphy_get_dev_by_name(devname);
905 struct phy_device *phydev;
906
907
908
909
910
911
912 phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII);
913
914 return phy_reset(phydev);
915}
916
917struct phy_device *phy_find_by_mask(struct mii_dev *bus, uint phy_mask,
918 phy_interface_t interface)
919{
920
921 if (bus->reset) {
922 bus->reset(bus);
923
924
925 mdelay(15);
926 }
927
928 return get_phy_device_by_mask(bus, phy_mask, interface);
929}
930
931#ifdef CONFIG_DM_ETH
932void phy_connect_dev(struct phy_device *phydev, struct udevice *dev)
933#else
934void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev)
935#endif
936{
937
938 phy_reset(phydev);
939 if (phydev->dev && phydev->dev != dev) {
940 printf("%s:%d is connected to %s. Reconnecting to %s\n",
941 phydev->bus->name, phydev->addr,
942 phydev->dev->name, dev->name);
943 }
944 phydev->dev = dev;
945 debug("%s connected to %s\n", dev->name, phydev->drv->name);
946}
947
948#ifdef CONFIG_PHY_XILINX_GMII2RGMII
949static struct phy_device *phy_connect_gmii2rgmii(struct mii_dev *bus,
950 struct udevice *dev,
951 phy_interface_t interface)
952{
953 struct phy_device *phydev = NULL;
954 ofnode node;
955
956 ofnode_for_each_subnode(node, dev_ofnode(dev)) {
957 node = ofnode_by_compatible(node, "xlnx,gmii-to-rgmii-1.0");
958 if (ofnode_valid(node)) {
959 phydev = phy_device_create(bus, 0,
960 PHY_GMII2RGMII_ID, false,
961 interface);
962 if (phydev)
963 phydev->node = node;
964 break;
965 }
966
967 node = ofnode_first_subnode(node);
968 }
969
970 return phydev;
971}
972#endif
973
974#ifdef CONFIG_PHY_FIXED
975
976
977
978
979
980
981
982
983struct phy_device *fixed_phy_create(ofnode node)
984{
985 phy_interface_t interface = PHY_INTERFACE_MODE_NONE;
986 struct phy_device *phydev;
987 const char *if_str;
988 ofnode subnode;
989
990 if_str = ofnode_read_string(node, "phy-mode");
991 if (!if_str) {
992 if_str = ofnode_read_string(node, "phy-interface-type");
993 }
994 if (if_str) {
995 interface = phy_get_interface_by_name(if_str);
996 }
997
998 subnode = ofnode_find_subnode(node, "fixed-link");
999 if (!ofnode_valid(subnode)) {
1000 return NULL;
1001 }
1002
1003 phydev = phy_device_create(NULL, 0, PHY_FIXED_ID, false, interface);
1004 if (phydev)
1005 phydev->node = subnode;
1006
1007 return phydev;
1008}
1009
1010static struct phy_device *phy_connect_fixed(struct mii_dev *bus,
1011 struct udevice *dev,
1012 phy_interface_t interface)
1013{
1014 ofnode node = dev_ofnode(dev), subnode;
1015 struct phy_device *phydev = NULL;
1016
1017 if (ofnode_phy_is_fixed_link(node, &subnode)) {
1018 phydev = phy_device_create(bus, 0, PHY_FIXED_ID,
1019 false, interface);
1020 if (phydev)
1021 phydev->node = subnode;
1022 }
1023
1024 return phydev;
1025}
1026#endif
1027
1028#ifdef CONFIG_DM_ETH
1029struct phy_device *phy_connect(struct mii_dev *bus, int addr,
1030 struct udevice *dev,
1031 phy_interface_t interface)
1032#else
1033struct phy_device *phy_connect(struct mii_dev *bus, int addr,
1034 struct eth_device *dev,
1035 phy_interface_t interface)
1036#endif
1037{
1038 struct phy_device *phydev = NULL;
1039 uint mask = (addr >= 0) ? (1 << addr) : 0xffffffff;
1040
1041#ifdef CONFIG_PHY_FIXED
1042 phydev = phy_connect_fixed(bus, dev, interface);
1043#endif
1044
1045#ifdef CONFIG_PHY_NCSI
1046 if (!phydev)
1047 phydev = phy_device_create(bus, 0, PHY_NCSI_ID, false, interface);
1048#endif
1049
1050#ifdef CONFIG_PHY_XILINX_GMII2RGMII
1051 if (!phydev)
1052 phydev = phy_connect_gmii2rgmii(bus, dev, interface);
1053#endif
1054
1055 if (!phydev)
1056 phydev = phy_find_by_mask(bus, mask, interface);
1057
1058 if (phydev)
1059 phy_connect_dev(phydev, dev);
1060 else
1061 printf("Could not get PHY for %s: addr %d\n", bus->name, addr);
1062 return phydev;
1063}
1064
1065
1066
1067
1068int phy_startup(struct phy_device *phydev)
1069{
1070 if (phydev->drv->startup)
1071 return phydev->drv->startup(phydev);
1072
1073 return 0;
1074}
1075
1076__weak int board_phy_config(struct phy_device *phydev)
1077{
1078 if (phydev->drv->config)
1079 return phydev->drv->config(phydev);
1080 return 0;
1081}
1082
1083int phy_config(struct phy_device *phydev)
1084{
1085
1086 return board_phy_config(phydev);
1087}
1088
1089int phy_shutdown(struct phy_device *phydev)
1090{
1091 if (phydev->drv->shutdown)
1092 phydev->drv->shutdown(phydev);
1093
1094 return 0;
1095}
1096
1097int phy_get_interface_by_name(const char *str)
1098{
1099 int i;
1100
1101 for (i = 0; i < PHY_INTERFACE_MODE_COUNT; i++) {
1102 if (!strcmp(str, phy_interface_strings[i]))
1103 return i;
1104 }
1105
1106 return -1;
1107}
1108