LXR uboot/include/configs/openpiton-riscv64.h

   1/* SPDX-License-Identifier: GPL-2.0+ */
   2/*
   3 * Copyright (c) 2019 Western Digital Corporation or its affiliates.
   4 * Copyright (c) 2021 Tianrui Wei
   5 *
   6 * Authors:
   7 *   Anup Patel <anup.patel@wdc.com>
   8 *   Tianrui Wei <tianrui-wei@outlook.com>
   9 */
  10
  11#ifndef __OPENPITON_RISCV64_CONFIG_H
  12#define __OPENPITON_RISCV64_CONFIG_H
  13
  14#include <linux/sizes.h>
  15
  16/* Environment options */
  17#define CONFIG_SYS_SDRAM_BASE 0x80000000
  18#define CONFIG_SYS_INIT_SP_ADDR     (CONFIG_SYS_SDRAM_BASE + SZ_32M)
  19#define CONFIG_SYS_BOOTM_LEN        SZ_256M
  20
  21#ifdef CONFIG_SPL
  22#define CONFIG_SPL_MAX_SIZE     0x00100000
  23#define CONFIG_SPL_BSS_START_ADDR   0x82000000
  24#define CONFIG_SPL_BSS_MAX_SIZE     0x00100000
  25#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
  26                CONFIG_SPL_BSS_MAX_SIZE)
  27#define CONFIG_SYS_SPL_MALLOC_SIZE  0x0100000
  28#define CONFIG_SPL_STACK    (0x80000000 + 0x04000000 - \
  29                GENERATED_GBL_DATA_SIZE)
  30
  31#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "boot/fw_payload.bin"
  32#define CONFIG_SPL_GD_ADDR 0x85000000
  33#endif
  34
  35/* ---------------------------------------------------------------------
  36 * Board boot configuration
  37 */
  38
  39#define CONFIG_EXTRA_ENV_SETTINGS \
  40        "fdt_addr_r=0x86000000\0" \
  41        "kernel_addr_r=0x80200000\0" \
  42        "image=boot/Image\0" \
  43        "mmcdev=0\0" \
  44        "mmcpart=1\0"
  45
  46#define CONFIG_USE_BOOTCOMMAND
  47#define CONFIG_BOOTCOMMAND \
  48        "fdt addr ${fdtcontroladdr}; " \
  49        "fdt move ${fdtcontroladdr} ${fdt_addr_r}; " \
  50        "load mmc ${mmcdev}:${mmcpart} ${kernel_addr_r} ${image}; " \
  51        "booti ${kernel_addr_r} - ${fdt_addr_r}; "
  52
  53#endif/* __CONFIG_H */
  54