1/* 2 * ARM Power State and Coordination Interface (PSCI) header 3 * 4 * This header holds common PSCI defines and macros shared 5 * by: ARM kernel, ARM64 kernel, KVM ARM/ARM64 and user space. 6 * 7 * Copyright (C) 2014 Linaro Ltd. 8 * Author: Anup Patel <anup.patel@linaro.org> 9 */ 10 11#ifndef _UAPI_LINUX_PSCI_H 12#define _UAPI_LINUX_PSCI_H 13 14/* 15 * PSCI v0.1 interface 16 * 17 * The PSCI v0.1 function numbers are implementation defined. 18 * 19 * Only PSCI return values such as: SUCCESS, NOT_SUPPORTED, 20 * INVALID_PARAMS, and DENIED defined below are applicable 21 * to PSCI v0.1. 22 */ 23 24/* PSCI v0.2 interface */ 25#define PSCI_0_2_FN_BASE 0x84000000 26#define PSCI_0_2_FN(n) (PSCI_0_2_FN_BASE + (n)) 27#define PSCI_0_2_64BIT 0x40000000 28#define PSCI_0_2_FN64_BASE \ 29 (PSCI_0_2_FN_BASE + PSCI_0_2_64BIT) 30#define PSCI_0_2_FN64(n) (PSCI_0_2_FN64_BASE + (n)) 31 32#define PSCI_0_2_FN_PSCI_VERSION PSCI_0_2_FN(0) 33#define PSCI_0_2_FN_CPU_SUSPEND PSCI_0_2_FN(1) 34#define PSCI_0_2_FN_CPU_OFF PSCI_0_2_FN(2) 35#define PSCI_0_2_FN_CPU_ON PSCI_0_2_FN(3) 36#define PSCI_0_2_FN_AFFINITY_INFO PSCI_0_2_FN(4) 37#define PSCI_0_2_FN_MIGRATE PSCI_0_2_FN(5) 38#define PSCI_0_2_FN_MIGRATE_INFO_TYPE PSCI_0_2_FN(6) 39#define PSCI_0_2_FN_MIGRATE_INFO_UP_CPU PSCI_0_2_FN(7) 40#define PSCI_0_2_FN_SYSTEM_OFF PSCI_0_2_FN(8) 41#define PSCI_0_2_FN_SYSTEM_RESET PSCI_0_2_FN(9) 42 43#define PSCI_0_2_FN64_CPU_SUSPEND PSCI_0_2_FN64(1) 44#define PSCI_0_2_FN64_CPU_ON PSCI_0_2_FN64(3) 45#define PSCI_0_2_FN64_AFFINITY_INFO PSCI_0_2_FN64(4) 46#define PSCI_0_2_FN64_MIGRATE PSCI_0_2_FN64(5) 47#define PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU PSCI_0_2_FN64(7) 48 49#define PSCI_1_0_FN_PSCI_FEATURES PSCI_0_2_FN(10) 50#define PSCI_1_0_FN_SYSTEM_SUSPEND PSCI_0_2_FN(14) 51#define PSCI_1_0_FN_SET_SUSPEND_MODE PSCI_0_2_FN(15) 52#define PSCI_1_1_FN_SYSTEM_RESET2 PSCI_0_2_FN(18) 53 54#define PSCI_1_0_FN64_SYSTEM_SUSPEND PSCI_0_2_FN64(14) 55#define PSCI_1_1_FN64_SYSTEM_RESET2 PSCI_0_2_FN64(18) 56 57/* PSCI v0.2 power state encoding for CPU_SUSPEND function */ 58#define PSCI_0_2_POWER_STATE_ID_MASK 0xffff 59#define PSCI_0_2_POWER_STATE_ID_SHIFT 0 60#define PSCI_0_2_POWER_STATE_TYPE_SHIFT 16 61#define PSCI_0_2_POWER_STATE_TYPE_MASK \ 62 (0x1 << PSCI_0_2_POWER_STATE_TYPE_SHIFT) 63#define PSCI_0_2_POWER_STATE_AFFL_SHIFT 24 64#define PSCI_0_2_POWER_STATE_AFFL_MASK \ 65 (0x3 << PSCI_0_2_POWER_STATE_AFFL_SHIFT) 66 67/* PSCI extended power state encoding for CPU_SUSPEND function */ 68#define PSCI_1_0_EXT_POWER_STATE_ID_MASK 0xfffffff 69#define PSCI_1_0_EXT_POWER_STATE_ID_SHIFT 0 70#define PSCI_1_0_EXT_POWER_STATE_TYPE_SHIFT 30 71#define PSCI_1_0_EXT_POWER_STATE_TYPE_MASK \ 72 (0x1 << PSCI_1_0_EXT_POWER_STATE_TYPE_SHIFT) 73 74/* PSCI v0.2 affinity level state returned by AFFINITY_INFO */ 75#define PSCI_0_2_AFFINITY_LEVEL_ON 0 76#define PSCI_0_2_AFFINITY_LEVEL_OFF 1 77#define PSCI_0_2_AFFINITY_LEVEL_ON_PENDING 2 78 79/* PSCI v0.2 multicore support in Trusted OS returned by MIGRATE_INFO_TYPE */ 80#define PSCI_0_2_TOS_UP_MIGRATE 0 81#define PSCI_0_2_TOS_UP_NO_MIGRATE 1 82#define PSCI_0_2_TOS_MP 2 83 84/* PSCI version decoding (independent of PSCI version) */ 85#define PSCI_VERSION_MAJOR_SHIFT 16 86#define PSCI_VERSION_MINOR_MASK \ 87 ((1U << PSCI_VERSION_MAJOR_SHIFT) - 1) 88#define PSCI_VERSION_MAJOR_MASK ~PSCI_VERSION_MINOR_MASK 89#define PSCI_VERSION_MAJOR(ver) \ 90 (((ver) & PSCI_VERSION_MAJOR_MASK) >> PSCI_VERSION_MAJOR_SHIFT) 91#define PSCI_VERSION_MINOR(ver) \ 92 ((ver) & PSCI_VERSION_MINOR_MASK) 93#define PSCI_VERSION(maj, min) \ 94 ((((maj) << PSCI_VERSION_MAJOR_SHIFT) & PSCI_VERSION_MAJOR_MASK) | \ 95 ((min) & PSCI_VERSION_MINOR_MASK)) 96 97/* PSCI features decoding (>=1.0) */ 98#define PSCI_1_0_FEATURES_CPU_SUSPEND_PF_SHIFT 1 99#define PSCI_1_0_FEATURES_CPU_SUSPEND_PF_MASK \ 100 (0x1 << PSCI_1_0_FEATURES_CPU_SUSPEND_PF_SHIFT) 101 102#define PSCI_1_0_OS_INITIATED BIT(0) 103#define PSCI_1_0_SUSPEND_MODE_PC 0 104#define PSCI_1_0_SUSPEND_MODE_OSI 1 105 106/* PSCI return values (inclusive of all PSCI versions) */ 107#define PSCI_RET_SUCCESS 0 108#define PSCI_RET_NOT_SUPPORTED -1 109#define PSCI_RET_INVALID_PARAMS -2 110#define PSCI_RET_DENIED -3 111#define PSCI_RET_ALREADY_ON -4 112#define PSCI_RET_ON_PENDING -5 113#define PSCI_RET_INTERNAL_FAILURE -6 114#define PSCI_RET_NOT_PRESENT -7 115#define PSCI_RET_DISABLED -8 116#define PSCI_RET_INVALID_ADDRESS -9 117 118#ifdef CONFIG_ARM_PSCI_FW 119unsigned long invoke_psci_fn(unsigned long a0, unsigned long a1, 120 unsigned long a2, unsigned long a3); 121void psci_sys_reset(u32 type); 122void psci_sys_poweroff(void); 123 124#else 125static inline unsigned long invoke_psci_fn(unsigned long a0, unsigned long a1, 126 unsigned long a2, unsigned long a3) 127{ 128 return PSCI_RET_DISABLED; 129} 130#endif 131 132#endif /* _UAPI_LINUX_PSCI_H */ 133