1
2
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4
5
6#ifndef USE_HOSTCC
7#include <common.h>
8#include <boot_fit.h>
9#include <dm.h>
10#include <hang.h>
11#include <init.h>
12#include <log.h>
13#include <malloc.h>
14#include <net.h>
15#include <dm/of_extra.h>
16#include <env.h>
17#include <errno.h>
18#include <fdtdec.h>
19#include <fdt_support.h>
20#include <gzip.h>
21#include <mapmem.h>
22#include <linux/libfdt.h>
23#include <serial.h>
24#include <asm/global_data.h>
25#include <asm/sections.h>
26#include <linux/ctype.h>
27#include <linux/lzo.h>
28#include <linux/ioport.h>
29
30DECLARE_GLOBAL_DATA_PTR;
31
32
33
34
35
36
37
38
39
40
41
42#define COMPAT(id, name) name
43static const char * const compat_names[COMPAT_COUNT] = {
44 COMPAT(UNKNOWN, "<none>"),
45 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
46 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
47 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
48 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
49 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
50 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
51 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
52 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
53 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
54 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
55 COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
56 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
57 COMPAT(INTEL_MICROCODE, "intel,microcode"),
58 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
59 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
60 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
61 COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
62 COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
63 COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
64 COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
65 COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
66 COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
67 COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
68 COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
69 COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
70 COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
71 COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
72 COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
73 COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
74 COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
75 COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
76 COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
77};
78
79const char *fdtdec_get_compatible(enum fdt_compat_id id)
80{
81
82 assert(id >= 0 && id < COMPAT_COUNT);
83 return compat_names[id];
84}
85
86fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
87 const char *prop_name, int index, int na,
88 int ns, fdt_size_t *sizep,
89 bool translate)
90{
91 const fdt32_t *prop, *prop_end;
92 const fdt32_t *prop_addr, *prop_size, *prop_after_size;
93 int len;
94 fdt_addr_t addr;
95
96 debug("%s: %s: ", __func__, prop_name);
97
98 prop = fdt_getprop(blob, node, prop_name, &len);
99 if (!prop) {
100 debug("(not found)\n");
101 return FDT_ADDR_T_NONE;
102 }
103 prop_end = prop + (len / sizeof(*prop));
104
105 prop_addr = prop + (index * (na + ns));
106 prop_size = prop_addr + na;
107 prop_after_size = prop_size + ns;
108 if (prop_after_size > prop_end) {
109 debug("(not enough data: expected >= %d cells, got %d cells)\n",
110 (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
111 return FDT_ADDR_T_NONE;
112 }
113
114#if CONFIG_IS_ENABLED(OF_TRANSLATE)
115 if (translate)
116 addr = fdt_translate_address(blob, node, prop_addr);
117 else
118#endif
119 addr = fdtdec_get_number(prop_addr, na);
120
121 if (sizep) {
122 *sizep = fdtdec_get_number(prop_size, ns);
123 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
124 (unsigned long long)*sizep);
125 } else {
126 debug("addr=%08llx\n", (unsigned long long)addr);
127 }
128
129 return addr;
130}
131
132fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
133 int node, const char *prop_name,
134 int index, fdt_size_t *sizep,
135 bool translate)
136{
137 int na, ns;
138
139 debug("%s: ", __func__);
140
141 na = fdt_address_cells(blob, parent);
142 if (na < 1) {
143 debug("(bad #address-cells)\n");
144 return FDT_ADDR_T_NONE;
145 }
146
147 ns = fdt_size_cells(blob, parent);
148 if (ns < 0) {
149 debug("(bad #size-cells)\n");
150 return FDT_ADDR_T_NONE;
151 }
152
153 debug("na=%d, ns=%d, ", na, ns);
154
155 return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
156 ns, sizep, translate);
157}
158
159fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
160 const char *prop_name, int index,
161 fdt_size_t *sizep,
162 bool translate)
163{
164 int parent;
165
166 debug("%s: ", __func__);
167
168 parent = fdt_parent_offset(blob, node);
169 if (parent < 0) {
170 debug("(no parent found)\n");
171 return FDT_ADDR_T_NONE;
172 }
173
174 return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
175 index, sizep, translate);
176}
177
178fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
179 const char *prop_name, fdt_size_t *sizep)
180{
181 int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
182
183 return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
184 sizeof(fdt_addr_t) / sizeof(fdt32_t),
185 ns, sizep, false);
186}
187
188fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
189{
190 return fdtdec_get_addr_size(blob, node, prop_name, NULL);
191}
192
193int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
194{
195 const char *list, *end;
196 int len;
197
198 list = fdt_getprop(blob, node, "compatible", &len);
199 if (!list)
200 return -ENOENT;
201
202 end = list + len;
203 while (list < end) {
204 len = strlen(list);
205 if (len >= strlen("pciVVVV,DDDD")) {
206 char *s = strstr(list, "pci");
207
208
209
210
211
212 if (s && s[7] == ',' &&
213 (s[12] == '.' || s[12] == 0)) {
214 s += 3;
215 *vendor = simple_strtol(s, NULL, 16);
216
217 s += 5;
218 *device = simple_strtol(s, NULL, 16);
219
220 return 0;
221 }
222 }
223 list += (len + 1);
224 }
225
226 return -ENOENT;
227}
228
229int fdtdec_get_pci_bar32(const struct udevice *dev, struct fdt_pci_addr *addr,
230 u32 *bar)
231{
232 int barnum;
233
234
235 barnum = addr->phys_hi & 0xff;
236 if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
237 return -EINVAL;
238
239 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
240
241
242
243
244
245
246#if !IS_ENABLED(CONFIG_NDS32)
247 *bar = dm_pci_read_bar32(dev, barnum);
248#endif
249
250 return 0;
251}
252
253int fdtdec_get_pci_bus_range(const void *blob, int node,
254 struct fdt_resource *res)
255{
256 const u32 *values;
257 int len;
258
259 values = fdt_getprop(blob, node, "bus-range", &len);
260 if (!values || len < sizeof(*values) * 2)
261 return -EINVAL;
262
263 res->start = fdt32_to_cpu(*values++);
264 res->end = fdt32_to_cpu(*values);
265
266 return 0;
267}
268
269uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
270 uint64_t default_val)
271{
272 const unaligned_fdt64_t *cell64;
273 int length;
274
275 cell64 = fdt_getprop(blob, node, prop_name, &length);
276 if (!cell64 || length < sizeof(*cell64))
277 return default_val;
278
279 return fdt64_to_cpu(*cell64);
280}
281
282int fdtdec_get_is_enabled(const void *blob, int node)
283{
284 const char *cell;
285
286
287
288
289
290
291
292
293 cell = fdt_getprop(blob, node, "status", NULL);
294 if (cell)
295 return strcmp(cell, "okay") == 0;
296 return 1;
297}
298
299enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
300{
301 enum fdt_compat_id id;
302
303
304 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
305 if (fdt_node_check_compatible(blob, node,
306 compat_names[id]) == 0)
307 return id;
308 return COMPAT_UNKNOWN;
309}
310
311int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
312{
313 return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
314}
315
316int fdtdec_next_compatible_subnode(const void *blob, int node,
317 enum fdt_compat_id id, int *depthp)
318{
319 do {
320 node = fdt_next_node(blob, node, depthp);
321 } while (*depthp > 1);
322
323
324 if (*depthp == 1 && 0 == fdt_node_check_compatible(
325 blob, node, compat_names[id]))
326 return node;
327
328 return -FDT_ERR_NOTFOUND;
329}
330
331int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
332 int *upto)
333{
334#define MAX_STR_LEN 20
335 char str[MAX_STR_LEN + 20];
336 int node, err;
337
338
339 assert(strlen(name) < MAX_STR_LEN);
340 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
341 node = fdt_path_offset(blob, str);
342 if (node < 0)
343 return node;
344 err = fdt_node_check_compatible(blob, node, compat_names[id]);
345 if (err < 0)
346 return err;
347 if (err)
348 return -FDT_ERR_NOTFOUND;
349 (*upto)++;
350 return node;
351}
352
353int fdtdec_find_aliases_for_id(const void *blob, const char *name,
354 enum fdt_compat_id id, int *node_list,
355 int maxcount)
356{
357 memset(node_list, '\0', sizeof(*node_list) * maxcount);
358
359 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
360}
361
362
363int fdtdec_add_aliases_for_id(const void *blob, const char *name,
364 enum fdt_compat_id id, int *node_list,
365 int maxcount)
366{
367 int name_len = strlen(name);
368 int nodes[maxcount];
369 int num_found = 0;
370 int offset, node;
371 int alias_node;
372 int count;
373 int i, j;
374
375
376 alias_node = fdt_path_offset(blob, "/aliases");
377
378
379
380
381
382 memset(nodes, '\0', sizeof(nodes));
383
384
385 for (node = count = 0; node >= 0 && count < maxcount;) {
386 node = fdtdec_next_compatible(blob, node, id);
387 if (node >= 0)
388 nodes[count++] = node;
389 }
390 if (node >= 0)
391 debug("%s: warning: maxcount exceeded with alias '%s'\n",
392 __func__, name);
393
394
395 for (offset = fdt_first_property_offset(blob, alias_node);
396 offset > 0;
397 offset = fdt_next_property_offset(blob, offset)) {
398 const struct fdt_property *prop;
399 const char *path;
400 int number;
401 int found;
402
403 node = 0;
404 prop = fdt_get_property_by_offset(blob, offset, NULL);
405 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
406 if (prop->len && 0 == strncmp(path, name, name_len))
407 node = fdt_path_offset(blob, prop->data);
408 if (node <= 0)
409 continue;
410
411
412 number = dectoul(path + name_len, NULL);
413 if (number < 0 || number >= maxcount) {
414 debug("%s: warning: alias '%s' is out of range\n",
415 __func__, path);
416 continue;
417 }
418
419
420 found = -1;
421 for (j = 0; j < count; j++)
422 if (nodes[j] == node) {
423 found = j;
424 break;
425 }
426
427 if (found == -1) {
428 debug("%s: warning: alias '%s' points to a node "
429 "'%s' that is missing or is not compatible "
430 " with '%s'\n", __func__, path,
431 fdt_get_name(blob, node, NULL),
432 compat_names[id]);
433 continue;
434 }
435
436
437
438
439
440 if (fdtdec_get_is_enabled(blob, node)) {
441 if (node_list[number]) {
442 debug("%s: warning: alias '%s' requires that "
443 "a node be placed in the list in a "
444 "position which is already filled by "
445 "node '%s'\n", __func__, path,
446 fdt_get_name(blob, node, NULL));
447 continue;
448 }
449 node_list[number] = node;
450 if (number >= num_found)
451 num_found = number + 1;
452 }
453 nodes[found] = 0;
454 }
455
456
457 for (i = j = 0; i < maxcount; i++) {
458 if (!node_list[i]) {
459 for (; j < maxcount; j++)
460 if (nodes[j] &&
461 fdtdec_get_is_enabled(blob, nodes[j]))
462 break;
463
464
465 if (j == maxcount)
466 break;
467
468 assert(!node_list[i]);
469 node_list[i] = nodes[j++];
470 if (i >= num_found)
471 num_found = i + 1;
472 }
473 }
474
475 return num_found;
476}
477
478int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
479 int *seqp)
480{
481 int base_len = strlen(base);
482 const char *find_name;
483 int find_namelen;
484 int prop_offset;
485 int aliases;
486
487 find_name = fdt_get_name(blob, offset, &find_namelen);
488 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
489
490 aliases = fdt_path_offset(blob, "/aliases");
491 for (prop_offset = fdt_first_property_offset(blob, aliases);
492 prop_offset > 0;
493 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
494 const char *prop;
495 const char *name;
496 const char *slash;
497 int len, val;
498
499 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
500 debug(" - %s, %s\n", name, prop);
501 if (len < find_namelen || *prop != '/' || prop[len - 1] ||
502 strncmp(name, base, base_len))
503 continue;
504
505 slash = strrchr(prop, '/');
506 if (strcmp(slash + 1, find_name))
507 continue;
508
509
510
511
512
513 if (IS_ENABLED(CONFIG_PHANDLE_CHECK_SEQ)) {
514 if (fdt_get_phandle(blob, offset) !=
515 fdt_get_phandle(blob, fdt_path_offset(blob, prop)))
516 continue;
517 }
518
519 val = trailing_strtol(name);
520 if (val != -1) {
521 *seqp = val;
522 debug("Found seq %d\n", *seqp);
523 return 0;
524 }
525 }
526
527 debug("Not found\n");
528 return -ENOENT;
529}
530
531int fdtdec_get_alias_highest_id(const void *blob, const char *base)
532{
533 int base_len = strlen(base);
534 int prop_offset;
535 int aliases;
536 int max = -1;
537
538 debug("Looking for highest alias id for '%s'\n", base);
539
540 aliases = fdt_path_offset(blob, "/aliases");
541 for (prop_offset = fdt_first_property_offset(blob, aliases);
542 prop_offset > 0;
543 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
544 const char *prop;
545 const char *name;
546 int len, val;
547
548 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
549 debug(" - %s, %s\n", name, prop);
550 if (*prop != '/' || prop[len - 1] ||
551 strncmp(name, base, base_len))
552 continue;
553
554 val = trailing_strtol(name);
555 if (val > max) {
556 debug("Found seq %d\n", val);
557 max = val;
558 }
559 }
560
561 return max;
562}
563
564const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
565{
566 int chosen_node;
567
568 if (!blob)
569 return NULL;
570 chosen_node = fdt_path_offset(blob, "/chosen");
571 return fdt_getprop(blob, chosen_node, name, NULL);
572}
573
574int fdtdec_get_chosen_node(const void *blob, const char *name)
575{
576 const char *prop;
577
578 prop = fdtdec_get_chosen_prop(blob, name);
579 if (!prop)
580 return -FDT_ERR_NOTFOUND;
581 return fdt_path_offset(blob, prop);
582}
583
584int fdtdec_check_fdt(void)
585{
586
587
588
589
590
591
592 assert(!fdtdec_prepare_fdt());
593 return 0;
594}
595
596
597
598
599
600
601int fdtdec_prepare_fdt(void)
602{
603 if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
604 fdt_check_header(gd->fdt_blob)) {
605#ifdef CONFIG_SPL_BUILD
606 puts("Missing DTB\n");
607#else
608 printf("No valid device tree binary found at %p\n",
609 gd->fdt_blob);
610# ifdef DEBUG
611 if (gd->fdt_blob) {
612 printf("fdt_blob=%p\n", gd->fdt_blob);
613 print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
614 32, 0);
615 }
616# endif
617#endif
618 return -1;
619 }
620 return 0;
621}
622
623int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
624{
625 const u32 *phandle;
626 int lookup;
627
628 debug("%s: %s\n", __func__, prop_name);
629 phandle = fdt_getprop(blob, node, prop_name, NULL);
630 if (!phandle)
631 return -FDT_ERR_NOTFOUND;
632
633 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
634 return lookup;
635}
636
637
638
639
640
641
642
643
644
645
646
647
648static const void *get_prop_check_min_len(const void *blob, int node,
649 const char *prop_name, int min_len,
650 int *err)
651{
652 const void *cell;
653 int len;
654
655 debug("%s: %s\n", __func__, prop_name);
656 cell = fdt_getprop(blob, node, prop_name, &len);
657 if (!cell)
658 *err = -FDT_ERR_NOTFOUND;
659 else if (len < min_len)
660 *err = -FDT_ERR_BADLAYOUT;
661 else
662 *err = 0;
663 return cell;
664}
665
666int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
667 u32 *array, int count)
668{
669 const u32 *cell;
670 int err = 0;
671
672 debug("%s: %s\n", __func__, prop_name);
673 cell = get_prop_check_min_len(blob, node, prop_name,
674 sizeof(u32) * count, &err);
675 if (!err) {
676 int i;
677
678 for (i = 0; i < count; i++)
679 array[i] = fdt32_to_cpu(cell[i]);
680 }
681 return err;
682}
683
684int fdtdec_get_int_array_count(const void *blob, int node,
685 const char *prop_name, u32 *array, int count)
686{
687 const u32 *cell;
688 int len, elems;
689 int i;
690
691 debug("%s: %s\n", __func__, prop_name);
692 cell = fdt_getprop(blob, node, prop_name, &len);
693 if (!cell)
694 return -FDT_ERR_NOTFOUND;
695 elems = len / sizeof(u32);
696 if (count > elems)
697 count = elems;
698 for (i = 0; i < count; i++)
699 array[i] = fdt32_to_cpu(cell[i]);
700
701 return count;
702}
703
704const u32 *fdtdec_locate_array(const void *blob, int node,
705 const char *prop_name, int count)
706{
707 const u32 *cell;
708 int err;
709
710 cell = get_prop_check_min_len(blob, node, prop_name,
711 sizeof(u32) * count, &err);
712 return err ? NULL : cell;
713}
714
715int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
716{
717 const s32 *cell;
718 int len;
719
720 debug("%s: %s\n", __func__, prop_name);
721 cell = fdt_getprop(blob, node, prop_name, &len);
722 return cell != NULL;
723}
724
725int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
726 const char *list_name,
727 const char *cells_name,
728 int cell_count, int index,
729 struct fdtdec_phandle_args *out_args)
730{
731 const __be32 *list, *list_end;
732 int rc = 0, size, cur_index = 0;
733 uint32_t count = 0;
734 int node = -1;
735 int phandle;
736
737
738 list = fdt_getprop(blob, src_node, list_name, &size);
739 if (!list)
740 return -ENOENT;
741 list_end = list + size / sizeof(*list);
742
743
744 while (list < list_end) {
745 rc = -EINVAL;
746 count = 0;
747
748
749
750
751
752 phandle = be32_to_cpup(list++);
753 if (phandle) {
754
755
756
757
758
759
760
761
762
763 if (cells_name || cur_index == index) {
764 node = fdt_node_offset_by_phandle(blob,
765 phandle);
766 if (node < 0) {
767 debug("%s: could not find phandle\n",
768 fdt_get_name(blob, src_node,
769 NULL));
770 goto err;
771 }
772 }
773
774 if (cells_name) {
775 count = fdtdec_get_int(blob, node, cells_name,
776 -1);
777 if (count == -1) {
778 debug("%s: could not get %s for %s\n",
779 fdt_get_name(blob, src_node,
780 NULL),
781 cells_name,
782 fdt_get_name(blob, node,
783 NULL));
784 goto err;
785 }
786 } else {
787 count = cell_count;
788 }
789
790
791
792
793
794 if (list + count > list_end) {
795 debug("%s: arguments longer than property\n",
796 fdt_get_name(blob, src_node, NULL));
797 goto err;
798 }
799 }
800
801
802
803
804
805
806
807 rc = -ENOENT;
808 if (cur_index == index) {
809 if (!phandle)
810 goto err;
811
812 if (out_args) {
813 int i;
814
815 if (count > MAX_PHANDLE_ARGS) {
816 debug("%s: too many arguments %d\n",
817 fdt_get_name(blob, src_node,
818 NULL), count);
819 count = MAX_PHANDLE_ARGS;
820 }
821 out_args->node = node;
822 out_args->args_count = count;
823 for (i = 0; i < count; i++) {
824 out_args->args[i] =
825 be32_to_cpup(list++);
826 }
827 }
828
829
830 return 0;
831 }
832
833 node = -1;
834 list += count;
835 cur_index++;
836 }
837
838
839
840
841
842
843
844 rc = index < 0 ? cur_index : -ENOENT;
845 err:
846 return rc;
847}
848
849int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
850 u8 *array, int count)
851{
852 const u8 *cell;
853 int err;
854
855 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
856 if (!err)
857 memcpy(array, cell, count);
858 return err;
859}
860
861const u8 *fdtdec_locate_byte_array(const void *blob, int node,
862 const char *prop_name, int count)
863{
864 const u8 *cell;
865 int err;
866
867 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
868 if (err)
869 return NULL;
870 return cell;
871}
872
873u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
874{
875 u64 number = 0;
876
877 while (cells--)
878 number = (number << 32) | fdt32_to_cpu(*ptr++);
879
880 return number;
881}
882
883int fdt_get_resource(const void *fdt, int node, const char *property,
884 unsigned int index, struct fdt_resource *res)
885{
886 const fdt32_t *ptr, *end;
887 int na, ns, len, parent;
888 unsigned int i = 0;
889
890 parent = fdt_parent_offset(fdt, node);
891 if (parent < 0)
892 return parent;
893
894 na = fdt_address_cells(fdt, parent);
895 ns = fdt_size_cells(fdt, parent);
896
897 ptr = fdt_getprop(fdt, node, property, &len);
898 if (!ptr)
899 return len;
900
901 end = ptr + len / sizeof(*ptr);
902
903 while (ptr + na + ns <= end) {
904 if (i == index) {
905 if (CONFIG_IS_ENABLED(OF_TRANSLATE))
906 res->start = fdt_translate_address(fdt, node, ptr);
907 else
908 res->start = fdtdec_get_number(ptr, na);
909
910 res->end = res->start;
911 res->end += fdtdec_get_number(&ptr[na], ns) - 1;
912 return 0;
913 }
914
915 ptr += na + ns;
916 i++;
917 }
918
919 return -FDT_ERR_NOTFOUND;
920}
921
922int fdt_get_named_resource(const void *fdt, int node, const char *property,
923 const char *prop_names, const char *name,
924 struct fdt_resource *res)
925{
926 int index;
927
928 index = fdt_stringlist_search(fdt, node, prop_names, name);
929 if (index < 0)
930 return index;
931
932 return fdt_get_resource(fdt, node, property, index, res);
933}
934
935static int decode_timing_property(const void *blob, int node, const char *name,
936 struct timing_entry *result)
937{
938 int length, ret = 0;
939 const u32 *prop;
940
941 prop = fdt_getprop(blob, node, name, &length);
942 if (!prop) {
943 debug("%s: could not find property %s\n",
944 fdt_get_name(blob, node, NULL), name);
945 return length;
946 }
947
948 if (length == sizeof(u32)) {
949 result->typ = fdtdec_get_int(blob, node, name, 0);
950 result->min = result->typ;
951 result->max = result->typ;
952 } else {
953 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
954 }
955
956 return ret;
957}
958
959int fdtdec_decode_display_timing(const void *blob, int parent, int index,
960 struct display_timing *dt)
961{
962 int i, node, timings_node;
963 u32 val = 0;
964 int ret = 0;
965
966 timings_node = fdt_subnode_offset(blob, parent, "display-timings");
967 if (timings_node < 0)
968 return timings_node;
969
970 for (i = 0, node = fdt_first_subnode(blob, timings_node);
971 node > 0 && i != index;
972 node = fdt_next_subnode(blob, node))
973 i++;
974
975 if (node < 0)
976 return node;
977
978 memset(dt, 0, sizeof(*dt));
979
980 ret |= decode_timing_property(blob, node, "hback-porch",
981 &dt->hback_porch);
982 ret |= decode_timing_property(blob, node, "hfront-porch",
983 &dt->hfront_porch);
984 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
985 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
986 ret |= decode_timing_property(blob, node, "vback-porch",
987 &dt->vback_porch);
988 ret |= decode_timing_property(blob, node, "vfront-porch",
989 &dt->vfront_porch);
990 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
991 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
992 ret |= decode_timing_property(blob, node, "clock-frequency",
993 &dt->pixelclock);
994
995 dt->flags = 0;
996 val = fdtdec_get_int(blob, node, "vsync-active", -1);
997 if (val != -1) {
998 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
999 DISPLAY_FLAGS_VSYNC_LOW;
1000 }
1001 val = fdtdec_get_int(blob, node, "hsync-active", -1);
1002 if (val != -1) {
1003 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
1004 DISPLAY_FLAGS_HSYNC_LOW;
1005 }
1006 val = fdtdec_get_int(blob, node, "de-active", -1);
1007 if (val != -1) {
1008 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
1009 DISPLAY_FLAGS_DE_LOW;
1010 }
1011 val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
1012 if (val != -1) {
1013 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
1014 DISPLAY_FLAGS_PIXDATA_NEGEDGE;
1015 }
1016
1017 if (fdtdec_get_bool(blob, node, "interlaced"))
1018 dt->flags |= DISPLAY_FLAGS_INTERLACED;
1019 if (fdtdec_get_bool(blob, node, "doublescan"))
1020 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
1021 if (fdtdec_get_bool(blob, node, "doubleclk"))
1022 dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
1023
1024 return ret;
1025}
1026
1027int fdtdec_setup_mem_size_base(void)
1028{
1029 int ret;
1030 ofnode mem;
1031 struct resource res;
1032
1033 mem = ofnode_path("/memory");
1034 if (!ofnode_valid(mem)) {
1035 debug("%s: Missing /memory node\n", __func__);
1036 return -EINVAL;
1037 }
1038
1039 ret = ofnode_read_resource(mem, 0, &res);
1040 if (ret != 0) {
1041 debug("%s: Unable to decode first memory bank\n", __func__);
1042 return -EINVAL;
1043 }
1044
1045 gd->ram_size = (phys_size_t)(res.end - res.start + 1);
1046 gd->ram_base = (unsigned long)res.start;
1047 debug("%s: Initial DRAM size %llx\n", __func__,
1048 (unsigned long long)gd->ram_size);
1049
1050 return 0;
1051}
1052
1053ofnode get_next_memory_node(ofnode mem)
1054{
1055 do {
1056 mem = ofnode_by_prop_value(mem, "device_type", "memory", 7);
1057 } while (!ofnode_is_available(mem));
1058
1059 return mem;
1060}
1061
1062int fdtdec_setup_memory_banksize(void)
1063{
1064 int bank, ret, reg = 0;
1065 struct resource res;
1066 ofnode mem = ofnode_null();
1067
1068 mem = get_next_memory_node(mem);
1069 if (!ofnode_valid(mem)) {
1070 debug("%s: Missing /memory node\n", __func__);
1071 return -EINVAL;
1072 }
1073
1074 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1075 ret = ofnode_read_resource(mem, reg++, &res);
1076 if (ret < 0) {
1077 reg = 0;
1078 mem = get_next_memory_node(mem);
1079 if (!ofnode_valid(mem))
1080 break;
1081
1082 ret = ofnode_read_resource(mem, reg++, &res);
1083 if (ret < 0)
1084 break;
1085 }
1086
1087 if (ret != 0)
1088 return -EINVAL;
1089
1090 gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
1091 gd->bd->bi_dram[bank].size =
1092 (phys_size_t)(res.end - res.start + 1);
1093
1094 debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
1095 __func__, bank,
1096 (unsigned long long)gd->bd->bi_dram[bank].start,
1097 (unsigned long long)gd->bd->bi_dram[bank].size);
1098 }
1099
1100 return 0;
1101}
1102
1103int fdtdec_setup_mem_size_base_lowest(void)
1104{
1105 int bank, ret, reg = 0;
1106 struct resource res;
1107 unsigned long base;
1108 phys_size_t size;
1109 ofnode mem = ofnode_null();
1110
1111 gd->ram_base = (unsigned long)~0;
1112
1113 mem = get_next_memory_node(mem);
1114 if (!ofnode_valid(mem)) {
1115 debug("%s: Missing /memory node\n", __func__);
1116 return -EINVAL;
1117 }
1118
1119 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1120 ret = ofnode_read_resource(mem, reg++, &res);
1121 if (ret < 0) {
1122 reg = 0;
1123 mem = get_next_memory_node(mem);
1124 if (!ofnode_valid(mem))
1125 break;
1126
1127 ret = ofnode_read_resource(mem, reg++, &res);
1128 if (ret < 0)
1129 break;
1130 }
1131
1132 if (ret != 0)
1133 return -EINVAL;
1134
1135 base = (unsigned long)res.start;
1136 size = (phys_size_t)(res.end - res.start + 1);
1137
1138 if (gd->ram_base > base && size) {
1139 gd->ram_base = base;
1140 gd->ram_size = size;
1141 debug("%s: Initial DRAM base %lx size %lx\n",
1142 __func__, base, (unsigned long)size);
1143 }
1144 }
1145
1146 return 0;
1147}
1148
1149#if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1150# if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
1151 CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
1152static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1153{
1154 size_t sz_out = CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ);
1155 bool gzip = 0, lzo = 0;
1156 ulong sz_in = sz_src;
1157 void *dst;
1158 int rc;
1159
1160 if (CONFIG_IS_ENABLED(GZIP))
1161 if (gzip_parse_header(src, sz_in) >= 0)
1162 gzip = 1;
1163 if (CONFIG_IS_ENABLED(LZO))
1164 if (!gzip && lzop_is_valid_header(src))
1165 lzo = 1;
1166
1167 if (!gzip && !lzo)
1168 return -EBADMSG;
1169
1170
1171 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
1172 dst = malloc(sz_out);
1173 if (!dst) {
1174 puts("uncompress_blob: Unable to allocate memory\n");
1175 return -ENOMEM;
1176 }
1177 } else {
1178# if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
1179 dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
1180# else
1181 return -ENOTSUPP;
1182# endif
1183 }
1184
1185 if (CONFIG_IS_ENABLED(GZIP) && gzip)
1186 rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
1187 else if (CONFIG_IS_ENABLED(LZO) && lzo)
1188 rc = lzop_decompress(src, sz_in, dst, &sz_out);
1189 else
1190 hang();
1191
1192 if (rc < 0) {
1193
1194 puts("uncompress_blob: Unable to uncompress\n");
1195 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
1196 free(dst);
1197 return -EBADMSG;
1198 }
1199 *dstp = dst;
1200 return 0;
1201}
1202# else
1203static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1204{
1205 *dstp = (void *)src;
1206 return 0;
1207}
1208# endif
1209#endif
1210
1211#if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1212
1213
1214
1215
1216__weak void *board_fdt_blob_setup(int *err)
1217{
1218 void *fdt_blob = NULL;
1219
1220 *err = 0;
1221#ifdef CONFIG_SPL_BUILD
1222
1223 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
1224 fdt_blob = (ulong *)&_image_binary_end;
1225 else
1226 fdt_blob = (ulong *)&__bss_end;
1227#else
1228
1229 fdt_blob = (ulong *)&_end;
1230#endif
1231
1232 return fdt_blob;
1233}
1234#endif
1235
1236int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size)
1237{
1238 const char *path;
1239 int offset, err;
1240
1241 if (!is_valid_ethaddr(mac))
1242 return -EINVAL;
1243
1244 path = fdt_get_alias(fdt, "ethernet");
1245 if (!path)
1246 return 0;
1247
1248 debug("ethernet alias found: %s\n", path);
1249
1250 offset = fdt_path_offset(fdt, path);
1251 if (offset < 0) {
1252 debug("ethernet alias points to absent node %s\n", path);
1253 return -ENOENT;
1254 }
1255
1256 err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size);
1257 if (err < 0)
1258 return err;
1259
1260 debug("MAC address: %pM\n", mac);
1261
1262 return 0;
1263}
1264
1265static int fdtdec_init_reserved_memory(void *blob)
1266{
1267 int na, ns, node, err;
1268 fdt32_t value;
1269
1270
1271 na = fdt_address_cells(blob, 0);
1272 ns = fdt_size_cells(blob, 0);
1273
1274 node = fdt_add_subnode(blob, 0, "reserved-memory");
1275 if (node < 0)
1276 return node;
1277
1278 err = fdt_setprop(blob, node, "ranges", NULL, 0);
1279 if (err < 0)
1280 return err;
1281
1282 value = cpu_to_fdt32(ns);
1283
1284 err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value));
1285 if (err < 0)
1286 return err;
1287
1288 value = cpu_to_fdt32(na);
1289
1290 err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value));
1291 if (err < 0)
1292 return err;
1293
1294 return node;
1295}
1296
1297int fdtdec_add_reserved_memory(void *blob, const char *basename,
1298 const struct fdt_memory *carveout,
1299 const char **compatibles, unsigned int count,
1300 uint32_t *phandlep, unsigned long flags)
1301{
1302 fdt32_t cells[4] = {}, *ptr = cells;
1303 uint32_t upper, lower, phandle;
1304 int parent, node, na, ns, err;
1305 fdt_size_t size;
1306 char name[64];
1307
1308
1309 parent = fdt_path_offset(blob, "/reserved-memory");
1310 if (parent < 0) {
1311 parent = fdtdec_init_reserved_memory(blob);
1312 if (parent < 0)
1313 return parent;
1314 }
1315
1316
1317 na = fdt_address_cells(blob, parent);
1318 if (na < 1 || na > 2)
1319 return -FDT_ERR_BADNCELLS;
1320
1321 ns = fdt_size_cells(blob, parent);
1322 if (ns < 1 || ns > 2)
1323 return -FDT_ERR_BADNCELLS;
1324
1325
1326 fdt_for_each_subnode(node, blob, parent) {
1327 const char *name = fdt_get_name(blob, node, NULL);
1328 fdt_addr_t addr;
1329 fdt_size_t size;
1330
1331 addr = fdtdec_get_addr_size_fixed(blob, node, "reg", 0, na, ns,
1332 &size, false);
1333 if (addr == FDT_ADDR_T_NONE) {
1334 debug("failed to read address/size for %s\n", name);
1335 continue;
1336 }
1337
1338 if (addr == carveout->start && (addr + size - 1) ==
1339 carveout->end) {
1340 if (phandlep)
1341 *phandlep = fdt_get_phandle(blob, node);
1342 return 0;
1343 }
1344 }
1345
1346
1347
1348
1349
1350 upper = upper_32_bits(carveout->start);
1351 lower = lower_32_bits(carveout->start);
1352
1353 if (na > 1 && upper > 0)
1354 snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
1355 lower);
1356 else {
1357 if (upper > 0) {
1358 debug("address %08x:%08x exceeds addressable space\n",
1359 upper, lower);
1360 return -FDT_ERR_BADVALUE;
1361 }
1362
1363 snprintf(name, sizeof(name), "%s@%x", basename, lower);
1364 }
1365
1366 node = fdt_add_subnode(blob, parent, name);
1367 if (node < 0)
1368 return node;
1369
1370 if (flags & FDTDEC_RESERVED_MEMORY_NO_MAP) {
1371 err = fdt_setprop(blob, node, "no-map", NULL, 0);
1372 if (err < 0)
1373 return err;
1374 }
1375
1376 if (phandlep) {
1377 err = fdt_generate_phandle(blob, &phandle);
1378 if (err < 0)
1379 return err;
1380
1381 err = fdtdec_set_phandle(blob, node, phandle);
1382 if (err < 0)
1383 return err;
1384 }
1385
1386
1387 if (na > 1)
1388 *ptr++ = cpu_to_fdt32(upper);
1389
1390 *ptr++ = cpu_to_fdt32(lower);
1391
1392
1393 size = carveout->end - carveout->start + 1;
1394 upper = upper_32_bits(size);
1395 lower = lower_32_bits(size);
1396
1397 if (ns > 1)
1398 *ptr++ = cpu_to_fdt32(upper);
1399
1400 *ptr++ = cpu_to_fdt32(lower);
1401
1402 err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells));
1403 if (err < 0)
1404 return err;
1405
1406 if (compatibles && count > 0) {
1407 size_t length = 0, len = 0;
1408 unsigned int i;
1409 char *buffer;
1410
1411 for (i = 0; i < count; i++)
1412 length += strlen(compatibles[i]) + 1;
1413
1414 buffer = malloc(length);
1415 if (!buffer)
1416 return -FDT_ERR_INTERNAL;
1417
1418 for (i = 0; i < count; i++)
1419 len += strlcpy(buffer + len, compatibles[i],
1420 length - len) + 1;
1421
1422 err = fdt_setprop(blob, node, "compatible", buffer, length);
1423 free(buffer);
1424 if (err < 0)
1425 return err;
1426 }
1427
1428
1429 if (phandlep)
1430 *phandlep = phandle;
1431
1432 return 0;
1433}
1434
1435int fdtdec_get_carveout(const void *blob, const char *node,
1436 const char *prop_name, unsigned int index,
1437 struct fdt_memory *carveout, const char **name,
1438 const char ***compatiblesp, unsigned int *countp,
1439 unsigned long *flags)
1440{
1441 const fdt32_t *prop;
1442 uint32_t phandle;
1443 int offset, len;
1444 fdt_size_t size;
1445
1446 offset = fdt_path_offset(blob, node);
1447 if (offset < 0)
1448 return offset;
1449
1450 prop = fdt_getprop(blob, offset, prop_name, &len);
1451 if (!prop) {
1452 debug("failed to get %s for %s\n", prop_name, node);
1453 return -FDT_ERR_NOTFOUND;
1454 }
1455
1456 if ((len % sizeof(phandle)) != 0) {
1457 debug("invalid phandle property\n");
1458 return -FDT_ERR_BADPHANDLE;
1459 }
1460
1461 if (len < (sizeof(phandle) * (index + 1))) {
1462 debug("invalid phandle index\n");
1463 return -FDT_ERR_NOTFOUND;
1464 }
1465
1466 phandle = fdt32_to_cpu(prop[index]);
1467
1468 offset = fdt_node_offset_by_phandle(blob, phandle);
1469 if (offset < 0) {
1470 debug("failed to find node for phandle %u\n", phandle);
1471 return offset;
1472 }
1473
1474 if (name)
1475 *name = fdt_get_name(blob, offset, NULL);
1476
1477 if (compatiblesp) {
1478 const char **compatibles = NULL;
1479 const char *start, *end, *ptr;
1480 unsigned int count = 0;
1481
1482 prop = fdt_getprop(blob, offset, "compatible", &len);
1483 if (!prop)
1484 goto skip_compat;
1485
1486 start = ptr = (const char *)prop;
1487 end = start + len;
1488
1489 while (ptr < end) {
1490 ptr = strchrnul(ptr, '\0');
1491 count++;
1492 ptr++;
1493 }
1494
1495 compatibles = malloc(sizeof(ptr) * count);
1496 if (!compatibles)
1497 return -FDT_ERR_INTERNAL;
1498
1499 ptr = start;
1500 count = 0;
1501
1502 while (ptr < end) {
1503 compatibles[count] = ptr;
1504 ptr = strchrnul(ptr, '\0');
1505 count++;
1506 ptr++;
1507 }
1508
1509skip_compat:
1510 *compatiblesp = compatibles;
1511
1512 if (countp)
1513 *countp = count;
1514 }
1515
1516 carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset,
1517 "reg", 0, &size,
1518 true);
1519 if (carveout->start == FDT_ADDR_T_NONE) {
1520 debug("failed to read address/size from \"reg\" property\n");
1521 return -FDT_ERR_NOTFOUND;
1522 }
1523
1524 carveout->end = carveout->start + size - 1;
1525
1526 if (flags) {
1527 *flags = 0;
1528
1529 if (fdtdec_get_bool(blob, offset, "no-map"))
1530 *flags |= FDTDEC_RESERVED_MEMORY_NO_MAP;
1531 }
1532
1533 return 0;
1534}
1535
1536int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
1537 unsigned int index, const struct fdt_memory *carveout,
1538 const char *name, const char **compatibles,
1539 unsigned int count, unsigned long flags)
1540{
1541 uint32_t phandle;
1542 int err, offset, len;
1543 fdt32_t value;
1544 void *prop;
1545
1546 err = fdtdec_add_reserved_memory(blob, name, carveout, compatibles,
1547 count, &phandle, flags);
1548 if (err < 0) {
1549 debug("failed to add reserved memory: %d\n", err);
1550 return err;
1551 }
1552
1553 offset = fdt_path_offset(blob, node);
1554 if (offset < 0) {
1555 debug("failed to find offset for node %s: %d\n", node, offset);
1556 return offset;
1557 }
1558
1559 value = cpu_to_fdt32(phandle);
1560
1561 if (!fdt_getprop(blob, offset, prop_name, &len)) {
1562 if (len == -FDT_ERR_NOTFOUND)
1563 len = 0;
1564 else
1565 return len;
1566 }
1567
1568 if ((index + 1) * sizeof(value) > len) {
1569 err = fdt_setprop_placeholder(blob, offset, prop_name,
1570 (index + 1) * sizeof(value),
1571 &prop);
1572 if (err < 0) {
1573 debug("failed to resize reserved memory property: %s\n",
1574 fdt_strerror(err));
1575 return err;
1576 }
1577 }
1578
1579 err = fdt_setprop_inplace_namelen_partial(blob, offset, prop_name,
1580 strlen(prop_name),
1581 index * sizeof(value),
1582 &value, sizeof(value));
1583 if (err < 0) {
1584 debug("failed to update %s property for node %s: %s\n",
1585 prop_name, node, fdt_strerror(err));
1586 return err;
1587 }
1588
1589 return 0;
1590}
1591
1592__weak int fdtdec_board_setup(const void *fdt_blob)
1593{
1594 return 0;
1595}
1596
1597int fdtdec_setup(void)
1598{
1599 int ret;
1600#if CONFIG_IS_ENABLED(OF_CONTROL)
1601# if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1602 void *fdt_blob;
1603# endif
1604# ifdef CONFIG_OF_EMBED
1605
1606# ifdef CONFIG_SPL_BUILD
1607 gd->fdt_blob = __dtb_dt_spl_begin;
1608# else
1609 gd->fdt_blob = __dtb_dt_begin;
1610# endif
1611# elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1612
1613 gd->fdt_blob = board_fdt_blob_setup(&ret);
1614 if (ret)
1615 return ret;
1616# endif
1617# ifndef CONFIG_SPL_BUILD
1618
1619 gd->fdt_blob = map_sysmem
1620 (env_get_ulong("fdtcontroladdr", 16,
1621 (unsigned long)map_to_sysmem(gd->fdt_blob)), 0);
1622# endif
1623
1624# if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1625
1626
1627
1628
1629
1630
1631 if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
1632 gd->fdt_blob = fdt_blob;
1633
1634
1635
1636
1637
1638 fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
1639 if (fdt_blob) {
1640 gd->multi_dtb_fit = gd->fdt_blob;
1641 gd->fdt_blob = fdt_blob;
1642 }
1643
1644# endif
1645#endif
1646
1647 ret = fdtdec_prepare_fdt();
1648 if (!ret)
1649 ret = fdtdec_board_setup(gd->fdt_blob);
1650 return ret;
1651}
1652
1653#if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1654int fdtdec_resetup(int *rescan)
1655{
1656 void *fdt_blob;
1657
1658
1659
1660
1661
1662
1663
1664 if (gd->multi_dtb_fit) {
1665 fdt_blob = locate_dtb_in_fit(gd->multi_dtb_fit);
1666
1667 if (fdt_blob == gd->fdt_blob) {
1668
1669
1670
1671
1672 *rescan = 0;
1673 return 0;
1674 }
1675
1676 *rescan = 1;
1677 gd->fdt_blob = fdt_blob;
1678 return fdtdec_prepare_fdt();
1679 }
1680
1681
1682
1683
1684
1685
1686 *rescan = 0;
1687 return 0;
1688}
1689#endif
1690
1691int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
1692 phys_addr_t *basep, phys_size_t *sizep,
1693 struct bd_info *bd)
1694{
1695 int addr_cells, size_cells;
1696 const u32 *cell, *end;
1697 u64 total_size, size, addr;
1698 int node, child;
1699 bool auto_size;
1700 int bank;
1701 int len;
1702
1703 debug("%s: board_id=%d\n", __func__, board_id);
1704 if (!area)
1705 area = "/memory";
1706 node = fdt_path_offset(blob, area);
1707 if (node < 0) {
1708 debug("No %s node found\n", area);
1709 return -ENOENT;
1710 }
1711
1712 cell = fdt_getprop(blob, node, "reg", &len);
1713 if (!cell) {
1714 debug("No reg property found\n");
1715 return -ENOENT;
1716 }
1717
1718 addr_cells = fdt_address_cells(blob, node);
1719 size_cells = fdt_size_cells(blob, node);
1720
1721
1722 for (child = fdt_first_subnode(blob, node);
1723 child >= 0;
1724 child = fdt_next_subnode(blob, child)) {
1725 int match_mask, match_value;
1726
1727 match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
1728 match_value = fdtdec_get_int(blob, child, "match-value", -1);
1729
1730 if (match_value >= 0 &&
1731 ((board_id & match_mask) == match_value)) {
1732
1733 debug("Found matching mask %d\n", match_mask);
1734 node = child;
1735 cell = fdt_getprop(blob, node, "reg", &len);
1736 if (!cell) {
1737 debug("No memory-banks property found\n");
1738 return -EINVAL;
1739 }
1740 break;
1741 }
1742 }
1743
1744
1745 if (bd) {
1746 memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
1747 CONFIG_NR_DRAM_BANKS);
1748 }
1749
1750 auto_size = fdtdec_get_bool(blob, node, "auto-size");
1751
1752 total_size = 0;
1753 end = cell + len / 4 - addr_cells - size_cells;
1754 debug("cell at %p, end %p\n", cell, end);
1755 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1756 if (cell > end)
1757 break;
1758 addr = 0;
1759 if (addr_cells == 2)
1760 addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
1761 addr += fdt32_to_cpu(*cell++);
1762 if (bd)
1763 bd->bi_dram[bank].start = addr;
1764 if (basep && !bank)
1765 *basep = (phys_addr_t)addr;
1766
1767 size = 0;
1768 if (size_cells == 2)
1769 size += (u64)fdt32_to_cpu(*cell++) << 32UL;
1770 size += fdt32_to_cpu(*cell++);
1771
1772 if (auto_size) {
1773 u64 new_size;
1774
1775 debug("Auto-sizing %llx, size %llx: ", addr, size);
1776 new_size = get_ram_size((long *)(uintptr_t)addr, size);
1777 if (new_size == size) {
1778 debug("OK\n");
1779 } else {
1780 debug("sized to %llx\n", new_size);
1781 size = new_size;
1782 }
1783 }
1784
1785 if (bd)
1786 bd->bi_dram[bank].size = size;
1787 total_size += size;
1788 }
1789
1790 debug("Memory size %llu\n", total_size);
1791 if (sizep)
1792 *sizep = (phys_size_t)total_size;
1793
1794 return 0;
1795}
1796
1797#endif
1798