xlnx_embeddedsw/doc/ChangeLog
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   1Changes for 2018.3
   2===============================
   3dphy_v1_2:
   4Handling 8 Lanes with timing params for dphy.
   5
   6csi_v1_2:
   7Modified driver for supporting new extra 12 VCs.
   8Added changes for CSIv2.0
   9Added Changes for Handling VCx Errors in interrupt handler.
  10
  11mipicsiss_v1_2:
  12Modified tcl for new formats (RAW16, RAW20 and YUV422 8bit/10bit) and 16 VCs.
  13Modified config structure to support CSIv20 and VCx Errors.
  14=======
  15dp12_v7_0:
  16Display port 2017.4 core drivers are renamed.
  17
  18dp12rxss_v4_2:
  19Display port 2017.4 receiver subsystem drivers are renamed.
  20Fixed application compilation errors.
  21
  22dp12txss_v5_1:
  23Display port 2017.4 transmitter subsytem drivers are renamed
  24Fixed application compilation errors.
  25
  26dp14_v7_1:
  27Display port 2018.1 core drivers are renamed.
  28Updated the channel equivalization sequence.
  29Updated to pass the complaince tests.
  30
  31dp14rxss_v5_1:
  32Display port 2018.1 receiver subsystem drivers are renamed.
  33Removed the dp12 applications.
  34Added support to new application examples.
  35
  36dp14txss_v6_1:
  37Display port 2018.1 transmitter subsystem drivers are renamed.
  38Removed the dp12 applications.
  39Addeed support to new application examples
  40dp14txss: Updated vcu118-tx and vcu118-rx only applications.
  41
  42v_scenechange_v1_0:
  43Initial release for SceneChange IP.
  44
  45v_mix_v5_0:
  46Modified existing Stop API for flush feature.
  47
  48v_frmbuf_wr_v4_0:
  49Added new API, This API is used to wait for IP to enter into idle state.
  50Modified existing Stop API to support Flushing feature.
  51
  52v_frmbuf_rd_v4_0:
  53Added new API, This API is used to wait for IP to enter into idle state.
  54Modified existing Stop API to support Flushing feature.
  55
  56i2stx_v2_0:
  57This patch has 2 new APIs, one API is to enable the justification and 
  58the other one is to set Left or Right justification.
  59
  60i2srx_v2_0:
  61This patch has 2 new APIs, one API is to enable the justification and 
  62the other one is to set Left or Right justification.
  63
  64
  65v_hdmitxss_v5_2:
  66Added I2S, Repeater and Repeater Professional applications.
  67Repeater functionality is disabled in the applications by default.
  68Added log for video bridge unlocked.
  69Fixed Video Masking Feature.
  70
  71v_hdmitx_v2_2:
  72Fixed HPD and toggle to support different AXI-Lite frequency.
  73Added Overflow and Underflow (Video Bridge) Interrupt.
  74
  75v_hdmirxss_v5_2:
  76Added I2S, Repeater and Repeater Professional applications.
  77Repeater functionality is disabled in the applications by default.
  78XV_HDMIRXSS_HDCP_1_PROT_EVT, XV_HDMIRXSS_HDCP_2_PROT_EVT events are deprecated.
  79Added TMDS Clock Ratio callback support.
  80
  81v_hdmirx_v2_2:
  82Fixed SDK GCC warning message issue.
  83Added TMDS Clock Ratio callback support.
  84
  85vphy_v1_8:
  86Updated CDR values for DP in xvphy_gtye4.c
  87Removed deprecated APIS: XVphy_DrpWrite and XVphy_DrpRead
  88Added/Moved APIs XVphy_SetTxVoltageSwing and XVphy_SetTxPreEmphasis from xvphy_i.c/h
  89Added XVphy_SetTxPostCursor API in xvphy.h
  90
  91freertos10_xilinx_v1_2:
  92Updated FreeRTOS tcl to add -hier option while using get_cells command.
  93It fixes CR#1011395.
  94Added Xilinx copyright to files containing xilinx code
  95and retain FreeRTOS license text as-is. Also, added
  96FreeRTOS copyright in porting files which uses FreeRTOS
  97code, wherever it is missing.
  98
  99hdcp1x_v4_2:
 100Addded hdcp14_PropagateTopoErrUpstream flag to track topology failures and ready the topology for the repeater application to read.
 101Updated the XHdcp1x_TxPollForWaitForReady function to ready topology in case of a topology error, and make it available in XHdcp1x_TxGetTopology().
 102Updated the XHdcp1x_TxReset() to clear the Authentication Request flag.
 103Updated XHdcp1x_PortHdmiRxDisable function to clear KSV_FIFO.
 104
 105sysmonpsu_v2_5:
 106Fixed Cppcheck warnings
 107Modified code for MISRA-C:2012 Compliance.
 108
 109sysmon_v7_5:
 110Added Example for Vaux external channels
 111
 112axidma_v9_8:
 113Fix cppcheck, gcc and doxygen warnings.
 114Added 64 bit DMA addresses support for 64 bit variant of microblaze processor.
 115
 116can_v3_3:
 117Fix cppcheck and GCC warnings.
 118
 119canfd_v2_0:
 120Fix cppcheck, gcc and doxygen warnings.
 121Changed the Canfd ID with 11 bit value.
 122Fixed Selftest Hang issue (CR#1009802)
 123Added support for canfd 2.0 spec regarding PL
 124SoftIP.
 125
 126emacps_v3_8:
 127Fix cppcheck, GCC and doxygen warnings.
 128Remove duplicate code in xemacps_bd.h
 129Fixed PTP interrupt masks and cleaned up comments.
 130Fix warning in example for redefinition of interrupt number.
 131Added 64 bit DMA addresses support for 64 bit variant of microblaze processor.
 132
 133gpiops_v3_4:
 134Resolved cppcheck warnings.(CR#1006331)
 135Resolved MISRA-C mandatory violations.(CR#1007751)
 136
 137sdps_v3_6
 138Fixed Cppcheck, Doxygen and gcc warnings (CR#1006375)
 139Add initializer macro for HasEMIO
 140Add support for using 64Bit DMA in 32Bit Processor
 141Add cache invalidation call before returning from ReadPolled API
 142Resolve compilation warnings for ARMCC toolchain
 143Change Expected Response for CMD3 to R1 for MMC
 144Added 64 bit DMA addresses support for 64 bit variant of microblaze processor.
 145
 146xilffs_v4_0:
 147Upgraded the FatFS version to 0.13b
 148Fix Cppcheck and Doxygen warnings
 149Modify sector buffer alignment to that of cache line supported
 150SD Example - Change file size to 8MB from 8KB for ZynqMP platform
 151Modify tcl file to create FILE_SYSTEM_INTERFACE_SD in xparameters.h only once
 152if there are multiple instances of SD
 153Add Word Access support in latest FatFS source
 154Update the bug fixes on 0.13b FatFS
 155
 156clockps_v1_0:
 157First release of clocksPS drivers.
 158Fix Doxygen and coverity reported issues.
 159
 160lwip202_v1_2:
 161Add mcdma support and handle IEEE_1588 for AXI Phy in ethernet header.
 162Add AXI 2.5G Ethernet support.
 163Fix axiethernet apps build error by removing dependency on HSI get_connected_intr_cntrl API output.
 164Fix copyrights.
 165In tcl update get_cells API argument to support hierarchical designs.
 166Fix warning for redefining BYTE_ORDER
 167
 168lwip_echo_server:
 169Fix warning in iic phy reset in lwip echo server.
 170Fixed gcc compilation warning for zynqmp platform.(CR#1011020)
 171
 172mcdma_v1_2:
 173Add API XMcdma_LookupConfigBaseAddr() to lookup config by base address.
 174Add XMcdma_BdSetSwId() and XMcdma_BdGetSwId() macro to access SW ID field in BD.
 175Export XMcdma_BdChainFree() and XMcDma_BdSetAppWord() APIS to use from LwIP contrib source.
 176Read num channels from IP configuration.
 177Fix gcc warning.
 178Remove unused define for buffer length mask(XMCDMA_BD_LEN_MASK).
 179Fix typos and rephrase comment description.
 180Read buffer length register width from IP config.
 181In driver tcl update get_cells API to support hierarchical designs.
 182Added 64 bit DMA addresses support for 64 bit variant of microblaze processor
 183
 184nandpsu_v1_5:
 185Added 64 bit DMA addresses support for 64 bit variant of microblaze processor.
 186Updated driver source code to fix compilation warnings.
 187
 188cpu_v2_8:
 189Added Os and LTO settings in extra compiler flags for PMU BSP
 190Add support for 64 bit variant of microblaze processor.
 191
 192iicps_v3_8:
 193Fix for Cppcheck and Doxygen warnings.
 194Add timeout interrupt in master mode.
 195
 196intc_v3_8:
 197Updated check_cascade proc, to add check
 198for irq_in pin.It fixes CR#1005371
 199Added support for 64 bit vector address.
 200
 201iomodule_v2_6:
 202Updated driver tcl to replace get_cells -of_object with get_cells -of_objects.
 203Added support for 64 bit vector address.
 204
 205tmr_inject_v1_1:
 206Added support for 64 bit fault address.
 207
 208qspips_v3_5:
 209Fixed compilation warnings for ARMCC.
 210Added support for the low density ISSI flash parts.
 211
 212qspipsu_v1_8:
 213Added support for IS25LP064 and IS25WP064.
 214Added an example for accessing 64bit dma within 32 bit application.(CR#1004701)
 215Removed checkpatch warnings for xqspipsu.c and xqspipsu.h
 216Removed the mentions of Spansion flash from BlockErase API. (CR#1006247)
 217Fixed cppcheck, doxygen and gcc warnings. (CR#1006336)
 218Setup64BRxDma() should be called if the RxAddress is greater than 32 bit address space. (CR#1006862)
 219Added support for low density ISSI flash parts
 220Fixed the code in XQspiPsu_GenFifoEntryData() for data transfer length up to 255 for reducing the extra loop.
 221Fixed compilation warnings.
 222Added 64 bit DMA addresses support for 64 bit variant of microblaze processor.
 223
 224rfdc_v5_0:
 225Update DAC min sampling rate to 500MHz and also update VCO Range, PLL_DIVIDER and PLL_FPDIV ranges.
 226Add XRFdc_GetFabClkOutDiv() API to read fabric clk div.
 227Add Inline APIs XRFdc_CheckBlockEnabled(), XRFdc_CheckTileEnabled().
 228Add support to dump HSCOM regs in XRFdc_DumpRegs() API.
 229Fixed Multiband crossbar settings in C2C mode.
 230Add MixerType member to MixerSettings structure and Update Mixer Settings APIs to consider the MixerType variable.
 231Add inline APIs XRFdc_CheckDigitalPathEnabled(), XRFdc_IsADCDigitalPathEnabled() and XRFdc_IsDACDigitalPathEnabled().
 232Add XRFdc_GetMultibandConfig() API to read Multiband configuration.
 233Update the APIs to check the corresponding section(Digital or Analog)enable.
 234Fixed MISRAC, Doxygen and coverity warnings.
 235Check for Block0 enable for tiles participating in MTS.
 236Update the clock reset sequence.
 237Updated driver and examples, to remove the xparameters.h
 238dependency for Linux platform.
 239Modified phasecorrection factor as per  QMC Phase
 240correction factor range in driver.
 241Move mixer related APIs to xrfdc_mixer.c file.
 242Remove __MICROBLAZE__ defines and use libmetal interface for Microblaze.
 243Reorganize the code (like adding macros for constants, add asserts for Linux, create static APIs, adding brief comments
 244etc) to improve readability and optimization.
 245Update powerup-state value based on PLL mode in XRFdc_DynamicPLLConfig() API.
 246Check for DigitalPath enable in XRFdc_GetNyquistZone() and XRFdc_GetCalibrationMode() APIs for Multiband.
 247Add support to read the REFCLKDIV param from design.
 248Update XRFdc_SetPLLConfig() API to support range of REF_CLK_DIV values(1 to 4).
 249Corrects the Block_Id used for QMC event in IQ datatype in XRFdc_UpdateEvent() API.
 250Add XRFDC_MIXER_MODE_R2R option to support BYPASS mode for Real input.
 251
 252scugic_v3_10:
 253Updated get_psu_interrupt_id to generate correct
 254interrupt id's, when output of utility reduced logic
 255is connected to pl-ps interrupt as well as ILA probe.
 256Fix for CR#999732.
 257Updated source files to fix warings reported by 
 258coverity, checkpatch and doxygen. It fixes
 259CR#1006344.
 260Resolves MISRA-C:2012 mandatory violations.
 261It fixes CR#1007753.
 262Fix GCC,cppcheck and doxygen warnings in driver
 263and example. It fixes CR#1006344 and CR#1010947.
 264Update scugic tcl to add -hier option while
 265using get_cells command. It fixes CR#1011395.
 266
 267tmrctr_v4_6:
 268Updated driver examples to call TmrCtrDisableIntr
 269API with the correct arguments. It fixes
 270CR#1006251.
 271Fixed several checkpatch errors/warnings in
 272interrupt examples.
 273
 274ttcps_v3_7:
 275Fixed bug in XTtcPs_CalcIntervalFromFreq API to use 
 276correct maximum interval count for ZynqMP.
 277
 278xilisf_v5_12:
 279Added support for IS25LP064A and IS25WP064A.
 280Removed the check for address to be non zero and
 281Added check for Spansion flash before proceeding to quad mode read (CR#1002769)
 282Added support for Macronix 1G flash parts. (CR#978447)
 283Removed checkpatch and GCC warnings.
 284Added support for MT25QL01G flash from Micron (CR#1004264)
 285Updated the library notes for Micron flash parts. (cr#973229)
 286Added support for the low density ISSI flash parts. (PR#9237)
 287Fixed the compilation warnings for ARMCC compiler. (CR#1008307)
 288
 289xxvethernet_v1_1:
 290Update tcl to find mcdma from design and add cannonical macro in xparameters.h and update topology in xxxvethernet_g.c accordingly.
 291Add API XXxvEthernet_LookupConfigBaseAddr(UINTPTR Baseaddr) to lookup config by base address.
 292Add Macro XXxvEthernet_IsMcDma(InstancePtr) to check Mcdma is connected or not.
 293Fix error generating bsp sources for xxv+axidma design.
 294Fix interrupt ID generation for ZynqMP designs.
 295
 296Resetps_v1_2
 297Fixed compilation warnings in resetps driver
 298Fixed Doxygen reported warnings
 299
 300rtcpsu_v1_6
 301Modified logic to get the last day of month correctly.(CR#1004282)
 302Removed Checkpatch warnings.
 303Resolved cppcheck and doxygen warnings.
 304Resolved MISRA-C mandatory violations.(CR#1007752)
 305Fixed compilation warnings.
 306
 307usbpsu_v1_4
 308Fixed the errors which occur when tested with IAR compiler
 309Added the new examples into mss file
 310Add support for connecting to host in high-speed
 311
 312uartps_v3_7:
 313Resolved MISRA-C mandatory violations.(CR#1007755)
 314
 315xilfpga_v4_2
 316Refactor the xilfpga library to support different PL programming Interfaces.
 317Added support for readback of PL configuration data.
 318Added Support to load the vivado generated .bit and .bin files.
 319Added example for loading partial reconfiguration bitstreams.
 320Modified the PL data handling Logic to support different PL programming interfaces.
 321Added support for unaligned bitstream programming.
 322Fixed issues with secure partial bitstream loading.
 323
 324standalone_v6_8:
 325Fixed compilation warnings in xil_cache.c.(CR#1005118)
 326Optimized the code in Xil_DCacheFlush() and Xil_DCacheFlush() in xil_cache.c for A53-32.
 327Modified the return value of Xil_MemMap() as pointer instead of address of pointer in xil_mpu.c(CR#1005119)
 328Updated Cortexa9 translation table to mark DDR memory as inner cacheable,
 329if BSP is built with the USE_AMP flag. It fixes CR#1006745.
 330Modified code in xil_printf.c to print u64 varibales in
 33132 bit processor.It fixes CR#1007207
 332Optimized the code to use a single function and removed
 333code redundancy in xil_printf.c . It Fixes CR#1009654.
 334Updated cache APIs and inline assembly macros in microblaze BSP to support
 33564 bit addresses.
 336Updated CortexR5 bootcode to initialize CortexR5 core with LOVEC. It fixes CR#1010656.
 337Fix issues in A53 32 bit cache APIs for Xil_DCacheFlush and Xil_DCacheInvalidate. This fixes CR:1016012.
 338
 339axivdma_v6_6:
 340Added support for vertical flip programming.
 341
 342axicdma_v4_5:
 343Include missing initializers for 'XAxiCdma_Config' fields.
 344Fix cppcheck warning.
 345Fix gcc warning in peripheral test application.
 346Fix SG interrupt example compilation error when driver DEBUG mode is enabled.
 347In SG interrupt example reset error and done states for each DMA transfer.
 348Fix typos in peripheral app generation tcl.
 349
 350zynqmp_pmufw:
 351Fix GEM RXQ high pointer in case of WOL
 352Fix read of pmu global gen storage reg5
 353Added support for PL configuration readback
 354Refactor xilfpga APIs to support different PL programming interfaces
 355Return error for invalid event ID for register notifier API
 356Remove unsupported error condition event from register notifier
 357Check for event handler registration before dispatching the event
 358If AIB acknowledgment is not received for DDR the PMU should not return
 359failure
 360AIB should be enabled before FPD power down
 361Fix conditional compilation for ENABLE_NODE_IDLING code
 362Return acknowledgment if EEMI API ID is invalid
 363Remove redundant PM API argument checks which are in pm_api.c/h as its already
 364performed by API implementation
 365Fix bug in QSPI node idling
 366Change clock active checker to look for any clock to be active
 367Idle peripherals before PS and system in warm restart
 368Return failure if user sends AMS_REF_CLOCK mmio_write call
 369PMU Firmware support for AES encryption and decryption
 370Use reserved location of DDR to store training data
 371Put DDR in self refresh before warm-restart
 372Optimize power management code to save memory
 373Start FPD WDT only when FSBL execution completes since FSBL also uses it
 374Remove redundant code from restart functionality
 375Remodel clock infrastructure to support clock EEMI APIs
 376Implement clock set/get parent EEMI APIs
 377Implement clock enable, disable and get start EEMI APIs
 378Implement clock set/get divider EEMI APIs
 379Implement PmClockIsActive behavior
 380Implement PLL set/get parameter EEMI APIs
 381Implement PLL set/get mode EEMI APIs
 382Add CSU/PMU global register access via MMIO calls
 383Skip TTC3 reset while recovery enabled
 384Put RPU1 in forced off state in lockstep mode
 385Power down TCM during force powerdown of RPU
 386Force powerdown unused RPU cores
 387Add support to set restart scope during WDT restart
 388PMU Firmware support for eFUSE access
 389Power down unused RPU after other master calls PmInitFinalize
 390Enable unused RPU power down functionality by default
 391Implement pin mux control functionality in PMU
 392Release requirements of RPU1 in PmInitFinalize
 393Disable eFUSE access functionality by default in PMU
 394
 395axipmon_v6_7:
 396Fix Doxygen reported warnings.
 397
 398zynqmp_fsbl:
 399Fix write on pmu global gen storage reg5
 400Add support to ISSI 8Mb, 16Mb and 32Mb flash parts
 401Add support to DDR self refresh during PS only reset and APU only reset
 402Add support for dynamic DDR controller configuration
 403FSBL should fall back after WDT timer gets expired
 404WDT should be untouched by FSBL during APU only restart
 405Mark RPU cores as usable in FSBL depending on wheter RPU partitions are
 406present are not
 407Mark both RPU cores as usable for JTAG boot mode
 408Added support to use Macronix flash in QPI mode
 409FSBL should not abort execution if FMC card is not plugged in
 410Caches should be flushed out before applying protection config in ZynqMP FSBL
 411
 412csudma_v1_3:
 413Fix Doxygen reported warnings
 414Fixed misra-c required standard violations.
 415
 416xilflash_v4_5:
 417Fixed compilation errors for ARMCC compiler(CR#1008306)
 418
 419zdma_v1_6:
 420Fix Doxygen, cppcheck and coverity reported warnings.
 421Fixed MISRA-C mandatory violations.(CR#1007757)
 422
 423axiethernet_v5_8:
 424Fix cppcheck and gcc warnings.
 425Update tcl to improve error message for non-supported designs.
 426Fix interrupt ID generation for ZynqMP designs.
 427In SG axidma interrupt example, fix 'committing RxBD to HW' error.
 428
 429wdtps_v3_1:
 430Fix interrupt ID conflict issue in example.
 431
 432ipipsu_v2_4:
 433Fix Doxygen reported warnings.
 434Fix Gcc warnings.
 435
 436zynq_fsbl:
 437Added code to check EFUSE_SEC_EN bit and force encryption.
 438
 439sdi_common_v1_1:
 440Moved SDI specific timing from video common to SDI driver
 441
 442v_sditx_v2_0:
 443Using SDI specific timing from SDI common driver
 444Fix compilation warnings
 445Change driver version
 446Add ST352 insertion on C-Stream
 447
 448v_sditxss_v3_0:
 449Fix compilation warnings
 450Change driver version
 451Added field1 vactive size programming for SD NTSC resolution
 452Add ST352 insertion on C-Stream
 453Added pixco example for Import Examples in SDK GUI
 454Updated Copyright
 455Implemented formatting changes in Pixco Example Design
 456Example design application for UHDSDI Tx subsystem with PIXCO module
 457Removed the unused API that reports subcore version numbers
 458Corrected the SD NTSC mode resolution
 459
 460v_sdirx_v1_3:
 461Add support for ST352 in C-Stream
 462Using SDI specific timing from SDI common driver
 463Corrected the SD NTSC mode resolution
 464
 465video_common_v4_5:
 466Corrected the vertical timing parameters
 467Add support for new video mode XVIDC_VM_720x486_60_I
 468
 469v_tpg_v8_1:
 470Add support for interlaced mode and polarity
 471
 472vtc_v8_0:
 473Removed hard coded programming of register XVTC_GASIZE_F1_OFFSET
 474Corrected the timing parameters for VGA (640x480) resolution
 475Added new register Added new register XVTC_GASIZE_F1_OFFSET
 476
 477v_vscaler_v3_0:
 478Fix for 64-bit addressing support
 479
 480v_hscaler_v3_1:
 481Fix for 64-bit addressing support
 482
 483v_multi_scaler_v1_0:
 484Initial version of Multi Scaler IP
 485
 486audio_formatter_v1_0:
 487Initial version of Audio Formatter IP
 488
 489sdiaud_v2_0:
 490Add 32 channel support.
 491Add support for channel status extraction logic both on embed and extract side.
 492Add APIs to detect group change, sample rate change, active channel change.
 493
 494xilsecure_v3_2:
 495Added error if input data is greater than key modulus while performing
 496RSA private decryption
 497Added support for SHA to accept data, if data is/isn't 4 bytes aligned,
 498if address is/isn't not word aligned and no restrictions for data size.
 499Removed conditional compilation for PMU in xsecure.c and xsecure.h
 500Fixed compilation warnings
 501Added supportive APIs to encrypt/decrypt the data blobs from Linux/U-boot
 502Added support to clear user key after use
 503
 504xilskey_v6_6:
 505Modified PUF example's macro names
 506Fixed armcc compiler errors
 507Added supportive APIs to program efuse from Linux via smc calls
 508Added support for PUF regeneration
 509Fixed compilation warnings
 510Added doxygen tags
 511
 512Changes for 2018.2
 513===============================
 514freertos10_xilinx_v1_1:
 515Updated licensing information as per Freertos 10.0
 516
 517standalone_v6_7:
 518Fixed compilation warnings in xil_sleeptimer.c
 519Added API Xil_GetExceptionRegisterHandler.
 520
 521v_hdmirxss_v5_1:
 522Fixed a bug in XV_HdmiRxSs_BrdgOverflowCallback
 523Cleaned up the flow during HPD during the transition from HDMI 2.0 to HDMI 1.4
 524Updated application's EDID and udpated XV_ConfigTpg and EnableColorBar
 525
 526v_hdmitxss_v5_1:
 527Updated application's EDID and udpated XV_ConfigTpg and EnableColorBar
 528
 529v_hdmirx_v2_1:
 530Fixed a bug in PioIntrHandler
 531
 532video_common_v4_4
 533Fixed EDID parsing hanging issue
 534Fixed timing parameters for 720p24, 720p25 and 720p30
 535Removed dependency of math.h library from video_common's EDID parser
 536
 537v_hdmi_common_v1_1:
 538Fixed XV_HdmiC_ParseAudioInfoFrame on SampleFrequency and SampleSize parsing
 539
 540cpu_v2_7:
 541Replaced post_generate with post_generate_final.
 542This change has been made to make sure that "#endif"
 543in xparameter.h is placed at the end of file.
 544Updated generate proc to set HW based compiler flags,
 545earlier it was being done by HSI.It fixes CR#999895.
 546
 547i2srx_v1_1:
 548Changed log APIs so that they take the i2srx instance as argument.
 549Changed the channel status clear API to cover all the registers.
 550
 551i2stx_v1_1:
 552Changed log APIs so that they take the i2stx instance as argument.
 553Changed the channel status clear API to cover all the registers.
 554
 555iicps_v3_7:
 556Changed Eeprom scanning code with the dynamic Eeprom scanning code
 557from other examples. (CR#997545)
 558Changed the data packing code as per the other examples.
 559
 560rfdc_v4_0:
 561Add XRFdc_MTS_Sysref_Config API to enable/disable sysref.
 562Update max VCO value to 13108MHz to support max DAC sample rate of 6.554MHz.
 563Add macro to configure Threshold OFF mode.
 564Adjust calculated latency by sysref period, where doing so results in closer alignment to the target latency.
 565Corrected Set/Get MixerSettings API description for FineMixerScale parameter.
 566Enable VCO Auto selection while configuring the clock.
 567Add XRFdc_GetPLLConfig() API to get PLL Configurations.
 568Add XRFdc_GetLinkCoupling() API to get the Link Coupling mode.
 569Add clock configuration files for ZCU111 in examples.
 570Updated the lmk configuration to support different revisions of zcu111
 571Added support for configuring lmx 5.12GHz
 572Removed CalibrationMode check for DAC in XRFdc_GetMixerSettings() and XRFdc_GetNyquistZone() APIs.
 573Updated lower limit of Ref clock to 102.40625MHz.
 574
 575sdiaud_v1_1:
 576Changed selftest to cover all the GUI parameters like UHD SDI standard and maximum number of channels.
 577Changed clk phase bit default value.
 578Changed Set Clk Phase API's 2nd argument description.
 579Removed get version API call from the self test.
 580Added new line standards.
 581Added new API to enable rate control.
 582Removed inline function which reads the IP version.
 583Removed version register offset.
 584Added rate control enable shift and mask.
 585Added new macros for UHD-SDI standard and channels.
 586
 587lwip202_v1_1:
 588Avoid redundant axi ethernet config lookup and intialize.
 589Add Hot plug autodetect support for EmacPS and AXI Ethernet.
 590
 591spips_v3_1
 592InputClockHz parameter copied in instance for use in
 593application(CR#998910)
 594
 595sdps_v3_5
 596Resolve compilation warnings for sdps driver
 597
 598sysmonpsu_v2_4
 599Remove looping check for PL accessible bit
 600Remove usleeps from AMS CTRL example
 601
 602Resetps_v1_1
 603Fixed compilation warnings in resetps driver
 604
 605xilffs_v3_9
 606Resolve build warnings for xilffs library
 607
 608xilisf_v5_11
 609Added support for ISSI 256Mb series flash parts.
 610
 611nandpsu_v1_4
 612Added ICCARM compiler support in driver.
 613
 614xilfpga_v4_1
 615Added partial bitstream loading support.
 616
 617xilsecure_v3_1
 618Added support for 512, 576, 704, 768, 992, 1024, 1152, 1408, 1536, 
 6191984, 3072 key sizes, where previous version has support only 2048 and 
 6204096 key sizes.
 621On GCM tag failure, wrongly decrypted data will be zeroized.
 622Added support of user fuses revocation for single partition image.
 623Modified xilsecure_aes_example,input data will be over written with 
 624decrypted data
 625Added compilation flag for opting secure/non-secure environment, by 
 626deault it is non -secure, mainly it is taken into account while 
 627building PMUFW
 628
 629xilskey_v6_5
 630Fixed hanging issue for BBRAM ZynqMP when program/zeroise is requested 
 631while programming mode is in enabled state.
 632
 633zynqmp_fsbl
 634For secure boot added support for enhanced user fuses revocation.
 635
 636axidma_v9_7
 637Add support for 64MB data transfer.
 638
 639Changes for 2018.1
 640===============================
 641v_hdmi_common_v1_0
 642Initial release of HDMI Common Library
 643
 644csi2txss_v1_2
 645Add Frame End Generation feature
 646
 647csi2tx_v1_1
 648Add Frame End Generation feature
 649
 650video_common_v4_3:
 651Added EDID parsing capability with extende feature
 652Added new color space format XVIDC_CSF_YCBCR_420 to support UHDSDI
 653Tx/Rx soft IPs
 654Added new memory format BGR8
 655
 656v_mix_v4_0
 657Added 8th overlay layer
 658Moved logo layer enable from bit 8 to bit 15
 659
 660v_frmbuf_rd_v3_0:
 661Added interlaced support
 662Added new memory format BGR8
 663Added interrupt handler for ap_ready
 664
 665v_frmbuf_wr_v3_0:
 666Added interlaced support
 667Added new memory format BGR8
 668Added interrupt handler for ap_ready
 669
 670mcdma_v1_1:
 671Added failure checks in the tcl to avoid bsp compilation errors incase
 672stream interface is unconnected.
 673Updated tcl logic to export proper values for CACHE_COHERENT properties
 674when h/w is configured for single axi4 data interface.
 675Fix unused variable warning.
 676
 677axicdma_v4_4:
 678Extend AXI CDMA examples to support data buffers above 4GB.
 679
 680axidma_v9_6:
 681Use UINTPTR type for storing address.
 682Use virtual addr for BD access in _UpdateBdRingCDesc().
 683Extend AXI DMA examples to support data buffers above 4GB.
 684
 685dp_v7_0:
 686Updated the drivers to optimize for size.
 687Updated the drivers for DP1.4 support.
 688
 689dprxss_v5_0:
 690Updated the code to to optimize for size.
 691Added support for DP1.4.
 692Added new examples for DP1.4.
 693
 694i2stx_v1_0:
 695Added initial version of Xilinx I2S Tx soft IP driver.
 696
 697i2srx_v1_0:
 698Added initial version of Xilinx I2S Rx soft IP driver.
 699
 700iicps_v3_6:
 701Set Transfer size before slave address in MasterRecvPolled.
 702
 703resetps_v1_0
 704-Added Initial version of the resetps driver for Ultrascale+ ZynqMPSoC
 705-Added xresetps_example.c: Contains a list of peripherals to reset. List has
 706 reset ID of the peripheral, a peripheral register, a value for that
 707 register to be modified before reset and a reset value to validate
 708 successful reset.
 709-Change supported peripheral in mdd file from dummy ps7_resetps instance
 710 to a valid psu_crf_apb and psu_crl_apb instance to allow SDK to
 711 pull the drivers
 712-Remove psu_crl_apb IP instance from mdd file.
 713 Resetps driver is using both psu_crl_ap, psu_crf_apb  IP instances.
 714 But one instance is enough to pull  the driver into the SDK.
 715
 716wdttb_4_3
 717Added a function to program the width of Watchdog timer
 718Updated doxygen tags
 719
 720axivdma_v6_5:
 721Align default TX/RX framebuffer count with IP configuration.
 722Fix compilation error in selftest example.
 723
 724axiethernet_v5_7:
 725Fix compilation issues in multicast/extvlan example.
 726Implementing poll timeout API which replaces the loops
 727Set num of multicast table entries parameter based on hw design.
 728Use table entries count from config structure.
 729Used UINTPTR type for DMA BaseAddress.
 730
 731cpu_cortexa9_v2_6:
 732Added -g flag in default extra compiler flags, for linaro
 733toolchain. It fixes CR#995214.
 734
 735emacps_v3_7:
 736Export TSU clock frequency to xparameters.h
 737
 738freertos10_xilinx_v1_0:
 739Upgraded freertos kernel version to 10.0
 740Updated FreeRTOS tcl to fix bug in detecting latest standalone
 741version.It fixes CR#990995.
 742Export platform macros to xparameters.h based on processor.
 743Added interrupt handler API's for A9, A53, R5.
 744Added support for ttc in microblaze systems
 745Fixed compilation warnings related to interrupt handling API's
 746
 747freertos_lwip_tcp_perf_client and freertos_lwip_tcp_perf_server:
 748Add new SW apps.
 749Correct freertos version number.
 750
 751freertos_lwip_udp_perf_client and freertos_lwip_udp_perf_server:
 752Added new SW apps for freertos UDP performance tests.
 753
 754hdcp1x_v4_2:
 755Updated the XHdcp1x_PortDpRxEnable function to remove the
 756XDp_RxSetIntrHdcpAksvWriteHandler, XDp_RxSetIntrHdcpBinfoReadHandler,
 757and XDp_RxSetIntrHdcpRoReadHandler functions and replace them
 758with the new XDp_TxSetCallback function.
 759
 760freertos901_xilinx_v1_3:
 761Updated FreeRTOS tcl to fix bug in detecting latest standalone
 762version.It fixes CR#990995.
 763
 764lwip202_v1_0:
 765Upgrade to LWIP2.0.2 version
 766Remove PPC references
 767Add support for IGMP for emacps
 768Add multicast MAC update for IPv6 in xemacpsif.c and xaxiemacif.c
 769Add IPv6 source
 770Fix jumbo frame checks to work on R5
 771Add examples for raw and socker mode IGMP, webserver and
 772tftp client and server apps.
 773Update xInsideISR flag in emacps_error_handler.
 774In init_axi_dma() use UINTPTR for axidma base address.
 775Add support for Realtek RTL8211 phy.
 776Update header names in raw and socket examples.
 777
 778lwip_udp_perf_client and lwip_udp_perf_server:
 779Added new SW apps for raw mode UDP performance tests.
 780
 781rfdc_v3_2:
 782Add XRFdc_SetInterpolationFactor() and XRFdc_SetDecimationFactor() APIs.
 783Add CoarseMixMode field in mixer settings.
 784Add XRFdc_SetCalibrationMode() and XRFdc_GetCalibrationMode() APIs for calibration modes switch.
 785Add XRFdc_DynamicPLLConfig() API for PLL and external clock switch support.
 786Add XRFdc_GetClockSource() API to get clock source.
 787Add XRFdc_GetPLLLockStatus() API to get PLL lock status.
 788Add XRFdc_GetDriverVersion() API to get the driver version.
 789Add XRFdc_MultiConverter_Sync() and XRFdc_MultiConverter_Init() APIs to support Multi-Tile Sync.
 790Updated Set/Get Interpolation/Decimation factor APIs to consider the actual factor.
 791Add XRFdc_SetInvSincFIR() and XRFdc_GetInvSincFIR() APIs to support inverse-sinc.
 792Add XRFdc_MultiBand() and XRFdc_SetSignalFlow() APIs to configure Multiband and Singleband.
 793Update PLL structure in XRFdc_DynamicPLLConfig() API.
 794Update ADC and DAC datatypes in Mixer API and use input datatype for ADC in threshold and QMC APIs.
 795Removed FIFO disable check in DDC and DUC APIs.
 796Add support for Marker event source for DAC block.
 797Fixed DAC latency calculation in MTS.
 798Added support for reloading DTC scans.
 799Add option to configure sysref capture after MTS.
 800Update XRFdc_SetPLLConfig() API to correct PLL settings(PLL_CRS1, PLL_LPF1, PLL_CRS2).
 801
 802qspipsu_v1_7:
 803Removed unsupported 4 byte write and sector erase
 804commands.(CR#984966)
 805Added a support for MT25QL02G flash from Micron
 806(CR#990642)
 807Added a support for S25FL064L flash from Spansion
 808(CR#990724)
 809Added a support for MX66U1G45G flash from Macronix
 810(CR#992367)
 811Removed the check for writing the data to DMA MSB.
 812(CR#992560)
 813Added an API in driver to toggle the WP pin of the flash.
 814Added write protect example.(PR#2448)
 815Added support in EL1 non-secure mode. (CR#974882)
 816In dual parallel mode enable both CS when issuing write enable command.
 817(CR#998478)
 818
 819scugic_v3_9:
 820Added new API's to unmap specific/all SPI interrupts
 821from the target CPU. It fixes CR#992490.
 822
 823spi_v4_4:
 824When receive fifo exists, we need to check for status
 825register rx fifo empty flag. If clear we can proceed for
 826read. Otherwise we will hit execption. (CR# 989938)
 827
 828standalone_v6_6:
 829Updated cortexa9/xil_errata.h and cortexa9/xil_cache.c
 830to remove errata 753970, It fixes CR#989132.
 831Export platform macros to bspconfig.h based on processor.
 832Updated sleep routines to support user configurable sleep
 833implementation. Now sleep routines will use TTC instance
 834specified by user
 835Added a macro to replace conditional loops
 836Fixed the compilation warning in A53
 837Made changes to ensure that for A9/Zynq, C stack information
 838is flushed out from L1 D cache or L2 cache only when the
 839respective caches are enabled.
 840Updated asm_vectors.S and boot.S in Cortexa53 64 bit BSP, to add isb
 841after writing to cpacr_el1/cptr_el3 registers.
 842It would ensure disabling/enabling of floating-point unit, before any
 843subsequent instruction.
 844Updated get_connected_if proc in standalone tcl to detect the HPC
 845port configured with smart interconnect. It fixes CR#990318.
 846Updated the csu_wdt interupt to the correct value. Fixes CR#992229.
 847Fix for heap handling in ARM platforms. Fixes CR#993932.
 848Updated Cortex R5 BSP to add new mld parameter "lockstep_mode_debug",
 849to enable/disable debug logic in non-JTAG boot mode, when processor
 850is in lockstep configuration. By default, value of this parameter
 851is "false" and debug logic would be disabled. It can be enabled through
 852BSP setting by changing value of "lockstep_mode_debug" as "true".
 853It fixes CR#993896.
 854By default CPUACTLR_EL1 is accessible only from EL3, it
 855results into abort if accessed from EL1 non secure privilege
 856level. Updated Xil_ConfigureL1Prefetch function in Cortexa53 64 bit BSP
 857to avoid CPUACTLR_EL1 access from privile levels other than EL3.
 858Updated hypervisor enabled BSP to use PV console, based on the
 859XEN_USE_PV_CONSOLE flag. By deafault hypervisor enabled BSP would
 860use UART console, PV console can be enabled by appending
 861"-DXEN_USE_PV_CONSOLE" to the BSP extra compiler flags.
 862
 863sysmonpsu_v2_3:
 864Added missing closing bracket error when C++ is used
 865Added Conversion Support for voltages having Range of 1 Volt
 866Correct the AMS block channel numbers
 867Added example for testing AMS block voltage measurement
 868Added peripheral test support for sysmonpsu. CR-980362
 869Provided conditional checks for interrupt example in
 870sysmonpsu_header.h
 871Get Ref Clock Frequency information from design
 872Update Clock Divisor to the proper value
 873Update example code to run at higher frequency and remove sleep
 874
 875sdps_v3_4:
 876Use different commands for single and multi block transfers
 877Separated out SDR104 and HS200 clock defines
 878Move UHS macro check to SD card init routine
 879
 880csudma_v1_2:
 881Added support for peripheral test app support.
 882Fixed compilation issues in peripheral test creation
 883Add new API XCsuDma_64BitTransfer() in the driver useful
 884for 64-bit dma address transfers through pmu processor CR-996201.
 885
 886uartps_v3_6:
 887This patch updates the flow control mode offset value. CR-995026
 888
 889zdma_v1_5:
 890Added support for peripheral test app support.
 891Fixed peripheral app generation issues when running on OCM(CR-990806).
 892Fixed compilation issues in peripheral test creation
 893
 894libmetal_v1_4:
 895- Sync libmetal OSS project with upstream
 896
 897libmetal_demo:
 898- Update to work with updated libmetal lib
 899
 900openamp_v1.5:
 901- Sync openamp OSS project with upstream
 902
 903openamp_rpc_demo:
 904openamp_matrix_multiply_demo:
 905openamp_echo_test:
 906- Update to work with updated openamp and libmetal libs
 907
 908v_hdmirxss_v5_0:
 909Updated version from 4.0 to 5.0
 910Added Info frame supported
 911Added new reset sequence
 912Added support for ZCU104, ZCU106 and VCU118
 913Improve system flow in the example design
 914Added EDID parsing capability
 915
 916v_hdmitxss_v5_0:
 917Updated version from 4.0 to 5.0
 918Added Info frame supported
 919Added new reset sequence
 920Added support for ZCU104, ZCU106 and VCU118
 921Improve system flow in the example design
 922Added EDID parsing capability
 923
 924v_hdmirx_v2_0:
 925Updated version from 1.3 to 2.0
 926Added Info frame supported
 927Added new reset sequence
 928
 929v_hdmitx_v2_0:
 930Updated version from 1.3 to 2.0
 931Added Info frame supported
 932Added new reset sequence
 933
 934usbpsu_v1_4:
 935Modify USBPSU driver code to fit USB common example code for all USB IPs
 936Added support for flushing Dcache for setupdata packet for control ep's
 937Changed the mass storage examples to be in sync with common mode example code
 938Changed the dfu examples to be in sync with common example code
 939Added hibernation support for usb
 940Added changes to usbpsu driver for supporting microblaze platform
 941Enabled event generation for usb controller when run on microblaze plaforms
 942
 943xilfpga_v4_0:
 944Added the following Secure features to the xilfpga library.
 9451) Authenticated Bitstream loading using DDR.
 9462) Authenticated Bitstream loading Using OCM.
 9473) Authenticated + Encrypted Bitstream loading Using DDR with User-key.
 9484) Authenticated + Encrypted Bitstream Loading Using OCM with Device-key.
 9495) Authenticated + Encrypted + Key rolling Bitstream loading Using DDR with User-key.
 9506) Authenticated + Encrypted + Key rolling Bitstream loading Using DDR with Device-key.
 9517) Authenticated + Encrypted + Key rolling Bitstream Loading Using OCM with User-key.
 9528) Authenticated + Encrypted + Key rolling Bitstream Loading Using OCM with Device-ke
 953
 954For this version onwards we are not stripping the Header for Both
 955Secure and Non-Secure Bitstream Images.So the entry point interface
 956will be changed as follows.
 957u32 XFpga_PL_BitSream_Load (UINTPTR WrAddr, UINTPTR KeyAddr, u32 flags);
 958
 959Added the legacy bit file loading feature support from U-boot.
 960and improve the error handling support by returning the
 961proper ERROR value upon error conditions.
 962
 963xilrsa_v1_5:
 964Added description in mld
 965
 966xilsecure_v3_0:
 967Added support for NIST-SHA3 padding
 968Added API to make KECCAK/NIST(default)padding selection
 969Added AES and KUP key clear call after decryption
 970Modified XSecure_AesDecrypt() to use key in Secure header
 971Added APIs to load secure single partition image
 972
 973xilskey_v6_4:
 974Corrected status bits for Ultrascale plus
 975Added support for Virtex Ultrascale and Ultrascale plus
 976Cache is been re-loaded by library after programming eFUSE bits in ZynqMP
 977
 978xxvethernet_v1_0:
 979Add new driver for XXV Ethernet IP
 980Add support for USXGMII IP
 981
 982zynqmp_fsbl:
 983Added support for NIST-SHA3 padding
 984Added Boot header authentication
 985Forcing encryption for all partitions when ENC_ONLY eFUSE bit is set
 986Fixed AES KEY and IV re-use vulneribility issue
 987
 988zynqmp_pmufw:
 989- Using CSU WDT for PMU fail-safe mechanism instead of LPD WDT
 990- Implemented idle hooks for nodes USB, DP and SATA
 991- Added support for graceful forcepowerdown of PU to prevent any mid-flight
 992  axi transactions from locking up the interconnect and hanging the device.
 993- Added wake on USB support to wakeup all masters for which USB is set as
 994  wakeup source
 995- Corrected the timeout logic in node idling functions
 996- Seperated FPD and PLD power supply check hooks to increase FPD power up
 997  delay to 40ms(this is the maximum rampup time for FPD power rails)
 998- Added GPO section to config object to get the initial state of PMU GPO's
 999  and configure them in PMU Firmware
1000- Using TTC instead of IPI interrupt from PMU to interrupt APU upon WDT event
1001- Added all builds flags to xpfw_config.h file so that user can enable/disable
1002  any functionality from this config file
1003- Added misc folder to PMU Firmware
1004- Added modularity of xilfpga and xilsecure features using compiler switches
1005- Skip FPD power down when debugger is connected
1006- Added Power Off Suspend to RAM feature
1007- Use IPI-1 for callbacks/communication initiated by PMU Firmware to
1008  other masters
1009- Updated PM version to 1.0 to match with EEMI API version
1010- Added support for resetting GPIO5 resets going to PL
1011- Keeping OCM bank3 ON during suspend if wake on LAN is set
1012- Added API to support secure single partition image
1013- Sending PL_INIT status in PmGetChipid API response to indicate PL EFUSE is
1014  loaded into EFUSE IPDISABLE or not
1015- Polling for acknowledgment from AIB after isolation is enabled when
1016  power domain or island is powered down
1017- Checking all access regions present in pmAccessTable for finding vaild
1018  permissions for MMIO read and write calls
1019- Updated PM API IDs list in PMU Firmware with the new API IDs implemented
1020  in EEMI
1021- Updated xilfpga API calls in PMU Firmware with the latest version of
1022  xilfpga library
1023
1024Changes for 2017.4
1025===============================
1026
1027qspipsu_v1_6:
1028Flow for accessing flash parts with size more then 16MB
1029made similar to u-boot and linux.(CR#984966)
1030ICCARM compiler does not support __attribute__ syntax,
1031instead #pragma is used for the similar functionality.(CR#988625)
1032
1033ttcps_v3_5:
1034Updates XTtcPs_GetMatchValue and XTtcPs_SetMatchValue APIs
1035to use correct match register width for zynq  (i.e. 16 bit)
1036and zynq ultrascale+mpsoc (i.e. 32 bit). It fixes CR#986617
1037
1038v_csi2txss_v1_1:
1039Exporting ulps API to subsystem
1040
1041sdps_v3_3:
1042Use different commands for single and multi block transfers
1043
1044emacps_v3_6:
1045Export PL PCS PMA information for ETH1/2/3- CR-984847.
1046
1047qspipsu_v1_6:
1048Flow for accessing flash parts with size more then 16MB made similar to
1049u-boot and linux.(CR#984966) ICCARM compiler does not support
1050__attribute__ syntax, instead #pragma is used for the similar
1051functionality.(CR#988625)
1052
1053axidma_v9_5:
1054CR#987026 Fixed issue poll_multi_pkt example fails on a53
1055Fixed race condition in the XAxiDma_Reset() API.
1056CR#988210 Add interface to query config based on base addr.
1057
1058lwip141_2_0:
1059Correct assigment of TX BD ring in init_dma() and
1060emacps_error_handler().
1061CR#988210 Perform AXI DMA lookup based on base address.
1062
1063zdma_v1_4:
1064Fixed compilation errors for IAR compiler.
1065
1066zynqmp_pmufw:
1067- Exported efuse IP disable as part of version string in PmGetChipid to
1068recognize eg/cg/ev devices
1069- Enabled Optimize for size compiler flag in HSI flow
1070- Clearing master wakeup sources after master state is changed from
1071suspended to active
1072- Fix pmufw warnings related to unused variable, uninitialized variable
1073and signed compare
1074- Provided MMIO Read-only access to PMU LOCAL FPD lock status register
1075- Changed PMU Firmware version to 2017.4
1076- Added wrapper API for IPI poll for Ack in PMU Firmware
1077
1078zynqmp_fsbl:
1079Updated cross compiler flags with hard floating point values
1080Added functionality in FSBL to distinguish EV devices from EG devices
1081
1082
1083
1084Changes for 2017.3
1085===============================
1086
1087v_sdirx_v1_0:
1088Initial version for UHDSDI Rx soft IP
1089
1090v_sdirxss_v1_0:
1091Initial version for UHDSDI Rx subsystem soft IP
1092Added application support for SDI rx subsystem example design
1093
1094v_sditx_v1_0:
1095Initial version for UHDSDI Tx soft IP
1096
1097v_sditxss_v1_0:
1098Initial version for UHDSDI Tx subsystem soft IP
1099
1100Removed the below obsolete drivers & libraries (CR:981161)
1101axi_cdma_v4_1
1102axi_cdma_v4_2
1103axi_dma_v9_2
1104axiethernet_v5_1
1105axiethernet_v5_2
1106axi_pmon_v6_4
1107can_v3_1
1108canfd_v1_1
1109canps_v3_1
1110clk_wiz_v1_0
1111coresightps_dcc_v1_2
1112cpu_cortexa9_v2_2
1113cpu_cortexa9_v2_3
1114cpu_cortexa53_v1_1
1115cpu_cortexa53_v1_2
1116cpu_cortexr5_v1_1
1117ddrpsu_v1_0
1118dmaps_v2_2
1119dphy_v1_0
1120dprxss_v2_0
1121dprxss_v3_0
1122dptxss_v4_0
1123emaclite_v4_2
1124emacps_v3_2
1125gpio_v4_2
1126hdcp1x_v3_0
1127hdcp22_cipher_v1_0
1128hdcp22_mmult_v1_0
1129hdcp22_rng_v1_0
1130hdcp22_rx_v1_0
1131hdcp22_tx_v1_0
1132hwicap_v10_1
1133iic_v3_3
1134iicps_v3_2
1135iicps_v3_3
1136ipipsu_v2_0
1137iomodule_v2_3
1138mipicssi_v1_0
1139mutex_v4_1
1140nandpsu_v1_0
1141qspipsu_v1_1
1142qspipsu_v1_2
1143rtcpsu_v1_2
1144scugic_v3_3
1145scugic_v3_4
1146sdps_v2_8
1147sysmon_v7_2
1148sysmonpsu_v1_0
1149sysmonpsu_v1_1
1150tmrctr_v4_1
1151ttcps_v3_1
1152uartps_v3_1
1153uartps_v3_2
1154usb_v5_1
1155usbps_v2_3
1156usbpsu_v1_0
1157v_axi4s_remap_v1_0
1158v_csc_v2_0
1159v_deinterlacer_v6_0
1160v_deinterlacer_v6_1
1161v_hcresampler_v2_0
1162v_hcresampler_v2_1
1163v_hdmirx_v1_1
1164v_hdmirxss_v2_0
1165v_hdmitx_v1_1
1166v_hdmitxss_v2_0
1167v_hscaler_v3_0
1168v_letterbox_v2_0
1169v_mix_v1_0
1170v_tpg_v7_0
1171v_vcresampler_v2_1
1172v_vscaler_v2_0
1173video_common_v3_0
1174video_common_v3_1
1175vphy_v1_1
1176vprocss_v2_1
1177zdma_v1_0
1178xilffs_v3_3
1179xilffs_v3_4
1180xilfpga_v1_0
1181xilisf_v5_6
1182xilmfs_v2_0
1183xilmfs_v2_1
1184xilpm_v1_0
1185xilrsa_v1_1
1186xilsecure_v1_1
1187xilskey_v5_0
1188xilskey_v6_0
1189lwip141_v1_4
1190lwip141_v1_5
1191standalone_v5_4
1192standalone_v5_5
1193standalone_v6_0
1194freertos821_xilinx_v1_0
1195freertos823_xilinx_v1_0
1196freertos823_xilinx_v1_1
1197freertos823_xilinx_v1_2
1198
1199v_csc_v2_2
1200Added support for conversion from 420/422/444/RGB to 420/422/444/RGB
1201
1202v_demosaic_v1_0
1203added initial version
1204
1205v_frmbuf_rd_v2_0
1206added second buffer for semi-planar formats
1207added 64-bit address support for memory mapped interface
1208added new streaming and memory video formats
1209
1210v_frmbuf_wr_v2_0
1211added second buffer for semi-planar formats
1212added 64-bit address support for memory mapped interface
1213added new memory video formats
1214
1215v_gamma_lut_v1_0
1216added initial version
1217
1218v_mix_v3_0
1219added second buffer for semi-planar formats
1220added 64-bit address support for memory mapped interface
1221re-ordered register map to group layers together
1222
1223video_common_v4_2
1224Added new video modes, framerates, color formats for SDI
1225New member AspectRatio is added to video stream structure
1226Reordered XVidC_VideoMode enum variables and corrected the memory format enums
1227Add XVIDC_VM_3840x2160_60_P_RB video format
1228Added new streaming alpha formats and new memory formats
1229
1230vprocss_v2_4
1231Added support for conversion from 420/422/444/RGB to 420/422/444/RGB in
1232CSC-only topology
1233
1234mbox_v4_2:
1235Added support for FIFO reset using hardware control register
1236Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1237Fixed compilation warnings.
1238
1239mipicsiss_v1_1:
1240Added application support for mipi csi subsystem example design
1241
1242lwip141_v1_9:
1243Updated xemacpsif_physpeed.c to use smc calls to access thr CRL_APB,
1244this is done to support the applications running over EL1 NS mode.
1245Add freertos support for axiethernet fifo configuration.
1246SW workaround for TI DP83867 PHY Data integrity issues on KCU116/VCU118 Boards.
1247Change compiler used on A9.
1248Fixed conflicting types of variable xInsideISR to fix CR-981909.
1249Fix various warning messages in the lwip141 axiethernet adapter.
1250Add support for CCI.
1251Add rx_reset_nodata workaround for Zynq GEM in freertos case.
1252Disable L1 prefetch for ARMv8 in init_dma function in xemacpsif_dma.c to fix CR-981973.
1253
1254llfifo_v5_2:
1255CR#978769 Fix doxygen issues in the driver.
1256Updated comments in the usage section as per example code.
1257Fixed doxygen warnings in the driver.
1258
1259axidma_v9_4:
1260CR#974218 Add support for cyclic DMA mode.
1261
1262axidma_v9_4:
1263CR#974218 Add support for cyclic DMA mode.
1264
1265axiethernet_v5_6:
1266CR#979636 lwip stop's working as soon as something is plugged to it's
1267AXI stream bus.
1268CR#979023 Intr fifo example failed to compile.
1269Add support for axiethernet with mcdma configuration.
1270Fix pmufw bsp compilation error for axi-ethernet based designs.
1271Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1272Fixed compilation warnings.
1273
1274axipmon_v6_6:
1275Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1276
1277axivdma_v6_4:
1278Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1279Fixed compilation warnings.
1280
1281bram_v4_2:
1282Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1283Fixed compilation warnings.
1284
1285cpu_cortexa53_v1_4:
1286Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1287
1288cpu_cortexa9_v2_5:
1289Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1290
1291devcfg_v3_5:
1292Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1293Fixed compilation warnings.
1294
1295dp_v5_3:
1296Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1297
1298cpu_cortexr5_v1_4:
1299Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1300
1301hdcp1x_v4_1
1302Updating the XHdcp1x_TxIsInProgress function to keep track of a pending
1303authentication request.
1304Added flag IsAuthReqPending to the XHdcp1x_Tx data structure to track any
1305pending authentication requests.
1306Updated the XHdcp1x_CipherHandleInterrupt function to not mask the interrupts,
1307as it is being done in hardware now.
1308Updated the initialization to memset the XHdcp1x structure to 0.
1309
1310hwicap_v11_1
1311Updated software reset api by adding delay
1312Fixed compilation warnings
1313
1314intc_v3_7:
1315Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1316
1317iomodule_v2_5:
1318Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1319Fixed compilation warnings.
1320
1321mcdma_v1_0:
1322Initial version of mcdma driver
1323
1324nandpsu_v1_3
1325Added support to import examples in SDK.
1326Added CCI support.
1327
1328mig_7series_v2_1:
1329Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1330
1331mutex_v4_3:
1332Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1333Fixed compilation warnings.
1334
1335nandps_v2_3:
1336Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1337
1338prc_v1_1:
1339Added a new parameter "Cp_Compression" and status error flags
1340Updated api.tcl. Fix for CR-978747.
1341Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1342
1343qspipsu_v1_5:
1344Added index.html for importing example from the system.mss
1345Added support for readind ID till 5th byte as MT25Q series flash supports FSRFlag
1346but 128Mb and 256Mb parts are single die only. If the 6th bit of 5th ID byte
1347is 1 then we can set the FSRFlag.
1348Added CCI support.
1349Modified the checks for 4 byte addressing and commands in examples.
1350
1351qspips_v3_4
1352Added QSPI Buswidth parameter in canonical defines.
1353
1354rtcpsu_v1_5:
1355Fixed compilation warnings, source code cleanup. CR-983311
1356
1357axiethernet_v5_6:
1358CR#979636 lwip stop's working as soon as something is plugged to it's
1359AXI stream bus.
1360CR#979023 Intr fifo example failed to compile.
1361
1362axiethernet_v5_6:
1363CR#979636 lwip stop's working as soon as something is plugged to it's
1364AXI stream bus.
1365CR#979023 Intr fifo example failed to compile.
1366
1367standalone_v6_4:
1368Updated arm/common/xil_exception.c to fix warnings in C level exception handlers
1369of ARM 32 bit processors.
1370Updated cortexa53/64bit/gcc/asm_vectors.S to fix bug in  IRQInterruptHandler code
1371snippet, which checks for the FPEN bit of CPACR_EL1 register.
1372Supports XGetPSVersion_Info function for PMUFW - Fix for CR-967248
1373Supports XGetPlatform_Info function for PMUFW. Fix for CR-978237
1374Updated Xil_In32BE function in xil_io.h to fix bug.It fixes CR#979740.
1375Updated standalone tcl to generate xparameter XPAR_PL_IS_CACHE_COHERENT, if
1376h/w design got created with HPC port.
1377Updated a53 64 bit translation table to mark  memory as a outer shareable for
1378EL1 NS execution. This change has been done to support CCI enabled IP's.
1379Updated a53 64 bit boot code to implement ARM erratum 855873.This fixes CR#982209.
1380Made changes to fix various issues in R5 MPU handling logic. Added new APIs. CR#981028.
1381
1382scugic_v3_8:
1383Updated xdefine_gic_params proc in driver tcl to export correct canonical
1384definitions for pl to ps interrupts.Fix for CR#980534
1385Updated get_psu_interrupt_id proc in scugic tcl, to check if sink pin is
1386connected to any peripheral.This check has been added to avoid the BSP
1387creation failure, if interrupt pin is connected externally.Fix for
1388CR#980414.
1389
1390spi_v4_3:
1391Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1392
1393sysmon_v7_4:
1394Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1395
1396tft_v6_1:
1397Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1398
1399tmrctr_v4_4:
1400Updated XTmrCtr_DisableIntr macro to not to clear T0INT flag.It fixes
1401CR#980512.
1402Resolve compilation warning
1403Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1404
1405tpg_v3_1:
1406Updated NUM_INSTANCES parameter in xparameters.h and
1407xtpg_sinit.c to avoid errors. Fix for cr-976944.
1408
1409trafgen_v4_2:
1410Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1411
1412ttcps_v3_4:
1413Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1414
1415uartns550_v3_5:
1416Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1417
1418wdttb_v4_2:
1419Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1420
1421xilfpga_v3_0:
1422Added PL configuration registers readback support.
1423Added Device-key Encrypted BitStream Loading support to the xilfpga library.
1424
1425sdps_v3_3:
1426Add support for 64bit DMA addressing
1427Add support for 200MHz in SD driver
1428Fixed compilation warnings
1429Removed SD0_OTAPDLYENA and SD1_OTAPDLYENA bits
1430Modify driver to support 64-bit DMA in arm64 only
1431sdps: Prevent SD0_OTAPDLYENA and SD01_OTAPDLYENA bit to set
1432Properly set OTAPDLY value by clearing previous bit settings
1433Added CCI support for SD
1434Updated for Word Access System support
1435Resolved compilation errors with IAR toolchain
1436Added UHS_MODE_ENABLE macro to enable UHS mode
1437
1438xilisf_v5_9:
1439Expanded the description of serial_flash_family and serial_flash_interface.
1440Fix for CR-967359.
1441Added 4Byte addressing support for Micron devices. CR-980169
1442Added doxygen tags.
1443
1444xilffs_v3_7:
1445Added configurable option for _FS_RPATH
1446
1447xilflash_v4_4:
1448Added doxygen tags
1449
1450libmetal_v1_3:
1451- Sync libmetal OSS project with upstream
1452
1453openamp_v1.4:
1454- Sync openamp OSS project with upstream
1455
1456openamp_rpc_demo:
1457openamp_matrix_multiply_demo:
1458openamp_echo_test:
1459- Update to work with updated openamp and libmetal libs
1460
1461zdma_v1_3:
1462Updated driver and examples to support CCI at EL1 NS.
1463
1464emacps_v3_5:
1465Export CCI enablement information and add support in examples.
1466
1467xilsecure_v2_2:
1468Added doxygen tags.
1469Added RSA decrypt with private key and encrypt with public key support.
1470Added RSA 2048 support.
1471Added APIs to support xilsecure functionalities in linux.
1472
1473xilskey_v6_3:
1474Provided support for programming eFUSE and BBRAM of kintex Ultrascale plus.
1475
1476zynqmp_fsbl:
1477- For secure boot added PPK invaliadity checks in FSBL.
1478- Implemented Secondary boot as specified in image header of the boot image.
1479- Enable qspi boot in 1-bit and 2-bit qspi buswidths.
1480- Clear all pending interrupts in case of APU only Restart.
1481- Unconditionally remove PS-PL isolation in PS-only reset.
1482- Disable all alarms before and re-enable them after applying
1483  protection configuration.
1484- Clear total byte counter after every cycle of ADMA to prevent byte count overflow
1485  interrupt from being set.
1486- Modify the max transfer length in DMA to make it 64 it aligned, this is to eliminate
1487  ECC errors.
1488- Added a macro indicating wait time for PL power up, customers can set their respective
1489  values, default value is zero.
1490- Enable propagation PROG signal to PL after ps-only reset which is gated during ps-only reset.
1491- Rectify ID code of ZU6EG devices.
1492
1493zynqmp_pmufw:
1494- Added three level debug prints for PMU Firmware application
1495- Updated scheduler task removal logic to ensure that no task will be removed
1496  before its execution
1497- Enabling Isolation before powering down any power domain/power island to
1498  avoid any bus hang when accessed and disabling the same when powering up
1499- Added extra prints to give detailed information to the user when XMPU/XPPU
1500  violation occurs
1501- Added disabling and re-enabling of PMU interrupts before coming out of
1502  interrupt handler to acknowledge any pending interrupts
1503- Added boot pin control register access to MMIO access region
1504- Updated HSI TCL to get compiler flags from command line
1505- Updated PMU Firmware DDR driver
1506- Enabling broadcasting of inner shareable transactions if PL is configured
1507  for coherency in HW design
1508- Ignoring the PLL use count for floating clocks to avoid PLL use accounting to
1509  be disrupted. And assigning the usb3dual clock to both usb0 and usb1 slaves
1510- Fixed MISRA-C violations in PMU Firmware base code
1511- Disabling WDT recovery when PM master is entering suspended or killed state.
1512  And enabling WDT recovery when PM master comes to active state
1513- Changed LPD WDT timeout value to 90 milliseconds to meet safety requirement
1514- Updated the PMU EM module to set/remove the error action for any error at
1515  run time using IPI. And log the errors and send when the target requests
1516- Added SRST support for FPD WDT
1517- Put SysOsc in sleep mode and change UART requirements while going to deep
1518  sleep mode to avoid more power consumption
1519- Added xilsecure API calls to support xilsecure functionality from Linux
1520
1521Changes for 2017.2
1522================================
1523
1524cpu_cortexr5_v1_3
1525Added -mfloat-abi=hard and -mfpu=vfpv3-d16 in extra compiler flags,
1526to support hard flaoting point for cortex-r5 standalone BSP.
1527
1528gpiops_v3_3:
1529Added notes about gpio pin description for zcu102 and zc702
1530boards. Fix for cr-955076
1531Resolved doxygen warnings.CR#1006331
1532
1533ipipsu_v2_3:
1534Added suffix U for all macros of ipipsu in xparameters.h
1535Fix for CR-963131.
1536
1537qspispu_v1_5:
1538Added support for accessing upper DDR in qspi boot mode and example.
1539Fix for CR-972531
1540
1541scugic_v3_7:
1542Added suffix U for all macros of scugic in xparameters.h
1543Fix for CR-963131.
1544
1545standlone_v6_3:
1546Added hard floating point support in the cortex-r5 BSP.
1547Updated Cortex-a53 32 bit BSP boot code to fix bug in the HW coherency
1548enablement. It fixes the CR#973287
1549Updated Cortex-a53 64 bit BSP boot code, to remove redundant write to
1550the L2CTLR_EL1 register. It fixes the CR#974698
1551
1552sysmonpsu_v2_2:
1553Corrected temperature conversion formulas
1554
1555xilsecure_v2_1
1556Added SHA2 binary for freertos R5 with soft floating point and
1557standalone R5 binary with hard floating point.
1558
1559xilfpga_v2_1:
1560Fixed the check logic issue in Xfpga_PL_BitStream_Load().
1561
1562zynqmp_fsbl:
1563Added word alignement to AuthBuffer, by adding attribute.
1564
1565zynqmp_pmufw:
1566Bypass RPLL in system reset for Silicon 1.0. This is a workaround for a bug in Silicon 1.0 which was fixed in other versions of Silicon
1567Binding main and lsbus top switch clocks to the DDR node to ensure that PLLs which drive these clocks do not get reset/bypassed as long as the DDR being accessed.
1568
1569axiethernet_v5_5:
1570Increase Timeout value in the driver as per new h/w update CR#976244.
1571
1572Change Log for 2017.1
1573=================================
1574
1575Removed the below obsolete drivers & libraries (CR:966227)
1576axi_cdma_v3_0
1577axi_cdma_v4_0
1578axi_dma_v8_1
1579axi_dma_v9_0
1580axi_dma_v9_1
1581axiethernet_v4_3
1582axiethernet_v4_4
1583axiethernet_v5_0
1584axi_pcie_v3_0
1585axi_pmon_v6_1
1586axi_pmon_v6_2
1587axi_pmon_v6_3
1588axi_vdma_v5_0
1589axi_vdma_v5_1
1590axi_vdma_v6_0
1591bram_v4_0
1592can_v3_0
1593canfd_v1_0
1594canps_v3_0
1595coresightps_dcc_v1_0
1596coresightps_dcc_v1_1
1597cpu_cortexa9_v2_1
1598cpu_cortexa53_v1_0
1599cpu_cortexr5_v1_0
1600cpu_v2_4
1601csudma_v1_0
1602devcfg_v3_3
1603dp_v1_0
1604dp_v2_0
1605dp_v3_0
1606dp_v4_0
1607dprxss_v1_0
1608dptxss_v1_0
1609dptxss_v2_0
1610dptxss_v3_0
1611emaclite_v4_0
1612emaclite_v4_1
1613emacps_v2_2
1614emacps_v3_0
1615emacps_v3_1
1616gpio_v4_0
1617gpio_v4_1
1618gpiops_v2_2
1619gpiops_v3_0
1620hdcp1x_v1_0
1621hdcp1x_v2_0
1622hwicap_v9_0
1623hwicap_v10_0
1624iic_v3_0
1625iic_v3_1
1626iic_v3_2
1627iicps_v2_3
1628iicps_v3_0
1629iicps_v3_1
1630intc_v3_3
1631intc_v3_4
1632llfifo_v4_0
1633llfifo_v5_0
1634iomodule_v2_1
1635iomodule_v2_2
1636ipipsu_v1_0
1637mbox_v4_0
1638mutex_v4_0
1639qspips_v3_2
1640qspipsu_v1_0
1641rtcpsu_v1_0
1642rtcpsu_v1_1
1643scugic_v2_1
1644scugic_v3_0
1645scugic_v3_1
1646scugic_v3_2
1647scutimer_v2_0
1648scuwdt_v2_0
1649sdps_v2_3
1650sdps_v2_4
1651sdps_v2_5
1652sdps_v2_6
1653sdps_v2_7
1654spi_v4_0
1655spi_v4_1
1656spips_v2_0
1657srio_v1_0
1658sysmon_v7_0
1659sysmon_v7_1
1660tmrctr_v3_0
1661tmrctr_v4_0
1662tpg_v3_0
1663trafgen_v3_2
1664trafgen_v4_0
1665ttcps_v3_0
1666uartlite_v3_0
1667uartlite_v3_1
1668uartns550_v3_2
1669uartps_v3_0
1670usb_v5_0
1671usbps_v2_2
1672v_csc_v1_0
1673v_deinterlacer_v5_0
1674v_hcresampler_v1_0
1675v_hdmirx_v1_0
1676v_hdmirxss_v1_0
1677v_hdmitx_v1_0
1678v_hdmitxss_v1_0
1679v_hscaler_v1_0
1680v_hscaler_v2_0
1681v_letterbox_v1_0
1682v_vcresampler_v1_0
1683v_vcresampler_v2_0
1684v_vscaler_v1_0
1685video_common_v1_1
1686video_common_v2_0
1687video_common_v2_1
1688video_common_v2_2
1689vphy_v1_0
1690vprocss_v1_0
1691vprocss_v2_0
1692vtc_v6_1
1693vtc_v7_0
1694wdtps_v2_0
1695xadcps_v2_0
1696xadcps_v2_1
1697ycrcb2rgb_v6
1698xilffs_v2_1
1699xilffs_v2_2
1700xilffs_v3_0
1701xilffs_v3_1
1702xilffs_v3_2
1703xilflash_v4_0
1704xilflash_v4_1
1705xilisf_v5_0
1706xilisf_v5_1
1707xilisf_v5_2
1708xilisf_v5_3
1709xilisf_v5_4
1710xilisf_v5_5
1711xilrsa_v1_0
1712xilsecure_v1_0
1713xilskey_v2_0
1714xilskey_v2_1
1715xilskey_v3_0
1716xilskey_v4_0
1717lwip140_v2_3
1718lwip141_v1_0
1719lwip141_v1_1
1720lwip141_v1_2
1721lwip141_v1_3
1722xilkernel_v6_2
1723standalone_v4_2
1724standalone_v5_0
1725standalone_v5_1
1726standalone_v5_2
1727standalone_v5_3
1728standalone_v5_6
1729xilapufw_v1_0
1730xilopenamp_v1_0
1731
1732
1733
1734
1735
1736
1737
1738axiethernet_v5_4:
1739Add Support for TI PHY DP83867 SGMII Mode configuration in the examples.
1740Fixed CR#971367 fix race condition in the tcl for a multi mac design
1741(AXI_CONNECTED_TYPE defined only for one instance).
1742
1743axipmon_v6_5:
1744Updated the makefile to fix the bug, to avoid the compilation failure
1745of the axipmon applications.It fixes the CR#974412
1746
1747axivdma_v6_3:
1748Fixed compilation errors. CR-969129
1749
1750coresightps_dcc_v1_4:
1751Fixed MISRA C mandatory violations CR#970529.
1752
1753ccm_v6_1:
1754Modified num instances parameter as XPAR_XCCM_NUM_INSTANCES
1755in xparameters.h, xccm_sinit.c to avoid compilation errors because it
1756was updated as XPAR_CCM_NUM_INSTANCES in both files. Fix for CR#966099.
1757
1758cfa_v7_1:
1759Modified num instances parameter as XPAR_XCFA_NUM_INSTANCES
1760in xparameters.h, xcfa_sinit.c to avoid compilation errors because it
1761was updated as XPAR_CFA_NUM_INSTANCES in both files. Fix for CR#966099
1762
1763clk_wiz_v1_2:
1764Fixed compilation errors and warnings. CR-970507.
1765
1766cpu_cortexa9_v2_4:
1767Updated makefile with "clean" target
1768Updated tcl to check each extra compiler flag individually
1769for linaro toolchain and if any default flags are missing,
1770it adds the required flags. It fixes CR#965023.
1771Added "-Wall -Wextra" to the extra compiler flags.
1772Updated cpu_cortexa9.tcl to guard xparameters.h by protection macros.
1773It fixes CR#963130.
1774
1775cpu_cortexa53_v1_3:
1776Updated makefile with "clean" target
1777Added "-Wall -Wextra" to the extra compiler flags.
1778Updated cpu_cortexa53.tcl to guard xparameters.h by protection macros.
1779It fixes CR#963130.
1780
1781cpu_cortexr5_v1_2:
1782Updated makefile with "clean" target
1783Added "-Wall -Wextra" to the extra compiler flags.
1784Updated tcl to support IAR compiler.
1785Updated cpu_cortexr5.tcl to guard xparameters.h by protection macros.
1786It fixes CR#963130.
1787
1788cpu_v2_6:
1789Added "ffunction-sections" and  "fdata-sections"
1790to the deafult extra complier flags, and remove "-g" from
1791the same.It fixes CR#965574.
1792Added "-Wall -Wextra" to the extra compiler flags.
1793
1794cresample_v4_1:
1795Modified num instances parameter as XPAR_XCRESAMPLE_NUM_INSTANCES
1796in xparameters.h, xcresample_sinit.c to avoid compilation errors because it
1797was updated as XPAR_CRESAMPLE_NUM_INSTANCES in both files. Fix for CR#966099
1798
1799emacps_v3_4:
1800Updated emacps tcl to export PCS definitions for newer version of
1801Xilinx PCS PMA core where PHY address is not a parameter.
1802Fixed Compilation warnings - CR#957004
1803
1804enhance_v7_1:
1805Updated num instances parameter as XPAR_XENHANCE_NUM_INSTANCES
1806by modifying tcl and _sinit.c files to avoid compilation error. Fix
1807for CR-967548.
1808
1809freertos901_xilinx_v1_0:
1810Added latest freertos version freertos901_xilinx.
1811Updated tcl as per standalone directory structure.
1812Updated makefiles to fix build issue on windows.
1813Updated the tcl to set value of configTIMER_QUEUE_LENGTH  properly.
1814It fixes CR#968541
1815Updated traceTASK_DELAY_UNTIL macro in FreeRTOSSTMTrace.h to
1816fix errors in BSP, built with the stm event trace enabled. It
1817fixes CR#969576
1818
1819gpiops_v3_2:
1820Fixed Compilation warnings - CR#957004.
1821
1822hwicap_v11_0:
1823Adopted read-back configuration data frame support for 8-series devices
1824
1825iicps_v3_5:
1826Workaround for SLVMON issue in zynq.
1827As per user guide when SLVMON bit is cleared in control register,
1828master should stop sending the address.But, this is not happening
1829with the zynq I2C IP.
1830
1831intc_v3_6:
1832Updated xredefine_intc function in tcl to avoid errors,
1833for design in which number of interrupt sources connected
1834to AXI INTC is 0.It fixes CR#966295
1835Updated xredefine_intc and intc_define_vector_table functions
1836to generate separate canonical definitions and constants
1837definitions for interrupt IDs/Masks, if interrupt pin of
1838same IP is connected to two axi intc pins
1839Updated xredefine_intc and intc_define_vector_table functions in
1840tcl, to add "LOW_PRIORITY" string in canonical/constant names of
1841interrupts connected to higher pin number of INTC, only if specific interrupt
1842port of IP is interrupting through more than one INTC pins.
1843Fixed compilation warnings in driver source code.It fixes CR#970483.
1844
1845iomodule_v2_4:
1846Fixed compilation warnings
1847
1848ipipsu_v2_2:
1849Modified the ipipsu.tcl script to have array size in config table. Fixes
1850CR#963134
1851Add support for updating ConfigTable at run time.CR#969385
1852
1853lwip141_v1_8:
1854Updated xemacpsif_physpeed.c to scan for phy addr when newer version of
1855Xilinx PCS PMA core is used.
1856Add Support for TI PHY DP83867 SGMII Mode configuration.
1857Fixed Compilation warnings - CR#957004
1858Add jumbo frame support for ZynqMP GEM.
1859Correct TI PHYCR initialization in xemacpsif_physpeed.c
1860Add SW workaround for TI DP83867 PHY link instability.
1861
1862nandpsu_v1_2:
1863change memcpy to Xil_MemCpy. fixes CR#960462
1864fix for the failure of reading nand first redundant paramter page
1865CR#966603
1866Fixed compilation warning in _g.c
1867Fixed MISRAC mandatory violation - CR#970533
1868
1869prd_v1_1:
1870Modified num instances parameter as XPAR_XPRD_NUM_INSTANCES in xparameters.h,
1871xprd_sinit.c to avoid compilation errors because it was updated as
1872XPAR_PR_DECOUPLER_NUM_INSTANCES in both files. Fix for CR#966099
1873
1874qspipsu_v1_4:
1875Fixed Compilation warnings - CR#957004
1876
1877rtcpsu_v1_4:
1878Fixed Compilation warnings - CR#957004
1879Correct  the calibration and frequency macros to generate the accurate time.
1880
1881rgb2ycrcb_v7_1:
1882Modified num instances parameter as XPAR_XRGB2YCRCB_NUM_INSTANCES
1883in xparameters.h, xrgb2ycrcb_sinit.c to avoid compilation errors
1884because it was updated as XPAR_RGB2YCRCB_NUM_INSTANCES in both
1885files. Fix for CR#966099
1886
1887scugic_v3_6:
1888Added new API XScuGic_Stop to Disable distributor and interrupts
1889in case they are being used only by current cpu. It also removes
1890current cpu from interrupt target registers for all interrupts.
1891Modified the scugic.tcl script to have array size in config table. Fixes
1892CR#963134
1893Add support for changing GIC CPU master at run time.CR#969386
1894Make the CpuId as static variable and Added new XScugiC_GetCpuId to access
1895CpuId.
1896Revert the changes made for CR#964552
1897
1898sdps_v3_2:
1899Corrected voltage switching sequence
1900Fixed Compilation warnings - CR#957004
1901Add DDR and HSD support for eMMC
1902Support for bus width switching based on hdf
1903Added support for A53-32bit on ZynqMP.
1904Fixed MISRAC mandatory violation - CR#970531
1905Fixed UR data flow anomalies
1906Add support in EL1 non secure mode
1907
1908standlone_v6_2:
1909Added Xil_MemCpy for word alinged data access
1910Added support for Floating point access for Cortex-A53 64bit mode standalone BSP
1911Added support for Cortex-A53 64bit EL1 Non-secure execution on hypervisor.
1912If hypervisor_guest is set true in bsp settings, it will be compiled for
1913EL1 Non-secure, else it will be compiled for EL3. By default Cortex A53 64bit
1914BSP is built for EL3 Secure Monitor.
1915Modified Cortex-A53 translation table for upper ps DDR. The 0x800000000 -
19160xFFFFFFFFF range is marked normal memory for the DDR size defined in hdf
1917and rest of the memory in that 32GB region is marked as reserved to avoid
1918any speculative access
1919Fixed Compilation warnings - CR#957004
1920Updated makefiles of R5 and a53 64 bit/32 bit processors to fix error in clean
1921target.It fixes the CR#966900.
1922Added IAR compiler support for Cortex R5 BSP.
1923Add safe Xil_Out32 implementation.
1924Fixed issues with Xil_DCacheDisable API. This is for CR#966220.
1925Updated arm/common, arm/cortexa9, arm/cortexa53 files for doxygen
1926compliant comments
1927Updated cortexa53/64bit/boot.S to clear FPUStatus variable to make sure
1928that it contains initial status of FPU i.e. disabled. In case of a warm
1929restart execution when bss sections are not cleared, it may contain
1930previously updated value which does not hold true once processor resumes.
1931This fixes CR#966826.
1932Updated common,microblaze and arm/cortexr5 files with doxygen compliant
1933comments.
1934Updated Cortex R5 IAR boot code to clear c15 registers and configure the
1935timer.
1936Added arm/cortexa53/64bit/xil_smc.c, xil_smc.h files to provide a C wrapper for
1937smc calling which can be used by cortex-A53 64bit EL1 Non-secure application
1938Added support thumb mode. CR-970805
1939Fixed MISRA C mandatory standard violations in ARM cortexr5 and cortexa53 BSP.
1940It fixes CR#970543
1941Fixed the CR#970859. The MB intrusive profiling when enabled was causing a crash
1942because of invalid HSI command being used. This change fixes it.
1943Updated standalone tcl to generate xparameter XPAR_FPD_IS_CACHE_COHERENT, if
1944any FPD peripheral is configured to use CCI.This change is applicable only for
1945psu_pmu processor bsp.It fixes CR#972638
1946
1947sysmonpsu_v2_1:
1948Fixed Compilation warnings - CR#957004
1949Added voltage conversion macro for Vcco_psio
1950Add PL reset check before PL sysmon reset
1951
1952tmrctr_v4_3:
1953Updated tmrctr_tapp tcl to avoid errors, if axi timer interrupt is connected
1954to more than one pins of interrupt controller.
1955
1956tmr_inject_v1_0:
1957Initial version of tmr_inject driver
1958
1959tmr_manager_v1_0:
1960Initial version of tmr_manager driver
1961
1962ttcps_v3_3:
1963Updated ttcps_tapp.tcl to check whether ttc device is interrupting current
1964processor or not.If device is not interrupting the current processor then,
1965do not include ttc driver instance and interrupt example source/header files to
1966peripheral test. It fixes CR#970569.
1967Updated gen_testfunc_call proc in ttcps_tapp.tclto fix bug in
1968instance number calculation.It fixes the CR#972418.
1969
1970uartlite_v3_2:
1971Added supported peripheral tmr_sem
1972
1973uartps_v3_4:
1974sync UART_CLK_FREQ_HZ parameter with xparameters.h file uart frequency
1975parameter macro
1976Fixed Compilation warnings - CR#957004
1977
1978usbpsu_1_2:
1979Updated source code to fix compilation errors for IAR compiler.
1980Corrected code for dereferncing event data CR#969056
1981
1982video_common_v4_1
1983Added new memory formats
1984Added API to get video mode id with matching blanking information
1985Fixed c++ compilation warnings
1986
1987v_frmbuf_rd_v1_0
1988added initial version
1989
1990v_frmbuf_wr_v1_0
1991added initial version
1992
1993vmix_v2_1
1994Added check to make sure logo layer is enabled before loading logo pixel alpha
1995Define size of configtable array in tcl and update generated g.c
1996Updated PowerOnDefault API to read video stream property from IP configuration
1997Updated processor name in example to reflect change in hardware example design
1998
1999vprocss_v2_3
2000Make log feature optional
2001Updated example design FULL topology test cases
2002Updated makefile to add compiler flags to seggregate dat and text sections
2003Updated mdd to remove sub-core version dependency
2004Added HasMADI flag to subsystem configuration and fix for CR#964829
2005Fixed c++ compilation warnings
2006
2007xilfpga_v2_0:
2008Added Encrypted BitStream Loading support to the xilfpga library.
2009Added Authenticated BitStream Loading support to the xilfpga library.
2010
2011wdttb_v4_1:
2012Fixed race condition in the driver CR#966068
2013
2014xilffs_v3_6:
2015Fixed Compilation warnings - CR#957004
2016Added configurable option for USE_STRFUNC
2017
2018xilflash_v4_3:
2019Fixed Compilation warnings - CR#957004
2020
2021xilisf_v5_8:
2022Fixed FastReadData bug - CR#968476
2023
2024xilmfs_v2_3:
2025Fixed Compilation warnings - CR#957004
2026
2027xilopenamp_v1_0:
2028obsoleted lib (was replaced in 2016.1 release by openamp lib)
2029This is mainly a name change to better match the github project library name.
2030
2031xilpm_v2_1:
2032- Modified clean rule in makefile to remove libxilpm.a. Fix for
2033CR#962551.
2034- Fixed Compilation warnings - CR#957004
2035- Added PM_INIT_FINALIZE API
2036- Added SET_CONFIGURATION API to load the config object
2037- Added config object generator tcl to generate the config data from HDF
2038
2039xilrsa_v1_3:
2040Updated makefile to add clean rule.Fix for CR#962551.
2041
2042xilsecure_v2_0:
2043Added support for PMU
2044Added comments with .nky fields for aes encryption example.
2045Provided genric APIs for encryption and decryption of data.
2046Provided separate example for encryption and decryption of data.
2047Support for Calculation of exponential value can also be done internally
2048Modified AES APIs such that, data passed to APIs should be in little endian
2049format.
2050Fixed compilation warning CR#971971
2051
2052xilskey_v6_2:
2053On ZynqMP Added CRC check after programming whole AES key.
2054For each ZynqMP eFUSE bit programming added verification with all 3 margin reads
2055Removed temperaure and voltage checks for every eFUSE bit programming for ZynqMP
2056Added support for programming more secure control bits-Lbist,LPD/FPD SC enable
2057Modified PROG_GATE programming from three inputs to one.
2058
2059ycrcb2rgb_v7_1:
2060Updated num instances parameter as XPAR_XYCRCB2RGB_NUM_INSTANCES
2061by modifying tcl and _sinit.c files to avoid compilation error. Fix
2062for CR-967548.
2063
2064zdma_1_2:
2065Updated driver to fix compilation errors for IAR compiler.
2066Added support for CCI.
2067
2068zynqmp_fsbl:
2069- Added support for micron QSPI 2G part.
2070- Added PL clearing based on the user configuration
2071- Added HIVEC support
2072- Fixed Vector regions overwritten in R5 FSBL with secure partitions CR#953663
2073- Enhanced secure bitstream authentication to more security.
2074- Added PPK hash and SPKI ID verification for eFUSE RSA authentication
2075- Locks XMPU/XPPU from further access after applying protection configuration,
2076but bypasses this configuration by default.
2077- Enabled ZCU106 board specific code.
2078- Replaced PM_INIT with SET_CONFIGURATION call.
2079- Restricts the FSBL creation if any mandatory IP for FSBL is either isolated for
2080the given processor or not exists in the design, or if OCM is not sufficient
2081- Added USB boot mode support in FSBL.
2082- Added APU ONLY reset.
2083- Made Xilpm library as mandatory for FSBL.
2084- Added authentication of image header prior to use.
2085- Modified Destination CPU check to check PMUFW CPU.
2086- Added LTO flags for FSBL
2087- Fix for multiple program sections in FSBL.
2088- Modified code for MISRA-C:2012 Compliance
2089- Fix to access BRAM in PS only reset.
2090- Fix to write correct value to ANALOG_BUS register
2091
2092libmetal_v1_2:
2093- Sync libmetal OSS project with upstream
2094
2095openamp_v1.3:
2096- Sync libmetal OSS project with upstream, i.e:
2097- Allow APU to restart independently from RPU
2098- Keep working with latest kernel
2099
2100openamp_rpc_demo:
2101openamp_matrix_multiply_demo:
2102openamp_echo_test:
2103- Update to work with updated openamp and libmetal libs
2104- Added reconnection to echo_test
2105
2106zynqmp_pmufw:
2107- Added support for APU sub-system restart
2108- Added support for WDT triggered APU restart and escalation
2109- Fixes for DDR Self-Refresh issues
2110- Added SET_CONFIGURATION API implementation to enable config object loading
2111- PM operations now depend on the config object loaded by FSBL
2112- Added PM_INIT_FINALIZE API call
2113- Added support for handling masters without PM enabled
2114- Debug prints are disabled by default. Can be enabled by defining DEBUG_MODE
2115- Fixes for mandatory MISRA C 2012 violations
2116- PMUFW now enables broadcasting of inner shareable transaction, if any LPD/FPD
2117  peripheral is configured to use CCI.This change is required to support CCI enabled
2118  peripherals in linux.
2119- Fixed build issues when ENABLE_PM is not defined
2120- Added PM_SECURE_RSA_AES API call to support secure image handling
2121- xilsecure is used by PMUFW to support encryption/decryption features
2122- Restore clocks config when APU reboots regardless of nodes state.
2123- Clear power down request bit when processor is forced down.
2124- Release reset after powering up a GPU pixel processor
2125- PmInitFinalize PM API call is added, which is used to inform the PFW that the caller master has initialized its own power management. Until a master calls PmInitFinalize, PFW will keep running/On all slaves which the master can use (this is defined with permissions provided in the configuration object). If a master doesn't have PM support, it will never call PmInitFinalize, so PFW will always ensure that all slaves that the master can use remain running.
2126- New 'uninitialized' state is used to capture that a master has not called PmInitFinalize. All masters are initially 'uninitialized'.
2127
2128Change Log for 2016.4
2129=================================
2130axiethernet_v5_3:
2131Fixed compilation errors for PMU template firmware on ZynqMP
2132for AXI-Ethernet based designs
2133
2134axipmon_v6_5:
2135Updated OCM axipmon example for proper ID
2136
2137iic_v3_4:
2138Reduce the usleep time in Bus-busy check condition.
2139Reduce the usleep time from 1000 to 100 usec in Bus-busy check condition.
2140
2141xilfpga_v1_1:
2142Added PL power-up and Isolation sequence to the xilfpga library
2143Added PS-PL Reset sequence.
2144Added Preprocessor check for XPAR_NUM_FABRIC_RESETS to avoid the
2145compilation errors.
2146Added gpio assert logic to properly reset the PL from PS.
2147
2148freertos823_xilinx_v1_3:
2149Added APIs handle_stdin_parameter and handle_stdout_parameter in
2150FreeRTOS tcl.::hsi::utils::handle_stdin and
2151::hsi::utils::handle_stdout are taken as a base for these APIs and
2152modifications are done on top of it to handle stdin and stdout parameters for
2153design which doesnt have UART.
2154It fixes CR#953681
2155
2156scugic_v3_5:
2157Fixed incorrect modification of interrupt target processor register in
2158XScuGic_InterruptMaptoCpu
2159
2160sdps_v3_1:
2161Fixed compilation warnings
2162Reduce the delay during power cycle
2163Use emmc_hwreset pin to reset eMMC card
2164Add delay between assert/deassert of emmc reset
2165Enable Rst_n bit in ext_csd reg if disabled
2166Add dll reset during auto tuning
2167
2168ttcps_v3_2:
2169Modified XTtcPs_GetCounterValue,XTtcPs_GetInterval and
2170XTtcPs_CalcIntervalFromFreq functions to use 32 bit counter/
2171interval values for zynq ultrascale+mpsoc.It fixes CR#962482.
2172
2173xilffs_v3_5:
2174Removed enable_mmc option
2175Added support for FreeRTOS
2176
2177xilskey_v6_1:
2178Removed Zynq BBRAM control bits as they are part of the eFUSE
2179Fixed compilation warnings
2180Added support for PUF registration and eFUSE programming with PUF data
2181Removed xilinx specific bits programming
2182
2183v_deinterlacer_v6_2:
2184Fix c++ compile problem
2185
2186v_hscaler_v3_1:
2187Fixed configuration validation check for RGB input
2188
2189vprocss_v2_2:
2190Capture failure during router data flow setup in log buffer
2191
2192Standalone_v6_1:
2193Defines interrupt ID number for FPD_SWDT, renamed XPS_WDT_INT_ID
2194as XPS_LPD_SWDT_INT_ID in xparameters_ps.h of cortex r5 and for
219532bit, 64bit of cortex a53 and also removed SCUTIMER, SCUWDT
2196parameters as they are private timers for a9 only.
2197Fix for CR-962858.
2198Modified CortexA9 translation table to correct explanation for memory
2199attributes to fix CR#963345
2200
2201Removes DMAPS and PS7 definitions as they are supported
2202by Zynq, and modifies interrupt ID number for FPGA in
2203xparameters_ps.h of cortex r5 and for 32bit, 64bit of cortex a53.
2204Fix for CR-963258.
2205
2206openamp_v1_2:
2207sync with upstream (fix mem allocator, run as rpmsg master, flood ping)
2208
2209libmetal_v1_1:
2210sync with upstream (fix interrupt handling for more than one handler)
2211
2212openamp apps: echo_test, rpc_demo, mat_mul
2213sync with upstream demo apps
2214remove duplicated definitions
2215update linker script to have vector table and boot section together
2216
2217xilmfs_v2_2:
2218CR#962571: Update Makefile to fix the compilation issues due to incremental
2219build
2220
2221dprxss_v4_0:
2222CR#960371: Move DP159 files out of video_common to dprxss.
2223CR#964969: Added interrupt handler for HDCP authentication.
2224
2225video_common_v4_0:
2226CR#956975: Modified functions to return fixed point instead of floating point
2227CR#960371: Move DP159 files out of video_common to dprxss.
2228
2229xilpm_v2_0:
2230- Added missing API IDs to sync up with PMUFW
2231- Migrated to a new shutdown interface to support passing shutdown type and sub-type arguments
2232
2233zynqmp_pmufw:
2234- Fixed DDR self-refresh sequence to trigger RDIMM init and update drift settings
2235- Split MMIO regions for finer granularity in permissions
2236- Added GET_CHIPID API to query the silicon version register value
2237- Removed shutdown callbacks. Now shutdown requests are executed as they come in.
2238- Fixed build errors when DEBUG_MODE is disabled
2239- Error Management module is disabled by default and should be enabled by adding ENABLE_EM to build flags
2240- MISRA C related fixes have been applied
2241- Migrated to a new shutdown interface to support passing shutdown type and sub-type arguments
2242- Updated XPfw_UserStartUp function to enable broadcasting of inner shareable transaction, if
2243  any LPD/FPD peripheral is configured to use CCI.This change is required to support CCI enabled
2244  peripherals in linux.
2245
2246zynqmp_fsbl:
2247- PS PL isolation is now removed by calling psu_ps_pl_isolation_removal_data() from psu_init.c
2248instead of using fsbl local API XFsbl_PowerUpIsland(). psu_ps_pl_isolation_removal_data()
2249function also has AXI data width configurations which are required.
2250- Added support for initializing upper PS DDR (earlier only lower PS DDR was supported).
2251- Fixed GT mux configuration logic in FSBL for ZCU102, by making each lane individually configurable.
2252- For ZCU102, FSBL sets VADJ in the board specific configuration. Since, this needs to be done only
2253if design has PL DDR (to take PL DDR out of reset), this code is now included under the
2254corresponding conditional.
2255
2256axicdma_v4_3:
2257- Fixed compilation warnings
2258
2259canfd_v1_2:
2260- Fixed compilation warnings
2261
2262canps_v3_2:
2263- Fixed compilation warnings
2264
2265dmaps_v2_2:
2266- Fixed compilation warnings
2267
2268gpio_v4_3:
2269- Fixed compilation warnings
2270
2271hwicap_v10_2:
2272- Fixed compilation warnings
2273
2274iicps_v3_4:
2275- Fixed compilation warnings
2276
2277iomodule_v2_4:
2278- Fixed compilation warnings
2279
2280nandpsu_v1_1:
2281- Fixed compilation warnings
2282
2283qspispu_v1_3:
2284- GQSPI PollData/PollTimeout for dualparallel configurations
2285
2286tmrctr_v4_2:
2287- Used UINTPTR instead of u32 for Baseaddress
2288
2289- Changed the prototype of XTmrCtr_CfgInitialize API
2290
2291- Fixed wrong canonical defines for axi_timer
2292
2293uartps_v3_3:
2294- Fixed compilation warnings
2295
2296usbpsu_v1_1:
2297- Added USB 3.0/2.0 backward capability
2298
2299Change Log for 2016.3
2300=================================
2301freertos823_xilinx_v1_2:
2302Created new version to support event trace through Coresight STM
2303Updated tcl files as per modified standalone BSP structure.
2304
2305lwip141_v1_6:
2306Add support for freertos in the emaclite adapter. Fix for CR#957572.
2307Expose NO_SYS_NO_TIMERS and LWIP_TCP_KEEPALIVE as options
2308
2309emaclite_v4_3:
2310Fix compilation warning.
2311
2312axidma_v9_3:
2313Reduce the size of the buffer descriptor to 64 bytes
2314
2315axicdma_v4_2:
2316Fix compilation warining in the 64-bit platforms.
2317
2318axipmon
2319
2320axivdma_v6_2:
2321Fix compilation warining in the 64-bit platforms.
2322
2323axis_switch_v1_1:
2324Used UINTPTR type for BaseAddress
2325
2326coresightps_dcc_v1_1:
2327Created a new version of the driver to ensure that for MB based systems the driver
2328is not included. This fixes the CR#953056.
2329
2330cpu_cortexa53_v1_2:
2331Added new parameter for A53 execution mode
2332
2333ddrcpsu_v1_1:
2334Export ddr freq value to xparameters.h file.
2335
2336dmaps_v2_2:
2337Removed definition of "INLINE" macro from xdmaps.c to avoid
2338re-definition of the same, since "INLINE" macro is defined
2339in xil_io.h.
2340
2341v_hdmirxss_v3_0:
2342update SI5324 driver to support fast-switching mode
2343Improve HDCP 1.4 authentication
2344
2345v_hdmitxss_v3_0:
2346update SI5324 driver to support fast-switching mode
2347Update function call sequence in XV_HdmiTxSs_StreamUpCallback
2348
2349v_hdmirx_v1_2:
2350squash unused variable compiler warning
2351Resolve wrong image size issue when HTotal=0
2352
2353v_hdmitx_v1_2:
2354Added API to set AXI4-Lite clock frequency
2355squash unused variable compiler warning
2356
2357v_hdmirxss_v3_0:
2358Combine multiple report API into one ReportInfo
2359Clean up warnings
2360Add Event Log
2361
2362v_hdmitxss_v3_0:
2363Add Config to get AXI4-Lite clock frequency from HW and set hdmi tx core
2364Added Event Log
2365Combine Report function into one ReportInfo
2366squash unused variable compiler warning
2367Update XV_HdmiTxSs_SetAudioChannels
2368
2369v_hdmirx_v1_2:
2370Up version to 1.2 with the following updates:
2371Update Address data type to support ZynqMP
2372Update HDCP support
2373
2374v_hdmitx_v1_2:
2375Up version to 1.2 with the following updates:
2376Remove checking VideoMode
2377Update Address data type to support ZynqMP
2378
2379v_hdmirxss_v3_0:
2380Up version to 3.0 with the following updates:
2381Add HDCP repeater support
2382Add HDCP 1.4 & 2.2 auto switching support
2383Add Import Example Design support
2384Update to optimize out HDCP when excluded
2385
2386v_hdmirxss_v3_2:
2387Fix to prevent HDCP protocol switching when only one protocol is in the design
2388
2389v_hdmitxss_v3_0:
2390Up version to 3.0 with the following updates:
2391Add HDCP repeater support
2392Add HDCP 1.4 & 2.2 auto switching support
2393Add Import Example Design support
2394Update Address data type to support ZynqMP
2395Remove checking VideoMode
2396Update to optimize out HDCP when excluded
2397
2398
2399dptx_v3_0:
2400Obsoleted in lieu of the dp driver.
2401
2402dp_v5_1:
2403Updated version from 5.0 to 5.1.
2404Updated to access timing table from video_common using APIs.
2405Use consolidated usleep rather than deprecated MB_Sleep.
2406Updated self-test to reflect IP updates.
2407Update to use new video_common v3.1.
2408RX to support maximum pre-emphasis level of 1.
2409
2410dprxss_v3_1:
2411Updated version from 3.0 to 3.1.
2412Synchronize with new HDCP API modifications.
2413Added HDCP timeout functionality.
2414Update to use new video_common v3.1.
2415
2416dptxss_v4_1:
2417Updated version from 4.0 to 4.1.
2418Synchronize with new HDCP API modifications.
2419Reordered VTC enable and DPTX core enable.
2420Update to use new video_common v3.1.
2421Fix for native video mode compilation.
2422
2423gpio_v4_2:
2424Used UINTPTR type for BaseAddress
2425
2426iicps_v3_3:
2427Modified code for MISRA-C:2012 Compliance
2428
2429ipipsu_v2_1:
2430Modified code for MISRA-C:2012 Compliance
2431
2432sysmonpsu_v1_1:
2433Modified driver code for MISRA-C:2012 Compliance
2434Added SEQ_CH2_REG and SEQ_AVG2_REG, SEQ_INPUT2, SEQ_ACQ2
2435and CFG3_REG configurations
2436
2437emacps_v3_3:
2438Fixed IEEE1588 example issue for Zynq (CR#951152
2439
2440qspipsu_v1_2:
2441Add LQSPI support
2442Added Tap delay support.
2443Added PollData and PollTimeout Support
2444Update PollData and PollTimeout for dualparallel configurations
2445
2446v_mix_v2_0:
2447Add support for logo layer per pixel alpha feature
2448
2449scugic_v3_4:
2450Updated tcl to return correct PL ips' interruptIDs when no interrupt is connected to pl_ps_irq0 to fix CR#953335
2451Made changes in xscugic.c. Created a new static function DoDistributorInit to simplify the flow and avoid code duplication.
2452Changes are made for USE_AMP use case for R5. In a scenario (in R5 split mode) when one R5 is operating with A53 in open amp config
2453and other R5 is running baremetal application, the existing code had the potential to stop AMP to work (if for some reason
2454the R5 running the baremetal app tasked to initialize the Distributor hangs or crashes before initializing the Distributor).
2455Changes are made so that the R5 under AMP first checks if the distributor is enabled or not and if not, it does the standard Distributor initialization.
2456This fixes the CR#952962.
2457
2458standalone_v6_0:
2459Make Xil_AsserWait a global variable
2460Updated cortexr5/mpu.c to move the code related to Init_MPU to .boot section since it is part of boot process to fix CR#949555
2461Program the counter frequency in boot code for CortexA53
2462Update get_pins command in the standalone bsp tcl as per 2016.3 hsi
2463Updated the sleep_common function in microblaze_sleep.c. Fix for CR#954191.
2464Restructured the BSP to avoid code duplication across all BSPs.Source code directories specific to ARM processor's are
2465moved to src/arm directory(i.e. src/cortexa53,src/cortexa9 and src/cortexr5 moved to src/arm/cortexa53,src/arm/cortexa9
2466and src/arm/cortexr5 respectively).Files xil_printf.c,xil_printf.h,print.c,xil_io.c and xil_io.h are consolidated across all
2467BSPs into common file each and consolidated files are kept at src/common directory.Files putnum.c,vectors.c,vectors.h,
2468xil_exception.c and xil_exception.h are consolidated across all ARM BSPs into common file each and consolidated
2469files are kept at src/arm/common directory.GCC files related to file operations are consolidated and kept at src/arm/common/gcc
2470directory.
2471All io interfacing functions (i.e. All variants of xil_out, xil_in ) are made as static inline and implementation
2472is kept in consolidated common/xil_io.h,xil_io.h must be included as a header file to access io interfacing functions.
2473Added undefined exception handler for A53 32 bit and R5 processor.
2474Updated xtime_l.c in R5 BSP to remove implementation of XTime_SetTime API, since TTC counter value register is read only.
2475Updated the signature for functions sleep/usleep. This fixes the CR#956899.
2476Added PSS_PSU_REF_CLK macro to xparameters.h for ZynqMP A53 and R5.
2477Removed unused variables from xil_printf.c and xplatform_info.c
2478Defined ARMA53_32 flag in cortexa53/32bit/xparameters_ps.h.
2479Defined ARMR5 flag in cortexr5/xparameters_ps.h.
2480Added support for zynq 7000s devices
2481Modified xil_io.h to remove __LITTLE_ENDIAN__ flag check for all ARM processors.
2482
2483sdps_v3_0:
2484Added support for mkfs.
2485Updated the copyright year to 2016.
2486Used usleep API instead of MB_Sleep API.
2487Added BUS_WIDTH, BUS_WIDTH, MIO_Bank and HAS_EMIO parameters.
2488Added support for UHS modes.
2489Corrected the logic.
2490Added tap delays for SD/eMMC.
2491Removed sleep.h file from xsdps.h file
2492
2493uartps_v3_2:
2494Modified the transmission break bit set logic.
2495
2496v_axi4s_remap:
2497Used UINTPTR type for BaseAddress
2498
2499v_csc_v2_1:
2500Used UINTPTR type for BaseAddress
2501
2502v_deinterlacer_v6_1:
2503Used UINTPTR type for BaseAddress
2504
2505v_hcresampler_v3_0:
2506Used UINTPTR type for BaseAddress
2507Added passthrough mode support
2508Removed layer1 API's for coefficient peek/poke
2509
2510v_vcresampler_v3_0:
2511Used UINTPTR type for BaseAddress
2512Added passthrough mode support
2513Removed layer1 API's for coefficient peek/poke
2514
2515v_hscaler_v3_0:
2516Used UINTPTR type for BaseAddress
2517Added optional color format conversion handling
2518
2519v_vscaler_v3_0:
2520Used UINTPTR type for BaseAddress
2521Added optional color format conversion handling
2522
2523v_letterbox_v2_1:
2524Used UINTPTR type for BaseAddress
2525
2526v_mix_v2_0:
2527Used UINTPTR type for BaseAddress
2528Added per pixel alpha support to logo layer
2529
2530v_procss_v2_1:
2531Used UINTPTR type for BaseAddress
2532Added optional color format conversion hadnling in scale-only topology
2533Added support to maintain user defined PIP background color after pipe reset
2534Replace deprecated MB_Sleep with usleep
2535
2536video_common_v3_1:
2537Updated version from 3.0 to 3.1.
2538Reordered wait for PLL lock.
2539
2540vtc_v7_2:
2541Added compilation protection in case driver is included without instantiation.
2542Used UINTPTR type for BaseAddress
2543
2544xilffs_v3_4:
2545Added support for mkfs.
2546Added support for multi partitions.
2547Added support for multiple logical drives.
2548Updated the copyright year to 2016.
2549Corrected the data type of temp variable.
2550Enable the _WORD_ACCESS option.
2551Used usleep API instead of MB_Sleep API.
2552Included sleep.h in diskio.c file
2553
2554xilisf_v5_7:
2555Added support for SubSector erase.
2556Updated subsector erase function for Atmel/Winbond
2557
2558xilkernel_v6_4:
2559Fixed CR:955364 update get_pins command as per 2016.3 hsi changes are made in
2560the bsp tcl file.
2561Updated the DEPENDS in mld, tcl and makefile to standalone_v6_0 from standalone.
2562
2563xilskey_v6_0:
2564Added margin 2 read checks for Zynq eFUSE PS and PL.
2565Ultrscale eFUSE programming is handled using hardware
2566module, Hardware module is controlled through GPIO pins,
2567Modified Ultrascale eFUSE example and input.h files to
2568accept GPIO pin numbers from user, Corrected sysmon
2569temperature read to 16-bit resolution.
2570Fixed CR #954260 to correct the sequence of Zynq eFUSE programming
2571Modified ZynqMP PS eFUSE's single USER key programming to
2572separate 32 bit User keys. Provided single bit programming
2573for User Key.
2574For Ultrascale: Added 128 bit user key programming.
2575Provided single bit programming for User keys 32 and
2576128 bit User keys. Added error codes on failures.
2577BBRAM is updated to have DPA protection, and
2578count configuration.
2579
2580xilmfs_v2_1:
2581CR#958938: Update freertos OS name in xilmfs.mld as per latest freertos port.
2582
2583libmetal_v1_0:
2584Add libmetal open-source project to support OpenAMP
2585
2586libmetal_echo_demo_v1_0:
2587Add an echo demo to show the communication between baremetal
2588and Linux application with libmetal APIs
2589
2590openamp_v1.1:
2591Use libmetal to abstract OS services.
2592Automatically set extra compiler flags -DUNDEFINE_FILE_OPS
2593based on WITH_PROXY parameter setting in the GUI.
2594
2595openamp_rpc_demo:
2596openamp_matrix_multiply_demo:
2597openamp_echo_test:
2598Apps changed to use vector table in TCM
2599Initialization changed for libmetal support.
2600Added some debug print with xil_printf.
2601
2602freertos_lwip_echo_server:
2603Fix echo thread stack size. CR#958898.
2604
2605zynqmp_pmufw:
2606
2607- The IPI Framework is now fully integrated with IPI Driver.
2608So PMUFW now works only with a HDF generated from 2016.3 release
2609and uses the IPI configuration as specified in HDF.
2610
2611- FPD power-off suspend is now supported with DDR in self-refresh mode.
2612The sequences required for transitioning DDR into and out of Self-Refresh
2613are included in this release.
2614
2615- Clocks dependencies are modelled and PLLs usage is accounted. This enables
2616suspending of unused PLLs.
2617
2618- PMUFW syncs up with FSBL to initialize the clock/PLL related data structures.
2619IPI or a Register Poll is used as a sync mechanism depending on the order in
2620which FSBL and PMUFW are loaded. A corresponding change in FSBL is also in
2621this release, which means the sync mechanism is taken care seamlessly in the flow.
2622
2623- Linker script has fixes to account for the exact size of PMU RAM available for
2624Firmware, which is 125.7 KB. By default PMUFW is built with -O0 optimization.
2625In case of insufficient memory due to addition of custom code, optimization
2626can be changed to -Os.
2627
2628- PMUFW uses XilFPGA library and it is included by default in the build.
2629APIs to load bitstream into PL have been added.
2630
2631- TCMs are initialized to prevent ECC errors during a power cycle and all
2632dependencies to make TCMs accessible are handled.
2633
2634- FPD power up/down routines are made available as hooks which can be used to
2635override default handlers.
2636
2637- Power operations (using PM module) on unavailable islands have been blocked and
2638return an error.
2639
2640- Each module now resides in its own file with xpfw_mod_ prefix. All modules
2641should follow the same prefix to differentiate from core files and
2642segregate functionality.
2643
2644zynqmp_fsbl:
2645- Avoided multiple IPI triggers during PMUFW load. FSBL now triggers IPI for just the first partition of PMUFW. FSBL wakes up PMU after loading all partitions.
2646- Added compile time check to ensure FSBL (A53_64) is built only with EL3 BSP.
2647- Added support for SHA3 checksum validation by FSBL for partitions that it loads.
2648- FSBL identifies device type and restricts handoff to unavailable CPU cores accordingly.
2649- To optimize usage of OCM, reduced stack usage of exception handlers (R5) and removed stacks for EL0/1/2.
2650- Changed the ECC Initialization code to use ADMA for DMA transfers. Earlier, GDMA was used, which cannot be accessed when FPD is powered down.
2651- FSBL now calls protection/security configuration functions defined by psu_init. This is used for XMPU/XPPU configuration, if any, as per design.
2652- Changed FSBL error code storage register to PMU_GLOBAL_PERS_GLOB_GEN_STORAGE4 (0xFFD80040).
2653- Added XFsbl_PmInit call to notify PMU firmware that initialization of all PM related registers is complete.
2654- Corrected print format for Performance measurement value (fractional part).
2655- Authentication Certificate for the partition will now be copied separately to an OCM buffer (not to memory area where partition is to be loaded).
2656- Changed the FSBL memory layout to have more space for ATF in OCM. FSBL now starts at 0xFFFC0000 and ends at 0xFFFEA000.
2657- Added support for TCM ECC Initialization in FSBL (always in R5 and conditionally in A53).
2658- Added a hook in FSBL to facilitate users to define different variants of psu_init() functions based on different configurations in Vivado.
2659- Remove inline specifier from function prototypes (as per new version of GCC).
2660- Corrected (feature include/exclude) logic to resolve DDRless build failure.
2661- Change done to calculate the actual read offset including bad blocks while reading from NAND. This read offset will be calculated against each read call from FSBL.
2662- Disabled the use_mkfs option in FSBL.
2663
2664zynq_fsbl:
2665- Fabric Initialization sequence is modified to check the PL power before sequence starts and checking INIT_B reset status twice in case of failure.
2666
2667
2668Change Log for 2016.2
2669=================================
2670axidma_v9_2:
2671Fixed compilation warnings in the driver and examples
2672
2673axiethernet_v5_2:
2674Fixed compilation errors for a specific axi ethernet design
2675
2676csudma_v1_1:
2677Fixed race condition in the recv path when source and destination
2678points to the same buffer
2679
2680ddrcpsu:
2681Added initial version of DDRC driver
2682
2683dp_v5_0:
2684Updated version from 4.0 to 5.0.
2685Added additional color encoding support.
2686
2687dptxss_v4_0:
2688Updated version from 3.0 to 4.0.
2689Expose API to set (a)synchronous clock mode.
2690
2691iicps_v3_2:
2692Added workaround for repeated start issue on zynq.
2693
2694scugic_v3_3:
2695Modified XScuGic_InterruptMaptoCpu to write proper value to interrupt target register to fix CR#951848.
2696
2697sdps_v2_8:
2698Added new workaround for auto tuning.
2699Changed the Sleep time in Microblaze.
2700Modified the standard speed of SD to 19MHz.
2701
2702sysmon_v7_3:
2703Updated interrupt example to support ZynqMP
2704sysmon: Corrected conversion formulae
2705sysmon: Corrected interrupt ID of ZynqMP
2706
2707qspipsu_v1_1:
2708qspipsu: Added debug message prints.
2709
2710usb_v5_2:
2711Updated the driver to support 64-bit DMA addressing
2712
2713v_hdmirx_v1_1:
2714Updated VTD control in HDMI RX core driver
2715
2716v_hdmirxss_v2_0:
2717Added DDC peripheral HDCP mode selection to XV_HdmiRxSs_HdcpEnable
2718
2719v_hdmirx_v1_1:
2720Add DDC mode selection for HDCP 1.4 and HDCP 2.2
2721
2722v_hdmitxss_v2_0:
2723
27241. Files changed: xv_hdmirxss.c, xv_hdmirxss_coreinit.c, xv_hdmitxss.c, xv_hdmitxss_coreinit.c
27252. VTC driver has been updated to avoid processor exceptions. Workarounds have been removed.
27263. HDCP 1.x driver now uses AXI timer 4.1, so updated to use AXI Timer config structure to determine timer clock frequency
27274. HDCP 1.x driver has fixed the problem where the reset for the receiver causes the entire DDC peripheral to get reset. Based on this change the driver has been updated to use XV_HdmiTxSs_HdcpReset and XV_HdmiRxSs_HdcpReset functions directly.
27285. Updated XV_HdmiTxSs_HdcpEnable and XV_HdmiRxSs_HdcpEnable functions to ensure that HDCP 1.4 and 2.2 are mutually exclusive. This fixes the problem where HDCP 1.4 and 2.2 state machines are running simultaneously.
2729
2730video_common_v3_0:
2731Updated version from 2.2 to 3.0. All video drivers have been updated to use 3.0.
2732Added API to search on reduced blanking video modes.
2733Updated DP159 to poll I2C bus busy prior to initiation of reads and writes.
2734Added Y-only color format.
2735
2736xilpm_v2:
2737XPm_ClientSuspendFinalize API for RPU now disables lock-step fault log before going to wfi. This ensures that false lock-step errors are not triggered during a power-cycle.
2738Example now uses XPm_ClientSuspendFinalize API instead of a direct wfi
2739call
2740
2741xilfpga_v1_0:
2742Added supported_peripheral field in mld for xilfpga library.
2743It supports only for ZynqMp.
2744
2745xilffs_v3_3:
2746Added one second delay before CD pin check.
2747Corrected the if condition logic.
2748
2749xilisf_v5_6:
2750Added support for MT25QU02G part.
2751Corrected the missing WE before erase.
2752
2753zynqmp_fsbl:
2754Added support for DDR ECC Initialization Fixed the bug causing PMUMB
2755wakeup right after loading of first PMUFW partition in boot images with only FSBL and PMUFW present. Now it is being done after all partitions of PMUFW are loaded.
2756ATF handoff parameter addresses are now being stored in PMU_GLOBAL.
2757Printing address in case of address error.
2758Bypassed debouncing logic for SD card so that SD controller doesn't wait for long durations for card to be stable.
2759Removed enabling of debug logic for R5 lock-step mode.
2760
2761zynq_fsbl:
2762Added symbols to linker script to prevent linking failures in absence of spec file.
2763
2764zynqmp_pmufw
2765Fixed context saving/reset issue when powering down FPD IPI calls are
2766always acknowledged in case of invalid payload RPU, PS-Only and PL
2767resets have been added to pm_reset API Fixes related to compiler
2768warnings and uninitialized variables mmio_write API has been fixed to
2769use the mask argument correctly
2770
2771
2772Change Log for 2016.1
2773=================================
2774Removed the following versions from the 2016.1 build:
2775axicdma_v2_03_a, axidma_v7_02_a, axidma_v8_0, axiethernet_v3_02_a, axiethernet_v4_0,
2776axiethernet_v4_1, axiethernet_v4_2, axiethernet_v4_3, axipcie_v2_03_a, axipcie_v2_04_a,
2777axipmon_v4_00_a, axipmon_v5_00_a, axivdma_v4_05_a, axivdma_v4_06_a, bram_v3_02_a, bram_v3_03_a,
2778canps_v1_01_a, canps_v1_02_a, canps_v2_0, ccm_v4_00_a, ccm_v5_0, cfa_v5_00_a, cfa_v6_0,
2779cpu_cortexa9_v1_01_a, cpu_cortexa9_v2_0, cpu_v1_15_a, cresample_v2_00_a, cresample_v3_0,
2780deinterlacer_v2_00_a, deinterlacer_v3_0, deinterlacer_v3_1, devcfg_v2_03_a, devcfg_v2_04_a,
2781devcfg_v3_0, devcfg_v3_1, devcfg_v3_2, dmaps_v1_05_a, dmaps_v1_06_a, dmaps_v1_07_a, dmaps_v2_0,
2782dptx_v1_0, dptx_v2_0, emaclite_v3_04_a, emacps_v1_04_a, emacps_v1_05_a, emacps_v1_06_a,
2783emacps_v2_0, emacps_v2_1, emc_v3_01_a, enhance_v5_00_a, enhance_v6_0, gamma_v5_01_a, gpio_v3_01_a,
2784gpiops_v1_01_a, gpiops_v1_02_a, gpiops_v2_0, gpiops_v2_1, hwicap_v8_01_a, ic_v3_00_a, iic_v2_07_a,
2785iic_v2_08_a, iicps_v1_03_a, iicps_v1_04_a, iicps_v2_0, iicps_v2_1, iicps_v2_2, intc_v2_06_a,
2786intc_v2_07_a, intc_v3_0, intc_v3_1, intc_v3_2, iomodule_v1_04_a, iomodule_v2_0, llfifo_v2_03_a,
2787llfifo_v3_00_a, manr_v3_00_a, mbox_v3_04_a, mig_7series_v1_00_a, mutex_v3_02_a, nandps_v1_04_a,
2788nandps_v2_0, nandps_v2_1, noise_v4_00_a, os_v3_00_a, osd_v2_00_a, osd_v3_0, qspips_v2_02_a,
2789qspips_v2_03_a, qspips_v3_0, qspips_v3_1, rgb2ycrcb_v5_01_a, rgb2ycrcb_v6_0, scaler_v4_03_a,
2790scaler_v5_00_a, scaler_v6_0, scugic_v1_04_a, scugic_v1_05_a, scugic_v1_06_a, scugic_v2_0,
2791scutimer_v1_02_a, scuwdt_v1_02_a, sdps_v1_00_a, sdps_v2_0, sdps_v2_1, sdps_v2_2, spi_v3_05_a,
2792spi_v3_06_a, spi_v3_07_a, spips_v1_05_a, spips_v1_06_a, stats_v4_00_a, sysmon_v5_03_a, sysmon_v6_0,
2793tft_v4_00_a, tft_v4_01_a, tft_v5_0, tmrctr_v2_05_a, tpg_v1_00_a, tpg_v2_0, trafgen_v1_00_a,
2794trafgen_v2_00_a, trafgen_v2_01_a, trafgen_v3_0, trafgen_v3_1, ttcps_v1_01_a, ttcps_v2_0,
2795uartlite_v2_01_a, uartns550_v2_01_a, uartns550_v2_02_a, uartns550_v3_0, uartns550_v3_1,
2796usb_v4_03_a, usb_v4_04_a, usbps_v1_04_a, usbps_v1_05_a, usbps_v1_06_a, usbps_v2_0, usbps_v2_1,
2797vtc_v4_00_a, vtc_v5_00_a, vtc_v6_0, wdtps_v1_02_a, wdttb_v2_00_a, xadcps_v1_01_a, xadcps_v1_02_a,
2798xadcps_v1_03_a, ycrcb2rgb_v5_01_a, standalone_v3_10_a, standalone_v3_11_a, standalone_v3_12_a,
2799standalone_v4_0, standalone_v4_1, xilkernel_v5_01_a, xilkernel_v5_02_a, xilkernel_v6_0, xilkernel_v6_1,
2800xilisf_v3_02_a, xilisf_v4_0, xilskey_v1_00_a, xilmfs_v1_00_a, lwip140_v1_05_a, lwip140_v1_06_a,
2801lwip140_v2_0, lwip140_v2_1, lwip140_v2_2
2802
2803axicdma_v4_1:
2804Updated examples with MIG DDR3 defines
2805Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
2806
2807axidma_v9_1:
2808Updated examples with MIG DDR3 defines
2809Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
2810Minor changes in the driver and examples for removing warnings.
2811
2812axiethernet_v5_1:
2813Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
2814Changed the prototype of XAxiEthernet_CfgInitialize API.
2815Fix compilation errors in case of zynqmp to fix CR#933825.
2816Updated the tcl to removed delete filename statement to fix CR# 784758.
2817
2818axipcie_v3_0:
2819Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
2820Changed the prototype of XAxiPcie_CfgInitialize API.
2821
2822axipmon_v6_4:
2823Added interrupt example support for ZynqMP.
2824Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
2825
2826axivdma_v6_1:
2827Updated examples with MIG DDR3 defines.
2828Fix example compilation issue on zynqmp.
2829Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
2830Changed the prototype of XAxiVdma_CfgInitialize API.
2831
2832bram_v4_1:
2833Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
2834Changed the prototype of XBram_CfgInitialize API.
2835Updated the tcl to removed delete filename statement to fix CR# 784758.
2836
2837can_v2_00_a:
2838Removed from the build.
2839Fixed the CR#911958 (RecvFrame not working with data length less than 8bytes and greater than 4 bytes).
2840
2841canfd_v1_1:
2842Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
2843Changed the prototype of XCanFd_CfgInitialize API.
2844
2845canps_v3_1:
2846Fixed CR#911958 to add support for Tx Watermark example.
2847Data mismatch while sending data less than 8 bytes.
2848Updated XCanPs_IntrHandler in xcanps_intr.c to handle error interrupts correctly for CR#925615
2849Fixed missing error interrupts, during can compliance test.
2850Modified tapp tcl to support microblaze.
2851Modified xcanps_intr_example to support intc interrupt controller.
2852
2853Changed file name ccm.h to xccm.h.
2854Moved register offsets and bit definitions to xccm_hw.h file.
2855Added enums.
2856Added range macros.
2857Added the structure type definitions XCcm_Config and XCcm.
2858Removed the functional macros.
2859Added the following macros:
2860XCcm_Enable, XCcm_Disable,XCcm_RegUpdateEnable, XCcm_SyncReset, XCcm_Reset, XCcm_IntrGetPending,
2861XCcm_IntrEnable, XCcm_IntrDisable, XCcm_StatusGetPending, XCcm_IntrClear, XCcm_Start, XCcm_Stop.
2862Added the register offsets and bit masks for the registers.
2863Added backward compatibility macros.
2864Changed filename ccm to xccm.c.
2865Implemented the following functions:
2866XCcm_CfgInitialize, XCcm_Setup, XCcm_GetVersion, XCcm_EnableDbgByPass, XCcm_IsDbgByPassEnabled,
2867XCcm_DisableDbgByPass, XCcm_EnableDbgTestPattern, XCcm_IsDbgTestPatternEnabled,
2868XCcm_DisableDbgTestPattern, XCcm_GetDbgFrameCount, XCcm_GetDbgLineCount, XCcm_GetDbgPixelCount,
2869XCcm_SetActiveSize, XCcm_GetActiveSize, XCcm_SetCoefMatrix, XCcm_GetCoefMatrix, XCcm_SetRgbOffset,
2870XCcm_GetRgbOffset,XCcm_SetClip, XCcm_GetClip, XCcm_SetClamp XCcm_GetClamp XCcm_FloatToFixedConv,
2871and XCcm_FixedToFloatConv.
2872Implemented XCcm_SelfTest function.
2873Implemented XCcm_LookupConfig function.
2874Implemented the functions: XCcm_IntrHandler, XCcm_SetCallBack.
2875
2876cpu_cortexa9_v2_2:
2877Modified cpu_cortexa9 driver mdd file to change compiler to arm-none-eabi-gcc (Linaro)
2878and archiver to arm-none-eabi-ar (Linaro). Modified the extra_compiler_flags to
2879"-mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard -nostartfiles". Linaro toolchain supports hard-float.
2880Modified cpu_cortexa9 driver tcl to properly update for the extra compiler flag for different
2881compilers (Linaro GCC, armcc, IARCC).
2882Added --cpu=Cortex-A9 flag to compiler flag for iccarm to fix CR#938718
2883Modified the tcl to take only the toolchain name when a complete path is passed. This fixes CR#939108.
2884Made changes in the tcl to have separate cases for code sourcery and armcc toolchains.
2885
2886cpu_cortexa53_v1_1:
2887Modified the cpu_cortexa53 tcl to add the extra compiler flag ARMA53_32 for A53 32bit BSP
2888Added timestamp clock frequency to xparamters.h by adding C_TIMESTAMP_CLK_FREQ to cpu driver tcl
2889
2890cpu_v2_4:
2891Updated generate and post_generate procs, not to generate cpu macros, when microblaze is
2892connected as one of the streaming slaves to itself. This is for CR#876604.
2893
2894csi_v1_0:
2895Added the initial version of MIPI CSI2 RX Controller driver.
2896Add Word Count Corruption interrupt feature
2897
2898devcfg_v3_4:
2899Fix for CR#784758. Changes in driver tcl to delete filename statement.
2900
2901dp_v4_0
2902Made changes in mdd file to change OPTION DEPENDS to video_common_v2_2.
2903Added APIs:
2904- XDp_IsLinkRateValid
2905- XDp_IsLaneCountValid
2906- XDp_RxGetBpc
2907- XDp_RxGetColorComponent
2908- XDp_RxSetLineReset
2909- XDp_RxAllocatePayloadStream
2910XDp_RxAllocatePayloadStream is to be called from within RX allocate payload ISR.
2911API changed: XDp_TxAllocatePayloadVcIdTable now takes an additional arg StartTs.
2912Removed soft reset when enabling RX DTG.
2913
2914dphy_v1_0:
2915Added the initial version of MIPI DPHY Controller driver.
2916Added support for HS_SETTLE register
2917
2918dprxss_v3_0:
2919Added support for multiple subsystems in a design.
2920Added handlers as enum for HDCP callback registration.
2921Added function: XDpRxSs_DownstreamReady
2922
2923dptxss_v3_0:
2924Added support for multiple subsystems in a design.
2925Added handlers as enum for HDCP callback registration.
2926Added function: XDpTxSs_ReadDownstream, XDpTxSs_HandleTimeout
2927
2928dsitxss_v1_0:
2929Initial version of MIPI DSI TX Subsystem Driver
2930
2931dsi_v1_0:
2932Initial version for DSI Controller Driver
2933
2934emaclite_v4_2:
2935Used UINTPTR instead of u32 for Baseaddress to fix CR#867425.
2936Changed the prototype of XEmacLite_CfgInitialize API.
2937Fix compilation errors due to conflicting data types (CR#917930).
2938Updated interrupt example to support Zynq and ZynqMP (CR#938244).
2939
2940emacps_v3_2:
2941Change BD typedef and number of words
2942Modified xemacps_example_intr_dma and tapp tcl to support test
2943app interrupt example for microblaze.
2944Added option to enable SGMII.
2945Removed emacps from peripheral tests for Zynq Ultracale MPSoC
2946Replaced counter based timeout with sleep routine in xemacps_example_intr_dma
2947
2948gpio_v4_1:
2949Updated to use cannonical xparameters in examples and clean up of the comments,
2950removed support for DCR bridge and removed xgpio_intr_example for CR 900381.
2951Used UINTPTR type for BaseAddress.
2952
2953hdcp1x_v4_0:
2954Updated the tmrctr being refered to in the hdcp1x.mdd file to tmrctr_v4_1.
2955Updated the drivers to use an individual timer with each hdcp interface.
2956Updated the drivers to support repeater fucntionality for HDMI.
2957Added following fucntions:
2958  XHdcp1x_RxSetRepeaterBcaps, XHdcp1x_RxIsInComputations,
2959  XHdcp1x_TxIsInComputations, XHdcp1x_RxIsInWaitforready,
2960  XHdcp1x_TxIsInWaitforready, XHdcp1x_RxHandleTimeout,
2961  XHdcp1x_RxStartTimer, XHdcp1x_RxStopTimer,
2962  XHdcp1x_RxBusyDelay, XHdcp1x_RxSetTopologyUpdate,
2963  XHdcp1x_RxSetTopology, XHdcp1x_TxGetTopology,
2964  XHdcp1x_RxSetTopologyKSVList, XHdcp1x_TxGetTopologyKSVList,
2965  XHdcp1x_RxSetTopologyDepth, XHdcp1x_TxGetTopologyDepth,
2966  XHdcp1x_RxSetTopologyDeviceCnt, XHdcp1x_TxGetTopologyDeviceCnt,
2967  XHdcp1x_RxSetTopologyMaxCascadeExceeded, XHdcp1x_TxGetTopologyMaxCascadeExceeded,
2968  XHdcp1x_RxSetTopologyMaxDevsExceeded, XHdcp1x_TxGetTopologyMaxDevsExceeded,
2969  XHdcp1x_RxCheckEncryptionChange, XHdcp1x_TxIsDownstrmCapable,
2970  XHdcp1x_TxIsRepeater, XHdcp1x_TxEnableBlank,
2971  XHdcp1x_TxDisableBlank, XHdcp1x_TxGetTopologyBKSV
2972
2973hdcp1x_v3_0:
2974Updated the drivers to support HDCP Repeater functionality.
2975Added following functions:
2976  XHdcp1x_DownstreamReady, XHdcp1x_GetRepeaterInfo,
2977  XHdcp1x_SetCallBack, XHdcp1x_ReadDownstream.
2978  XHdcp1x_TxReadDownstream, XHdcp1x_TxSetCallBack,
2979  XHdcp1x_TxTriggerDownstreamAuth.
2980  XHdcp1x_RxDownstreamReady, XHdcp1x_RxGetRepeaterInfo,
2981  XHdcp1x_RxDownstreamReadyCallback,
2982  XHdcp1x_RxSetCallBack.
2983Updated the hdcp drivers for HDMI support for HDCP 2.2.
2984Added the following functions:
2985  XHdcp1x_IsEnabled, XHdcp1x_ProcessAKsv,
2986  XHdcp1x_RxIsEnabled, XHdcp1x_RxIsInProgress
2987Assigned callback function in XHdcp1x_PortHdmiTxAdaptor to NULL.
2988Disabled hdcp call back in function XHdcp1x_PortHdmiRxEnable.
2989Added DDC write and read handlers.
2990Added callback type used for calling DDC read and write functions
2991Added enumeration XHdcp1x_HandlerType to identify callback functions.
2992Added a check in xhdcp1x_g.c file to check if HDCP is present.
2993Updated the hdcp1x.h file to add documentation and driver description.
2994Updated the hdcp1x.h file to add documentation for Repeater system.
2995Removed all references to HDMI DDC registers in the hdcp drivers.
2996
2997hdcp22_cipher_v1_0:
2998Added the initial version of Xilinx HDCP Cipher core driver.
2999Updated the driver for nested HIP support.
3000Added the GetVersion function.
3001
3002hdcp22_common_v1_0:
3003Added the initial version of Xilinx HDCP Cipher common driver.
3004Updated the driver for nested HIP support.
3005Updated to BigDigits v2.5
3006Removed floating point operations.
3007
3008hdcp22_common_v1_1:
3009Fixed warnings and errors for gcc and g++ compilers.
3010
3011hdcp22_common_v2_0:
3012Changed DIGIT_T type to u32 for 64-bit support
3013
3014hdcp22_mmult_v1_0:
3015Added the initial version of the driver that can be used to access the Xilinx HDCP22
3016Montogmery Multiplier(Mmult) core.
3017Updated the driver for nested HIP support.
3018Added default configuration file xhdcp22_cipher_g.c
3019
3020hdcp22_mmult_v1_1:
3021Added 64 bit address support.
3022
3023hdcp22_rng_v1_0:
3024Added the initial version of the driver that can be used to access the Xilinx HDCP22
3025Random Number Generator(RNG) core.
3026Updated the driver for nested HIP support.
3027
3028hdcp22_rng_v1_1:
3029Added 64 bit address support.
3030
3031hdcp22_rng_v1_2:
3032Fix for pointer word alignment.
3033
3034hdcp22_rx_v1_0:
3035Added the initial version of the Xilinx HDCP 2.2 Receiver driver.
3036Updated the driver for nested HIP support.
3037Updated LoadPrivateKey function to calculate Montgomery constants.
3038Fixes for HDCP 2.2 complaince testing
3039
3040hdcp22_rx_v2_0:
3041Added repeater upstream support.
3042Added 64 bit address support.
3043Fixes for warnings reductions.
3044
3045hdcp22_rx_v2_1:
3046Fixed warnings and errors for gcc and g++ compilers.
3047
3048hdcp22_rx_v2_2:
3049Updated for 64-bit support.
3050
3051hdcp22_tx_v1_0:
3052Added the initial version of the Xilinx HDCP 2.2 Tx core driver.
3053Updated the driver for nested HIP support.
3054Added authenticated callback function.
3055Fixes for HDCP 2.2 complaince testing
3056
3057hdcp22_tx_v2_0:
3058Add repeater downstream support.
3059Added 64 bit address support.
3060Fixes for warnings reductions.
3061Fixes for transmitter compliance.
3062
3063hdcp22_tx_v2_1:
3064Fixed pairing table update
3065Fixed warnings and errors for gcc and g++ compilers.
3066
3067hdcp22_tx_v2_3:
3068Updated for 64-bit ARM support.
3069Enhancement to perform HDCP2 Capable check for re-authentication attempts.
3070Enhancement to cipher enablement to avoid unessary AXI bus transactions.
3071Fix in XHdcp22Tx_WaitForReceiver to poll RxStatus based on fixed interval.
3072Fix in XHdcp22Tx_WaitForReceiver to wait for READY and non-zero Message_Size before reading message buffer.
3073Fix to check return status of DDC write/read when polling RxStatus register.
3074
3075hwicap_v10_1:
3076Updated driver, to read 7 Series FPGA frame data correctly.
3077Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3078Changed the prototype of XHwIcap_CfgInitialize API.
3079Removed xhwicap_clb_srinv.h, xhwicap_clb_ff.h, xhwicap_clb_lut.h files
3080Removed xhwicap_lut.c and xhwicap_ff.c examples
3081Removed defines XHI_FAR_MAJOR_FRAME_MASK, XHI_FAR_MINOR_FRAME_MASK,
3082XHI_FAR_MAJOR_FRAME_SHIFT, XHI_FAR_MINOR_FRAME_SHIFT, XHI_C0R_1.
3083Fix for CR#909615 to make the following changes:
3084Updated XHI_FAR_COLUMN_ADDR_MASK to 0x3FF
3085Updated XHI_FAR_BLOCK_SHIFT to 23
3086Updated XHI_FAR_TOP_BOTTOM_SHIFT to 22
3087Updated XHI_FAR_ROW_ADDR_SHIFT to 17
3088Updated XHI_NUM_FRAME_BYTES to 404
3089Updated XHI_NUM_FRAME_WORDS to 101
3090Updated XHI_NUM_WORDS_FRAME_INCL_NULL_FRAME to 202
3091
3092iic_v3_2:
3093Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3094Changed the prototype of XIic_CfgInitialize API.
3095In Low level driver in repeated start condition NACK for last byte is added.
3096Changes are done in XIic_Recv for CR# 862303
3097
3098
3099iicps_v3_1:
3100Updates example files xiicps_eeprom_intr_example.c, xiicps_eeprom_polled_example.c,
3101xiicps_slave_monitor_example.c.
3102Re-order the master_send and master_receive functions to handle the
3103interrupts properly.
3104
3105intc_v3_5:
3106Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3107
3108iomodule_v2_3:
3109Updated xdefine_canonical_xpars in iomodule.tcl to generate canonical definitions,
3110whose canonical name is not the same as hardware instance name.
3111
3112ipipsu_v2_0:
3113Created new major version.
3114Fix response buffer address calculation.
3115
3116llfifo_v5_1:
3117Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3118Changed the prototypes of XLlFifo_CfgInitialize, XLlFifo_Initialize APIs.
3119Fix Incorrect AXI4 Base address being exported to the xparameters.h file (CR#885653).
3120
3121mbox_v4_1:
3122Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3123Changed the prototypes of XMbox_CfgInitialize API.
3124The driver tcl is updated to remove delete filename statement to fix CR# 784758.
3125
3126mig_v1_0:
3127Added initial version of MIG driver for UltraScale DDR3.
3128This driver is created only to allow the SDK tools to create a memory test application
3129and to populate xparameters.h with memory range constants.
3130
3131mipicsiss_v1_0:
3132Added initial version of Xilinx MIPI CSI Rx Subsystem driver.
3133Add Word Count Corruption interrupt feature
3134
3135mutex_v4_1:
3136Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3137Changed the prototype of XMutex_CfgInitialize API.
3138
3139qspipsu_v3_3:
3140Modified the API prototypes according to MISRAC standards to remove compilation
3141warnings for fixing CR# 868893.
3142Made changes in xqspips_g128_flash_example.c to add support for Macronix 256Mb and 1Gb
3143flash parts.
3144
3145qspipsu_v1_0:
3146Added Support for Macronix 1Gb part.
3147
3148rtcpsu_v1_3:
3149Corrected calibration and fractional masks.
3150Once we write the RTC time it gets reflected in the current time register after 1sec delay,
3151so corrected the RTC read and write logic in the code for giving correct time.
3152
3153scugic_v3_2:
3154Modified xscugic_hw.h file to correct the interrupt target processor mask value for
3155cpu interface 2 i.e. XSCUGIC_SPI_CPU2_MASK
3156Modified DistributorInit function for CPU while executing in AMP
3157Modified tcl to support PL interrupts for ZynqMP Soc
3158Modified the DistributorInit in xscigic.c. The change ensures that for Zynq AMP case
3159the GIC distributor is left unchanged under the assumption that Linux master will
3160initialize it. The change fixes the CR#937243.
3161Modified scugic tcl to compute the interrupt ID instead of reading from interrupt pin
3162property for PL ips in get_psu_interrupt_id for zynqmpsoc to fix CR#940127
3163
3164sdps_v2_7:
3165Made changes to considered the slot type befoe checking CD/WP pins.
3166Added support for MMC cards.
3167Added workaround for issue in auto tuning mode of SDR50, SDR104 and HS200.
3168Corrected the Tuning logic in driver.
3169Removed Bus width check for eMMC.
3170Added Tap Delay configurations.
3171
3172spi_v4_2:
3173Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3174Changed the prototype of XSpi_CfgInitialize API.
3175Updated the tcl to remove delete filename statement (CR# 784758).
3176
3177spips_v3_0:
3178Made changes in XSpiPs_Abort and XSpiPs_ResetHw to read all RX_FIFO entries.
3179
3180srio_v1_1:
3181Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3182Changed the prototype of XSrio_CfgInitialize API.
3183
3184sysmon_v7_2:
3185Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3186Changed the prototype of XSysMon_CfgInitialize API.
3187Updated interrupt example to support Zynq and ZynqMP (CR#938326).
3188Fix for CR#910905. Remove incorrect use of configuration register 3
3189for 7 series.
3190Fixed compilation errors when sysmon is configured in Streaming mode (CR#940976)
3191
3192sysmonpsu_v1_0 :
3193Added new system monitor driver.
3194Correct the assert function call.
3195Modified interrupt examples.
3196Corrected valid list of Single and External Mux channels.
3197
3198tmrctr_v4_2:
3199Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3200Changed the prototype of XTmrCtr_CfgInitialize API.
3201Updated tcl, to generate correct device id for timer canonical define
3202
3203trafgen_v4_1:
3204Made changes in tcl to remove delete filename statement to fix CR# 784758.
3205
3206ttcps_v3_1:
3207Made changes in tcl to remove delete filename statement to fix CR# 784758.
3208Modified XTtcPs_CfgInitialize to add XTtcps_stop before configuring the TTC.
3209Removed invokation of XTtcps_stop from examples (before TTC configuration).
3210Modified ttcps_tapp.tcl to generate proper device and interrupt IDs for
3211peripheral test and exclude ttc3 for cortexr5 in peripheral test. Also
3212made changes to xttcps_tapp_example.c to add status check after SetupTicker
3213is called by TmrInterruptExample to fix CR#938908.
3214Modified cortexr5/xtime_l.c to avoid enabling overflow interrupt, instead
3215modified cortexr5/sleep.c and usleep.c to poll the counter value and compare
3216it with previous value to detect the overflow to fix CR#940209.
3217
3218uartlite_v3_2:
3219Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3220Changed the prototype of XUartLite_CfgInitialize API.
3221
3222uartns550_v3_4:
3223Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3224Changed the prototype of XUartNs550_CfgInitialize API.
3225
3226uartps_v3_1:
3227Modified code for latest RTL changes.
3228Added platform variable in driver instance structure.
3229Modified uartps_tapp.tcl to support microblaze.
3230Modified xuartps_intr_example to support intc interrupt controller.
3231Fix compilation errors in peripheral test for no interrupt uartps designs.
3232
3233usb_v5_1:
3234Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3235Changed the prototype of XUsb_CfgInitialize API.
3236
3237usbps_v2_2:
3238Fix for CR#873974 (Zynq PS7 USB - Update Driver to Invalidate Caches After Buffer Receive
3239in Endpoint Buffer Handler Code).
3240Fix for CR#873972 (Zynq PS7 USB - Update Driver to Handle Moving of dTD Head/Tail Pointers).
3241
3242usbpsu_v1_3:
3243Added Cache Coherency(CCI) support.
3244
3245usbpsu_v1_2:
3246Added Reset/disconnect and ch9 handler callback functions
3247Added DFU example
3248Made changes to assign EP number and direction from wIndex field
3249removed unnecessary declaration of XUsbPsu_SetConfiguration in xusbpsu.h file
3250Corrected InstancePtr->UnalignedTx with Ept->UnalignedTx in xusbpsu_controltransfers.c
3251
3252v_axi4s_remap_v1_0:
3253Initial version of the driver (Generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC).
3254
3255v_csc_v2_0:
3256Updated tcl to include new args ENABLE_422 and ENABLE_WINDOW.
3257Is422Enabled, IsDemoWindowEnabled added to XV_csc_Config structure.
3258Made changes to integrate layer-1 with layer-2.
3259Made changes so that IsDemoWindowEnabled prevents access to absent HW regs.
3260Corrected typo in XV_CscSetColorspace setting K31 FW reg.
3261Updated the XV_CscDbgReportStatus routine.
3262Changes made so that macros query Is422Enabled, IsDemoWindowEnabled flags which were added to
3263the XV_csc_Config structure.
3264
3265v_deinterlacer_v6_0:
3266Made changes to integrate layer-1 with layer-2.
3267Added WaitForIdle function.
3268
3269v_hcresampler_v2_0:
3270Made changes to integrate layer-1 with layer-2.
3271
3272v_hdmirxss_v2_0 :
3273Added Cable (dis)connect printf
3274
3275v_hdmirx_v1_1:
3276Added support for read not complete DDC event
3277
3278v_hdmitx_v1_1 :
3279Added XV_HdmiTx_SetHdmiMode and XV_HdmiTx_SetDviMode
3280Removed support for reduced blanking
3281
3282v_hdmirxss_v2_0 :
3283Moved HDCP 2.2 reset from stream up/down callback to connect callback
3284Added HDCP authenticated callback support
3285Remove xintc.h from xv_hdmirxss.h as it is processor dependent
3286Updated for Zync ARM support. CR#949087
3287
3288v_hdmirxss_v3_2 :
3289Removed authentication request flag from xhdcp.c/h
3290
3291v_hdmitxss_v2_0 :
3292Added XV_HdmiTxSs_SetHdmiMode and XV_HdmiTxSs_SetDviMode
3293Removed reduced blanking support
3294Moved HDCP 2.2 reset from stream up/down callback to connect callback
3295Add XV_HdmiTxSs_SendGenericAuxInfoframe function
3296Updated for Zync ARM support. CR#949087
3297
3298v_hdmitxss_v3_2 :
3299Removed authentication request flag from xhdcp.c/h
3300
3301v_hdmirx_v1_1:
3302Added Link Check callback
3303Added pixel clock calculation to HdmiRx_TmrIntrHandler
3304Update to fix compiler warnings. CR#949087
3305
3306v_hdmitx_v1_1 :
3307Reorganization of code
3308
3309v_hdmirxss_v2_0 :
3310Add HDCP Support
3311
3312v_hdmitxss_v2_0 :
3313Add HDCP Support
3314
3315v_hdmirxss_v2_0:
3316Updated version from 1.0 to 2.0
3317
33181. Added 3D support
33192. Added Native Video Support
33203. Added NTSC/PAL/420 Support
3321
3322v_hdmitxss_v2_0:
3323Updated version from 1.0 to 2.0
3324
33251. Fixed Audio Infoframe issue
33262. Added 3D support
33273. Added Native Video Support
33284. Added NTSC/PAL/420 Support
3329
3330v_hdmirx_v1_1:
3331Updated version from 1.0 to 1.1
3332
3333v_hdmitx_v1_1:
3334Updated version from 1.0 to 1.1
3335
3336v_hdmirx_v1_0:
3337Made changes in mdd file to change OPTION DEPENDS to video_common_v2_2.
3338
3339v_hdmitx_v1_0:
3340Made changes in mdd file to change OPTION DEPENDS to video_common_v2_2.
3341
3342v_hscaler_v2_0:
3343Made changes to integrate layer-1 with layer-2.
3344Updated the XV_HScalerDbgReportStatus routine.
3345Added macro to query the Is422Enabled flag that was added to the XV_hscaler_Config structure.
3346
3347v_letterbox_v2_0:
3348Made changes in mdd file to change OPTION DEPENDS to video_common_v2_2.
3349Made changes to integrate layer-1 with layer-2.
3350
3351v_mix_v1_0:
3352Added initial version of Mix Layer-2 Driver (Generated by Vivado(TM) HLS).
3353Added stride and memory interface alignment requirements
3354Added new interface types for each layer
3355Export per layer video format (color format) user parameter to driver
3356Updated example design to align with hw changes
3357Added fix for stream layer not working
3358Added fix for offset alignment to example design
3359Added fix for window coordinate 0,0
3360
3361v_tpg_v7_0:
3362Made changes in mdd file to change OPTION DEPENDS to video_common_v2_2.
3363
3364v_vcresampler_v2_0:
3365Made changes in mdd file to change OPTION DEPENDS to video_common_v2_2.
3366Made changes to integrate layer-1 with layer-2.
3367
3368v_vscaler_v2_0:
3369Made changes to integrate layer-1 with layer-2.
3370
3371v_dpt4175:
3372Initial Commit for 2016.3
3373Added 64 Bit Support (UINTPTR)
3374Removed xil_printf
3375Added -Wall-Wextra in Makefile
3376
3377v_pt4175:
3378Initial Commit for 2016.3
3379Added 64 Bit Support (UINTPTR)
3380Removed xil_printf
3381Added -Wall-Wextra in Makefile
3382Added PixPerPacket Function
3383
3384v_voip_decap_v1_0:
3385Initial Commit for 2016.1
3386Change space to tab in the Makefile
3387Fixed mismatch in MASK parameter (CR 952247)
3388Added 64 Bit Support (UINTPTR)
3389Added register support for Dynamic PayloadType
3390
3391v_voip_framer_v1_0:
3392Initial Commit for 2016.1
3393Change space to tab in the Makefile
3394Added 64 Bit Address Support (UINTPTR)
3395Fixed mismatched function with PG (CR 955024)
3396Removed all the xil_printf from the drivers
3397Added 64 Bit Support (UINTPTR)
3398
3399v_voip_packetizer56_v1_0:
3400Initial Commit for 2016.1
3401Change space to tab in the Makefile
3402Added 64 Bit Support (UINTPTR)
3403
3404v_voip_depacketizer_v1_0:
3405Initial Commit for 2016.1
3406Change space to tab in the Makefile
3407Added 64 Bit Support (UINTPTR)
3408
3409v_voip_fec_tx_v1_0:
3410Initial Commit for 2016.1
3411Change space to tab in the Makefile
3412Revert back option version in mdd file to 1.0 as this is initial version
3413Update debug statistic offset
3414Added 64 Bit Support (UINTPTR)
3415
3416v_voip_fec_rx_v1_0:
3417Initial Commit for 2016.1
3418Change space to tab in the Makefile
3419Add debug status and statistic function for the core
3420Added 64 Bit Support (UINTPTR)
3421
3422video_common_v2_2:
3423Changes made so that functions with pointer arguments that don't modify contents are now const.
3424Added ability to insert a custom video timing table: XVidC_RegisterCustomTimingModes and
3425XVidC_UnregisterCustomTimingMode.
3426Added 3D support.
3427Fixed video timings for some resolutions.
3428
3429vphy_v1_1:
3430Made changes in mdd file to change OPTION DEPENDS to video_common_v2_2.
3431Corrected PllParams.Cdr[1] values for DP and HDMI.
3432Added GTPE2 and GTHE4 Support and Enhanced Event Log
3433Updates for DP GTPE2 Support
3434Fixed 1PPC MMCM parameter calculation in HDMI
3435Corrected TX_CLK25_DIV1 and added RX_CLK25_DIV1 initialization
3436Updated the RXCDRCFG2 values for GTHE4
3437Updated xvphy_gtpe2.c to take the correct refclk frequency for DP
3438
3439vphy_v1_2:
3440Added HdmiFastSwitch in XVphy_Config
3441Fixed bug in XVphy_IsPllLocked function
3442Updates for 64-bit compilation
3443Used usleep API instead of MB_Sleep API
3444Replaced xil_printf with log events for debugging
3445Modified XVphy_DruGetRefClkFreqHz API
3446Fixed Null pointer dereference in XVphy_IBufDsEnable
3447Suppressed warning messages due to unused arguments
3448
3449vphy_v1_3:
3450Added comments in xvphy_hdmi_intr.c on the XVphy_WaitUs usage.
3451Added error message in XVphy_HdmiCpllParam when DRU is enabled and RX TMDS ratio is 1/40
3452Fixed rounding of DRU and RX refclk frequencies
3453Fixed race condition in XVphy_HdmiRxClkDetFreqChangeHandler when storing RxRefClkHz value
3454
3455vphy_v1_4:
3456Reorganized the vphy.c/.h files reduce the number of APIs exposed to users
3457Created xvphy_i.c/h to contain APIs from vphy.c/.h which are shared by HDMI and DP
3458Added preprocessor directives for SW footprint reduction
3459Made debug log optional (can be disabled via makefile)
3460Added type_defs and APIs to implement the optional err_irq port (xilinx internal)
3461Added mechanism to re-trigger GT TX reset when TX align get stuck in xvphy_hdmi_intr.c
3462Added N2=8 divider for GTHE3 & GTHE4 CPLL for DP only
3463Implemented 2/4 byte GT mode switching HDMI
3464Fixed c++ compiler warnings
3465Added Transceiver_Width, C_Err_Irq_En, AXI_LITE_FREQ_HZ Parameters in xvphy_g.c and in vphy main data structure
3466Added XVphy_GtUserRdyEnable for TX and RX in XVphy_DpInitialize API
3467
3468vphy_v1_5:
3469Updated the Updated the RXPI_CFG0 calculation in xvphy_gthe4.c
3470Corrected RXCDR_CFG values for DP in xvphy_gthe4.c
3471Added XVphy_CfgCpllCalPeriodandTol API in xvphy_gthe4.c adn vphy_i.h
3472Added Div in HdmiCfgCalcMmcmParam search algorithm in xvphy_hdmi.c
3473Added DrpClkFreq in XVphy_Config
3474
3475vphy_v1_6:
3476Marked XVphy_DrpRead & XVphy_DrpWrite as deprecated APIs
3477Added XVphy_DrpRd & XVphy_DrpWr to replace the deprecated equivalent APIs
3478Added XVphy_SetErrorCallback, XVphy_ErrorHandler & XVphy_PllLayoutErrorHandler APIs
3479Adjusted GTXE2 CPLL DRU linerate to 2.5 Gbps
3480Improved stability and robustness during GTXE2 bonded mode
3481Changed ClkOutxDiv declaration to u16 in vphy.h
3482Added XVPHY_LOG_EVT_NO_QPLL_ERR & XVPHY_LOG_EVT_DRU_CLK_ERR log events
3483Added XVphy_RegisterDebug API in vphy.c/h
3484Fixed bug in HdmiCfgCalcMmcmParam when linerate exceeds 3.4 Gbps when oversampling is enabled
3485Improved stability to avoid SW hang when HdmiCfgCalcMmcmParam is not able to find the applicable divider for ARM processors
3486Fixed XVphy_HdmiDebugInfo printout for RX only configuration
3487Added doxygen tags
3488Added XVphy_Hdmi_CfgInitialize to replace the deprecated XVphy_HdmiInitialize API
3489
3490vphy_v1_7:
3491Added new files: xvphy_gtye4.c, xvphy_mmcme2.c, xvphy_mmcme3.c & xvphy_mmcme4.c
3492Added GTYE4 Support for HDMI
3493Migrated MMCM reconfig from RTL to SW driver
3494Added new APIs: XVphy_SetPolarity, XVphy_SetPrbsSel, XVphy_TxPrbsForceError
3495Added 8.1 Gbps support in DP
3496Corrected FVCO range for MMCME4 in xvphy_hdmi.h
3497Updated US/US+ QPLL0 VCO MAX to 16.375 GHz (GTHE3/GTHE4)
3498Removed XVphy_DruSetGain API in xvphy_hdmi.c
3499Changed line comments from // to /* */
3500Added N2=8 divider for CPLL for US & US+ devices
3501Added maximum userclk checking in PLL parameter computation
3502
3503vphy_v1_8:
3504Corrected the GTYE4 CDR settings for DP in xvphy_gtye4.c
3505Removed the expired deprecated APIs XVphy_DrpWrite and XVphy_DrpRead
3506Corrected a bug in XVphy_HdmiQpllParam API
3507
3508vprocss_v2_1:
3509Added new version 2.1
3510Added optional color format conversion handling in scaler only topology
3511Updated tcl to support multiple instances
3512
3513wdttb_v4_0:
3514Updated Window watchdog support.
3515Updated XWdtTb_Config structure with Window WDT parameters.
3516Updated XWdtTb core structure with config parameter and removed RegBaseAddress parameter.
3517Added following static inline functions:
3518XWdtTb_GetTbValue, XWdtTb_SetRegSpaceAccessMode,
3519XWdtTb_GetRegSpaceAccessMode, XWdtTb_GetLastEvent,
3520XWdtTb_GetFailCounter, XWdtTb_IsResetPending,
3521XWdtTb_GetIntrStatus, XWdtTb_IsWrongCfg.
3522Added following functions:
3523XWdtTb_AlwaysEnable, XWdtTb_ClearLastEvent,
3524XWdtTb_ClearResetPending, XWdtTb_IntrClear,
3525XWdtTb_SetByteCount, XWdtTb_GetByteCount,
3526XWdtTb_SetByteSegment, XWdtTb_GetByteSegment,
3527XWdtTb_EnableSst, XWdtTb_DisableSst, XWdtTb_EnablePsm,
3528XWdtTb_DisablePsm, XWdtTb_EnableFailCounter,
3529XWdtTb_DisableFailCounter, XWdtTb_EnableExtraProtection,
3530XWdtTb_DisableExtraProtection, XWdtTb_SetWindowCount, XWdtTb_CfgInitialize.
3531Updated following functions with Window WDT feature:
3532XWdtTb_Start, XWdtTb_Stop, XWdtTb_IsWdtExpired, XWdtTb_RestartWdt.
3533Changed multi line comments to single line comments wherever required.
3534Moved XWdtTb_LookupConfig definition to xwdttb_sinit.c.
3535Changes made to adherence to coding and Doxygen guidelines.
3536Removed included xil_io, xil_types, xparameters and xil_assert header files.
3537Moved XWdtTb_GetTbValue to xwdttb.h file.
3538Changes made to adhere to MISRA-C guidelines.
3539Added new files xwdttb_hw.h and xwdttb_sinit.c.
3540Added masks and shifts macros for Window WDT:
3541Added macros for Window WDT feature.
3542
3543zdma_v1_1:
3544Added new version 1.1
3545Modified XZDma_SetMode API
3546Corrected XZDma_SetChDataConfig API
3547
3548standalone_v5_4:
3549Updated xplatform_info.h to add macros for support for A53 32 bit.
3550Modified boot.s to disable ACTLR.DBWR bit to avoid potential R5 deadlock for errata 780125.
3551Modified file xil_misc_psreset_api.c to improve the description for XOcm_Remap function to avoid
3552confusion for Cortex-A9.
3553Enabled I-Cache and D-Cache in boot code for a53 32 bit BSP in the initialization.
3554Modified file xil_misc_psreset_api.c to correct the description for XOcm_Remap function to avoid confusion for
3555Microblaze.
3556Added #defines for mmu attributes which can be used with Xil_SetTlbAttributes API for cortex-a9.
3557Added default undefined exception handler with debug print of the instruction causing undefined exception for
3558Cortex-A9 BSP.
3559Included #defines for silicon for checking the current executing platform using XGet_Zynq_UltraMp_Platform_info API
3560for ZynqMP Soc. Updated xplatform_info.h and xplatform_info.c accordingly. Added a new API XGetPSVersion_Info to
3561return information for PS Silicon version. Modified APIs for platform information to add support for
3562Cortex-A53 32bit mode.
3563Initialize global constructor for C++ applications for Cortex-A53 (32 and 64 bit) and Cortex-R5.
3564Updadted the translation table according to proper address map for cortex-A53 (32 and 64 bit).
3565MPU initialization is corrected based on proper address map for cortex-R5 (mpu.c).
3566Modified boot.S file to set the reset vector register RVBAR equivalent to vector table base address for
3567cortex-A53 (32 and 64 bit).
3568Modified cortexa9 gcc Makefile to update the extra compiler flag as per the toolchain update.
3569Corrected the sleep and usleep routines to avoid hardcoding the timer frequency, instead take it
3570from xparameters.h to properly configure the timestamp clock frequency.
3571Updated cortexa9 BSP to add macros: asm_cp15_inval_dc_line_mva_poc, asm_cp15_clean_inval_dc_line_mva_poc,
3572asm_cp15_inval_ic_line_mva_pou, asm_cp15_inval_dc_line_sw, asm_cp15_clean_inval_dc_line_sw. These macros are
3573used CACHE APIs to replace inline assembly code. This is done for better MISRA C compliance.
3574Modified prototypes of xil_In32 and xil_Out32 for cortexa9 to remove warnings.
3575Added axipmon interrupt id's in xparameter_ps.h for cortexa53 BSP.
3576Added axipmon interrupt id's in xparameter_ps.h for cortexr5 BSP.
3577Updated A53 64 bit BSP xil_io.c APIs Xil_Out8, Xil_Out16, Xil_Out32, Xil_Out64 to use volatiles.
3578Updated A53 32 bit BSP xil_io.c APIs Xil_Out8, Xil_Out16, Xil_Out32 to use volatiles.
3579Changes across various files in the BSP for MISRA C compliance.
3580Added interrupt ID macros for system monitor in A53 and R5 BSPs (xparameters_ps.h).
3581Removed macro XPAR_SCUTIMER_DEVICE_ID from Cortex-R5 xparameters_ps.h (as it is not relevant).
3582Updated boot.S in Cortex-R5 to add support for R5 lock-step mode (enabling the comparator logic and
3583enabling fault log.
3584Renamed USEAMP to VEC_TABLE_IN_OCM in boot.S to avoid confusion with USE_AMP for Cortex-R5.
3585Renamed USEAMP and USE_AMP to UNDEFINE_FILE_OPS around file operation open(),read(), write() etc for
3586Cortex-A9 and Cortex-R5.
3587Removed the upper 512MB remapping to 0 in boot.S for USE_AMP flag for Cortex-A9.
3588Added support for 64 bit address extension for MicroBlaze BSP. Updated mb_interface.h to add macros for
3589new assembly instructions. The macros added are: mfeare, mfpvre, lwea, lhuea, lbuea, swea, shea, sbea.
3590Made changes in MicroBlaze BSP xil_io.c and xil_io.h to convert Xil_In8, Xil_In16, Xil_In32, Xil_Out8,
3591Xil_Out16, Xil_Out32 into static inline functions. Made changes in xil_io.c and xil_io.h to change u32
3592to UINTPTR.
3593Made changes in MicroBlaze BSP to add implementation for xil_printf (added the file xil_printf.c). Earlier
3594xil_printf was part of toolchain which is now removed from toolchain and made part of BSP.
3595Modified cortexr5/xtime_l.c to add an API XTime_StartTimer and updated cortexr5/xil-crt0.S to configure
3596the TTC3 timer when present. Modified cortexr5/sleep.c, cortexr5/usleep.c to use TTC3 when present otherwise
3597use set of assembly instructions to provide required delay to fix CR#913249.
3598Made changes in A53 and R5 BSPs to replace the _exit with exit (xil-crt0.S). This fixes the CR#937036.
3599Modified the boot code for cortex-r5 in cortexr5/gcc/boot.S to initialize the floating point registers,
3600banked registers for various modes and enabled the cache ECC check before enabling the fault log for
3601lock step mode and updates the cortex-r5 bsp makefile at cortexr5/gcc/Makefile to support the floating
3602point registers initialization boot code to fix the CR#937490
3603Updated the exit function in cortexr5/gcc/_exit.c to enable the debug logic in case of lock-step mode
3604when fault log is enabled to fix the CR#938281
3605Included instrinsics.h header file to cortexa9/iccarm/xpseudo_asm_iccarm.h for inline assembly instructions
3606definitions used in C. It also modifies cortexa9/iccarm/Makefile to remove --cpu=Cortex-A9 flag to add it in
3607compiler flags of BSP to fix CR#938718
3608Fix for CR#938738. Added print.c in MB BSP.
3609Updated cortexr5/sleep.c and usleep.c to avoid disabling the interrupts when sleep/usleep is being executed
3610using assembly instructions to fix CR#913249.
3611Modified cortexr5/boot.S to reset the dbg_lpd_reset before enabling the fault log to avoid intervention for
3612lock-step mode and cortexr5/_exit.c to enable the dbg_lpd_reset once the fault log is disabled to fix
3613CR#947335
3614
3615xilskey_v5_0:
3616Modified JtagWrite_Ultrascale.
3617Added verification for programming bits.
3618Added checks for programming.
3619AES key programmed is verified.
3620Calculated CRC of provided AES key.
3621Added Ultrascale BBRAM programming.
3622Added example for Ultrascale BBRAM.
3623Modified TCL for supporting all platforms.
3624Fixed Array out of bounds error.
3625
3626xilffs_v3_2:
3627Added support for LFN.
3628Added support for use_lfn option.
3629Added use_lfn option.
3630Ignore CD/WP checks for Embedded slot.
3631Corrected ST_WORD and ST_DWORD macros.
3632
3633xilflash_v4_2:
3634Added support to change BPI Flash from sync to async in examples.
3635Added support to unlock the MicronG18 flash in examples.
3636Added canonical name to FLASH_BASEADDR in examples.
3637
3638xilisf_v5_3:
3639Updated xilisf_stm_read_write_example.c to remove compilation error.
3640
3641xilisf_v5_4:
3642Updated xilisf_stm_read_write_example.c to remove compilation error.
3643
3644xilisf_v5_5:
3645Updated xilisf_stm_read_write_example.c to remove compilation error.
3646Fix compilation errors and warnings.
3647Added support for spansion in extended address mode.
3648Added support for S25FL512S and S25FL256S.
3649Added support for MT25QU01G
3650Used 3byte command with 4 byte addressing for Micron.
3651
3652xilrsa_v1_2:
3653Added support for Linaro tool chain in tcl.
3654Updated the version number.
3655Added binary for Linaro Tool chain.
3656
3657xilsecure_v1_1:
3658Updated the silsecure library.
3659
3660freertos823_xilinx_v1_1:
3661Modifies the makefiles, mld and tcl for freertos bsp to update them to latest standalone bsp 5.4.
3662
3663lwip141_1_4:
3664Made changes for lwip to work on A53 with caches enabled.
3665Corrected writing default values to last tx and rx BDs and then re-writing.
3666Added support for TI phy with axi ethernet interface.
3667Zynq BD space made normal non-cacheable.
3668Corrected Zynq GEM clock config when GEM1 is selected.
3669Added support for MicroBlaze FreeRTOS.
3670Made changes to add support for Axi Etherent on ZyqnMP.
3671Made changes in tcl to ensure that the parameter LWIP_COMPAT_MUTEX is defines as 1 for
3672MicroBlaze FreeRTOS use case.
3673Made changes to remove an incorrect assert in sys_arch.c (sys_arch_mbox_fetch) for FreeRTOS use case.
3674Made other miscellaneous changes in adapter files for removing warnings.
3675Made changes in lwip.tcl to Fix issues with the Axi Ethernet on ZynqMP R5.
3676Fix compilation errors for Axi Ethernet on ZynqMP.
3677
3678freertos_hello_world:
3679Updated the freertos hello world application to add a timer. The timer
3680times out after 10 seconds and kills the tasks and prints a success message.
3681Updated the tcl to add checks for A53 32 bit. The application is not supported
3682for A53 32 bit.
3683
3684lwip_echo_server:
3685Made changes not to disable D-cache for A53.
3686
3687xilopenamp_v1.0:
3688Deprecate xilopenamp_v1.0 now replaced by openamp_v1.0
3689
3690openamp_v1.0:
3691New openamp library in sync with open-source project
3692
3693openamp_echo_test:
3694Made changes not to call vTaskEndScheduler (FreeRTOS R5 based application). Removed the timer being
3695created for this purpose.
3696Removed the assert print which was caused because of calling endscheduler API for cortex-r5 freertos bsp
3697Reworked code to use new openamp library
3698
3699openamp_matrix_multiply:
3700Made changes not to call vTaskEndScheduler (FreeRTOS R5 based application). Removed the timer being
3701created for this purpose.
3702Reworked code to use new openamp library
3703
3704openamp_rpc_demo:
3705Made changes not to call vTaskEndScheduler (FreeRTOS R5 based application). Removed the timer being
3706created for this purpose.
3707Reworked code to use new openamp library
3708
3709xilkernel_thread_demo:
3710Updated xilkernel thread demo tcl (to check for IP_NAME not for instance name).
3711
3712freertos_lwip_echo_server:
3713Added a new lwip echo server app to be used only with FreeRTOS BSP. The functionality of this app
3714is exactly same as lwip_echo_server except the fact that it does not support 1000BaseX, sgmii modes and
3715is exclusively for FreeRTOS.
3716
3717zynqmp_fsbl:
3718Fix for decryption only secure test failure in R5, by disabling data cache.
3719Workaround provided in FSBL for SD card insert/remove detection.
3720Added performance measurement feature, with which time taken by various stages of FSBL can be monitored.
3721When FSBL runs on R5, FSBL's vectors are overwritten with those of user applications. This is now avoided for non-secure boot.
3722Added support for Winbond 64M and ISSI 128M QSPI parts.
3723Fix the issue in FSBL when only WDT1 is present in design.
3724R5 BSP now disables debug logic and enables comparators. For R5 Lockstep, in JTAG bootmode, Turn-off comparators and enable debug logic so that further applications can be ran on JTAG.
3725Added the PL reset capability using EMIO[95-92] in FSBL after successful PL configuration.
3726Fix the logic to determine the bank crossing condition in case of a dual parallel qspi connection. Also corresponding change fix done to calculate the number of bytes to be programmed in a given bank.
3727A workaround is provided in FSBL to power-up PL before MIO configuration (for Silicon versions 1 and 2). Also, removal of isolation for PL is now deferred until its configuration is done.
3728Added support for PS-Only reset, i.e. only the PS component is reset without re-configuring the PL component.
3729Added support for Macronix QSPI flash parts.
3730Changed linker script. With this, FSBL now fails to build (linker error) if FSBL's loadable sections exceed the OCM region allotted to it. This avoids possible overlap of FSBL with other applications built for OCM.
3731Added support for ZCU102 board specific configuration, including GT configuration.
3732Updated extra compiler flags for A53-64 (ARMA53_64), A53-32 (ARMA53_32).
3733Added support for PL bitstream loading in DDRless system.
3734To minimize the possibility of speculative access of DDR before it is initialized, in A53 FSBL's translation table (duplicated from BSP), DDR region is marked as "reserved". DDR region is again marked as "Memory" after DDR initialization.
3735Due to a bug in 1.0 Silicon, PS hangs after System Reset if RPLL is used. Hence, just for 1.0 Silicon, RPLL clock is bypassed before giving System Reset (this is workaround in FSBL).
3736When multiboot register value is non zero and when second SD instance is used, the bin filename was incorrectly determined in FSBL. This is fixed now.
3737Fix for failure in authenticating PL bitsream.
3738Restrict cores for which FSBL can be created (throw error if not running on A53-0, R5-0, R5-L).
3739Renamed stack names in A53 FSBL linker script.
3740
3741zynq_fsbl:
3742PS UART code is now referred only when PS UART is present in design. This is since STDOUT_BASEADDRESS is defined even for coresight UART.
3743Added support for Macronix flash.
3744Removed the hard coded value of qspi read command and configured to pick from LQSPI_CFG register.
3745As xilrsa is not mandatory for zynq, remove xilrsa check while creating application in SDK.
3746
3747
3748Change Log for 2015.4
3749=================================
3750can_v3_1:
3751Fixed the issue wrong values for the IP Parameters being exported to the xparameters.h file
3752
3753coresightps_dcc_v1_2
3754Added support for IAR Compiler.
3755
3756dp_v3_0
3757Fixed fractional TU bytes calculation.
3758Updated PHY status check to work cores instantiated with a single lane.
3759Qualify interrupt status with interrupt mask.
3760Added MSA callback.
3761Fixed TPS3 mask value.
3762Move waiting for PHY to be ready to link training rather than initialization to allow more flexible usage in pass-through systems.
3763
3764dprxss_v2_0
3765Removed HDCP handler types.
3766Added HDCP and Timer Counter support.
3767Protected HDCP under macro number of instances.
3768Added Timer Counter reset value macro.
3769Generate a HPD interrupt whenever RX cable disconnect/unplug interrupt is detected.
3770Removed DP159 bit error count code. Used DP159 bit error count function from Video Common library.
3771
3772dptxss_v2_0
3773Added support for customized main stream attributes for SST and MST
3774Added HDCP instance into global sub-cores structure.
3775Added new handler types: lane count, link rate, pre-emphasis voltage swing adjust and set MSA.
3776Added function: XDpTxSs_SetHasRedriverInPath.
3777Updated register offsets in debug MSA info.
3778Removed cross checking user set resolution with RX EDID.
3779Set interlace to zero when video mode is XVIDC_VM_CUSTOM.
3780Removed video mode check.
3781Added HDCP and Timer Counter support.
3782Removed cross checking user set resolution with RX EDID.
3783
3784hdcp1x_v2_0
3785Added dependency on timer counter driver.
3786Updated for integration in subsystems for cases that an HDCP core is not instantiated (default *_g.c and protection macros).
3787Added EffectiveAddr argument to XHdcp1x_CfgInitialize.
3788Updated naming of HDMI references as xv_hdmi* rather than xhdmi* to match new HDMI drivers.
3789
3790rtcpsu_v1_1
3791Enabled rtc controller switching to battery supply when vcc_psaux is not available
3792
3793tmrctr_v4_0
3794Added alternate initialization sequence to allow for setting a different EffectiveAddress (using standard CfgInitialize and InitHw).
3795Updated for integration in subsystems for cases that an HDCP core is not instantiated (default *_g.c and protection macros).
3796Creation of xtmrctr_sinit.c file. Moved LookupConfig from xtmrctr.c.
3797
3798v_hdmirx_v1_0
3799Initial release.
3800
3801v_hdmirxss_v1_0
3802Initial release.
3803
3804v_hdmitx_v1_0
3805Initial release.
3806
3807v_hdmitxss_v1_0
3808Initial release.
3809
3810video_common_v2_1
3811Fixed video timings for some resolutions.
3812   XVIDC_VM_720x480_60_I,
3813   XVIDC_VM_720x576_50_I,
3814   XVIDC_VM_1440x480_60_I,
3815   XVIDC_VM_1440x576_50_I,
3816   XVIDC_VM_1920x1080_50_I,
3817   XVIDC_VM_1920x1080_60_I,
3818   XVIDC_VM_1280x720_50_P,
3819   XVIDC_VM_1680x720_50_P,
3820   XVIDC_VM_1680x720_60_P.
3821
3822vphy_v1_0
3823Initial release.
3824
3825vtc_v7_1:
3826Corrected VsyncStart Calculations
3827Added interlaced programming feature.
3828
3829standalone_v5_3:
3830Modified Cortex-A9 BSP to add openamp support
3831Modified assembly instruction for iar compiler for cortex-a9
3832
3833sdps_v2_6:
3834Polled for Transfer Complete bit after cmd6.
3835Dont switch to 1.8V
3836Added support for SD v1.0
3837
3838zdma_v1_0:
3839Modified ZDMA simple transfer example
3840Modified XZDma_CreateBDList API
3841
3842zynqmp_fsbl:
3843Fix for SD1 boot failure in FSBL when the design has SD1 and no SD0/eMMC
3844Skip power-up requests for QEMU
3845Corrected the ReadBuffer index value in QSPI-24 bit (for Spansion)
3846Corrected logic to trigger PMU_0 IPI
3847Added support for SD1 and SD1 with level shifter bootmodes
3848Removed UART initialization workaround in FSBL
3849Power state not to be checked before sending powering up request
3850
3851zynqmp_pmufw:
3852Skip UART configuration during PMUFW init
3853Updated PM API
3854Added PS-Only Reset Support
3855Added DAP wake handling
3856
3857xilisf_v5_4
3858updated the IntelStmDevices list to support Micron N25Q256A flash device.
3859xilskey_v4_0:
3860Added DFT control bits programming feature for Zynq Platform
3861Modified JtagWrite API for programming eFUSE on Zynq Platform
3862Added efuse PS and bbram PS support  for Zynq MP SoC
3863Added Xilskey write and read regs APIs for ZynqMP SoC
3864Added efuseps APIs for Zynq MP
3865Added BBRAM PS functionality for Zynq MP SoC
3866Added Example for Zynq MP efusePs
3867Added BBRAM Ps example for Zynq MP SoC
3868Corrected error code names of efuse PL programming for Ultrascale
3869Added c++ boundary blocks for header files xilskey_eps.h, xilskey_utils.h and xilskey_jtag.h.
3870
3871freertos823_xilinx_v1_0:
3872The freertos821_xilinx_v1_0 version is changed to freertos823_xilinx_v1_0 to upgrade the
3873freertos kernel version to 8.2.3 with the support for processor cortex-a53 64bit mode.
3874
3875lwip141_v1_3:
3876Made changes in xemacpsif_dma.c to add required barriers.
3877Remove repeated sysarch protect and unprotect calls.
3878Replace printf with xil_printf.
3879Add support for TI phy.
3880
3881Change Log for 2015.3
3882=================================
3883axicdma_v4_0
3884Added support for 64-bit Addressing.
3885Mark only BD Memory region as uncacheable.
3886
3887axidma_v9_0
3888Added support for 64-bit Addressing.
3889Fix bug in the number of words in a buffer descriptor
3890
3891axiethernet_v5_0
3892Updated the driver tcl for Hier IP(To support User parameters).
3893Fixed CR 870631 AXI Ethernet with FIFO will fail to create the BSP if the interrupt pin on the FIFO is unconnected.
3894
3895axipmon_v6_2
3896New version of the driver for Ultrascale+ ZynqMP SoC with the following changes
3897Added Is32BitFiltering in XAxiPmon_Config structure.
3898Updated XAxiPmon_SetWriteId, XAxiPmon_SetReadId,XAxiPmon_GetWriteId, XAxiPmon_GetReadId
3899XAxiPmon_SetWriteIdMask, XAxiPmon_SetReadIdMask, XAxiPmon_GetWriteIdMask, XAxiPmon_GetReadIdMask
3900functions in xaxipmon.c.
3901Added XAPM_RID_OFFSET and XAPM_RIDMASK_OFFSET in xaxipmon_hw.h
3902
3903axipmon_v6_3
3904Updated version to comply to MISRA-C:2012 guidelines.
3905
3906axis_switch_v1_0
3907New version of the driver to support to axis_switch
3908
3909axivdma_v6_0
3910Added support for a vdma triple buffer api and added support for 64 bit addressing.
3911
3912canfd_v1_0
3913First version of the driver for can_fd.
3914
3915coresightps_dcc_v1_1
3916Updated for Ultrascale+ ZynqMP SoC support
3917
3918cpu_cortexa53_v1_0
3919New driver for cortex a53
3920
3921cpu_cortexr5_v1_0
3922New driver for cortex R5
3923
3924cpu_cortexr5_v1_1
3925Minor updates in the tcl file
3926
3927csu_dma_v1_0
3928First version of the driver for CSU DMA in Ultrascale+ ZynqMP SoC
3929
3930dp_v2_0:
3931Added MST functionality to RX. New APIs added are:
3932- XDp_RxHandleDownReq, XDp_RxGetIicMapEntry,
3933- XDp_RxSetIicMapEntry, XDp_RxSetDpcdMap,
3934- XDp_RxMstExposePort, XDp_RxMstSetPort,
3935- XDp_RxMstSetInputPort, XDp_RxMstSetPbn,
3936- XDp_RxSetIntrDownReqHandler, XDp_RxSetIntrDownReplyHandler,
3937- XDp_RxSetIntrAudioOverHandler, XDp_RxSetIntrPayloadAllocHandler,
3938- XDp_RxSetIntrActRxHandler, XDp_RxSetIntrCrcTestHandler
3939Added Intr*Handler and Intr*CallbackRef interrupt-related members to XDp_Rx
3940structure for:
3941- DownReq, DownReply, AudioOver, PayloadAlloc, ActRx,CrcTest
3942Added new data structures related to RX MST topology:
3943- XDp_RxIicMapEntry, XDp_RxDpcdMap, XDp_RxPort, XDp_RxTopology
3944Renamed XDp_Tx* to XDp_* to reflect commonality with RX for:
3945- XDp_TxSbMsgLinkAddressReplyPortDetail
3946- XDp_TxSbMsgLinkAddressReplyDeviceInfo
3947GUID type change for ease of use:
3948- 'u32 Guid[4]' changed to 'u8 Guid[16]'
3949Added handlers and setter functions for HDCP and unplug
3950events.
3951Added callbacks for lane count changes, link rate changes
3952and pre-emphasis + voltage swing adjust requests.
3953
3954dptxss_v1_0:
3955Initial version of the driver for the Display Port Tx Sub System Driver
3956
3957dual_splitter_v1_0
3958Initial version of the Xilinx Dual Splitter core
3959
3960emaclite_v4_1
3961Added Length check in XEmacLite_AlignedWrite function in xemaclite_l.c file to
3962avoid extra write operation - CR 843707
3963
3964emacps_v3_1
3965Do not call error handler with '0' error code when there is no error- CR 869403
3966
3967gpiops_v3_1
3968Added support for Zynq Ultrascale+ MP -  CR 856980.
3969
3970iomodule_v2_2
3971Updated XIOModule_Uart_InterruptHandler function in xiomodule_uart_intr.c file
3972to read Status register instead of reading Interrupt Pending register - CR #862715
3973
3974ipipsu_v1_0:
3975Initial version of the IPI driver for Ultrascale+ ZynqMPSoC
3976
3977nandpsu_v1_0
3978Initial version of the NAND driver for Ultrascale+ ZynqMPSoC
3979
3980qspipsu_v1_0
3981Initial version of the QSPI driver for Ultrascale+ ZynqMPSoC
3982
3983rtcpsu_v1_0
3984Initial version of the RTC driver for Ultrascale+ ZynqMPSoC
3985
3986sdps_v2_5
3987Added SD 3.0 features and updated the code according to MISRAC-2012.
3988
3989devcfg_v3_3:
3990Minor driver version upgrade that fixes the XDcfg_ReadMultiBootConfig macro which was passing
3991wrong number of arguments
3992
3993llfifo_v5_0:
3994Major driver version that updates the register offsets in the AXI4 data path as per latest IP version(v4.1)
3995
3996sysmon_v7_1:
3997Minor driver version upgrade that modifies temperature transfer function for for Ultrascale.
3998
3999video_common_v2_0
4000Added new timings:
4001   XVIDC_VM_1440x480_60_I,
4002   XVIDC_VM_1440x576_50_I,
4003   XVIDC_VM_1440x240_60_P,
4004   XVIDC_VM_1680x720_50_P,
4005   XVIDC_VM_1680x720_60_P,
4006   XVIDC_VM_1680x720_100_P,
4007   XVIDC_VM_1680x720_120_P,
4008   XVIDC_VM_1680x1050_50_P,
4009   XVIDC_VM_1920x1080_100_P,
4010   XVIDC_VM_1920x1080_120_P,
4011   XVIDC_VM_2560x1080_50_P,
4012   XVIDC_VM_2560x1080_60_P,
4013   XVIDC_VM_2560x1080_100_P,
4014   XVIDC_VM_2560x1080_120_P,
4015   XVIDC_VM_4096x2160_24_P,
4016   XVIDC_VM_4096x2160_25_P,
4017   XVIDC_VM_4096x2160_30_P,
4018   XVIDC_VM_4096x2160_50_P,
4019   XVIDC_VM_4096x2160_60_P,
4020   XVIDC_VM_4096x2160_60_P_RB,
4021   XVIDC_VM_CUSTOM.
4022Modified XVIDC_DP159_CT_PWR -> XVIDC_DP159_CT_UNPLUG.
4023Added bit error count function.
4024Removed extra DP159 register programming as per new DP159 programming guide.
4025
4026vtc_v7_0:
4027Major driver version upgrade that makes the following changes:
4028Adds interlaced field to XVtc_Signal structure. Removes XVtc_RegUpdate as there are is one more API
4029XVtc_RegUpdateEnable present with same functionality.
4030Modifies HActiveVideo value to 1920 for XVTC_VMODE_1080I mode.
4031Removes Major, Minor and Revision parameters from XVtc_GetVersion.
4032Modifies return type of XVtc_GetVersion from void to u32.
4033Adds progressive and interlaced mode switching feature.
4034Modifies XVtc_SetGenerator, XVtc_GetGenerator, XVtc_GetDetector, XVtc_ConvTiming2Signal and XVtc_ConvSignal2Timing APIs.
4035Removes XVTC_ERR_FIL_MASK macro because it is  not present in latest product guide.
4036Modifies register offsets from XVTC_* to XVTC_*_OFFSET for consistency.
4037Adds new file xvtc_selftest.c.
4038Removed call to Reset from initialization function to avoid processor exception. See CR#949946
4039
4040xadcps_v2_2:
4041Minor driver version upgrade that uses correct Device Config base address in xadcps.c.
4042
4043zdma_v1_0:
4044New version of the LPD/FPD DMA driver for Ultrascale+ ZynqMPSoC
4045
4046usbps_v2_3:
4047Created new version
4048Fixed CR#873972 - corrected logic for moving of dTD Head/Tail Pointers
4049Fixed CR#873974 - invalidated Caches After Buffer Receive in Endpoint Buffer Handler
4050
4051uartps_v3_1:
4052Added support for Zynq Ultrascale+ MP related changes
4053
4054uartns550_v3_3:
4055Fixed an issue with the clock divisor - CR 857013
4056
4057uartlite_v3_0:
4058XUartLite_ReceiveBuffer function in xuartlite.c is updated to receive data into user buffer in critical region - CR#865787.
4059
4060standalone_v5_2:
4061Corrected interrupt ID's of TTC.
4062Added PSU definitions for TEST APP.
4063Modified translation table in a53 32bit bsp
4064Changed A53 32bit bsp makefile
4065Added interrupt IDs for RTC
4066Rearranged the Cortex A53 folder structure
4067Modified translation_table.s for Zynq DDR-less system
4068Modified Xil_DCacheFlushRange, Xil_DCacheInvalidateRange and Xil_ICacheInvalidateRange API to add
4069Support for addresses higher than 4GB by not truncating the addresses to 32bit
4070Added support for 64bit print in xil_printf
4071xil_settlbattributes modified for addresses > 4GB
4072Changed in boot.s to include more memory attributes
4073
4074xilffs_v3_1:
4075Used --create option for armcc compiler
4076Modify makefile to check for IAR compiler
4077Card detection checked after disk status
4078Added support for SD1
4079Removed Change Bus Speed, Clock API's in glue layer
4080Added Read_Only option
4081Add card check logic to support Zynq Ultrascale+ MPSoC
4082
4083xilisf_v5_4:
4084Modified SPIPS examples to support on ZynqMP.
4085Added examples to test QSPIPSU interface.
4086
4087xilflash_v4_1:
4088Fix Write buffer programming for IntelStrataFlash
4089Fix Spansion write buffer programming
4090Added Pass/Fail string to readwrite_example
4091
4092xilskey_v3_0:
4093Added ultrascale efuse functionality
4094Added new functions
4095Added API for clk calculations
4096
4097lwip141_v1_2:
4098Add support for A53
4099Update autonegotiation for ZynqMP
4100Use updated autonegotiation for Zynq as well
4101Give error message when A53 32 bit compiler is used
4102Fix bsp compilation errors when elite is configured with interrupts though a concat IP
4103
4104zynq_fsbl:
4105In the file pcap.c, changes done to write to devcfg.STATUS register to clear the DMA done count.
4106
4107freertos821_xilinx_v1_0:
4108FreeRTOS BSP that supports MicroBlaze, CortexA9 and CortexR5
4109
4110xilopenamp_v1_0:
4111XilOpenAMP library that supports Cortex-R5 slave
4112
4113freertos_hello_world:
4114New FreeRTOS demo application
4115
4116openamp_matrix_multiply
4117openamp_rpc_demo
4118openamp_echo_test:
4119OpenAMP demo applications to run on R5 slave and are based on xilopenamp_v1_0.
4120
4121xilkenrel_v6_3:
4122CR:938727 configuring the config_bufmalloc exporting invalid number of statifc bufs.
4123
4124xilpm_v2_0:
4125Replace ACK_CB_STANDARD with ACK_NON_BLOCKING
4126Removed latency argument for XPm_ReleaseNode
4127Migrate to IPI driver
4128Added XPm_ResetAssert and XPm_ResetGetStatus PM API calls
4129PM return value changes to be compliant with PMU-FW
4130Added resume_address to self suspend and request wake-up APIs
4131Add callback APIs
4132Add MMIO API calls
4133Added PM node IDs for all remaining devices
4134Added capability CAP_WAKEUP
4135Updated example to as per API changes
4136
4137