xlnxembeddedsw/doc/ChangeLog
<<
>>
Prefs
   1Changes for 2019.2
   2===============================
   3canfd_v2_2:
   4Updated mailbox offsets for CANFD2.0
   5
   6canps_v3_3:
   7Fixed coverity warnings.
   8
   9coresightps_dcc_v1_6:
  10Add support for Versal Coresight
  11
  12dmaps_v2_5:
  13Add barrier before DMASEV.
  14
  15sdps_v3_8:
  16Modified Tap Delay code for supporting ZynqMP and Versal
  17Disable DLL Reset code for Versal
  18Enable SD UHS Mode support by default for Versal
  19Update Input Tap Delays for Versal
  20Add cache invalidation call at the end of XSdPs_Get_BusWidth
  21Modified ADMA handling API for 32bit and 64bit addresses
  22
  23gpiops_v3_6
  24udpated gpiops example with versal support.
  25Fixed IAR compiler warnings.
  26Added interrupt example support on versal.
  27
  28gpio_v4_5:
  29Updated Makefile for IAR compiler.
  30Fixed IAR warnings in example files
  31
  32csudma_v1_5:
  33Updated xcsudma_intr_example.c to use volatile keyword for
  34DstDone variable to disable compiler optimizations.
  35
  36emacps_v3_10:
  37Clear status registers properly in reset.
  38Use Versal platform version register.
  39Remove peripheral test app support.
  40Add support for clock setup on Versal.
  41Fix common variable definition in example.
  42Add EL1 NS clock config support for Versal.
  43
  44lwip211_v1_1:
  45Add support for Versal
  46Fix emacps hotplug support
  47Enable A53 32 bit compiler for BM apps.
  48Add support for clock setup on Versal.
  49Add EL1 NS clock config support for Versal.
  50
  51lwip_echo_server:
  52Add support for Versal
  53
  54lwip perf apps:
  55Add support for Versal
  56
  57freertos_lwip_echo_server and
  58freertos_lwip perf apps:
  59Add support for Versal
  60
  61freertos_lwip_echo_server:
  62Increase main thread timeout
  63
  64ospipsv_v1_1:
  65Added RX tuning for SDR-PHY and DDR-PHY modes.
  66Added support for EL1_NS.
  67Added support for flash device reset.
  68Set Read Delay field to 0x1 for NON-PHY mode.
  69
  70qspipsu_v1_10:
  71Fixed issues in poll timeout feature.
  72Set recommended tap delay values for Versal.
  73Added Multi Die Erase and Muti Die Read support.
  74
  75rtcpsu_v1_8
  76Updated driver source and example with right sequence
  77
  78spi_v4_5:
  79Removed master inhibit dependency while writing to DTR.
  80Fixed compilation error in spi interrupt example(CR-1035793).
  81
  82spips_v3_3:
  83Initialized DeviceID in XSpiPs_CfgInitialize function.
  84
  85uartlite_v3_3:
  86Updated driver tcl to export proper baseaddress for pmc_ppu1_mdm IP.
  87Updated driver tcl file to support PS and PL ip's.
  88Updated driver tcl file to support mdm and tmr_sem ip's.
  89
  90usbpsu_v1_6:
  91Fix coverity warnings.
  92
  93zdma_v1_8:
  94Fix coverity warnings.
  95Remove unnecessary Versal clock and routing workarounds.
  96
  97uartpsv_v1_1:
  98Updated the interrupt example to use the interrupt ids from xparameters_ps.h
  99instead of hardcoded ones.
 100
 101wdtps_v3_2:
 102Fixed coverity warnings.
 103
 104wdttb_v4_5:
 105Added hierarchical design support.
 106Updated the test app tcl to support polled mode
 107Fixed coverity warnings.
 108Updated driver to support AXI Timebase WDT and WWDT
 109
 110xxvethernet_v1_3:
 111In tcl fix bsp generation error for axis_rx_0 external port design.
 112
 113xilisf_v5_14:
 114Initialized Status variable to XST_FAILURE.
 115Added message regarding deprecation of Xilisf.
 116
 117xilffs_v4_2:
 118Initialize Status variables with failure values
 119
 120xilpm_v3_0:
 121Add versal server library code to xilpm (earlier it was in xillibpm)
 122Add versal client library code to xilpm (earlier it was in xillibpm)
 123Change xilpm directory structure to add support for versal
 124Initialize status variable with XST_FAILURE in all function
 125Modifies watchdog timer to avoid trip during secure operation
 126
 127xilskey_v6_8:
 128Fixed MISRAC violations and coverity warnings
 129Updated doxygen comments.
 130Added support for user to add IDCODES for microblaze
 131Moved floating point calculation to compile time
 132Added assert statements
 133Corrected length of data to be read.
 134Fixed CHASH reading from wrong location of syndrome
 135data in Zynqmp
 136Fixed controller locking back in ZU+
 137Reporting puf_acc_error to user.
 138Added Debug define for dummy programming for microblaze
 139Initialized Status variables to XST_FAILURE
 140Added support to access ZU+ PL efuse and BBRAM
 141Aligned spaces in dependecies.props
 142Removed Tbits programming code in ZU+
 143Added sysmon override or not option under BSP settings
 144for ZU+, added master SLR number in user device adding
 145under BSP settings.
 146Modified Microblaze SSIT devices based on CONFIG ORDER
 147INDEX.
 148
 149xilsecure_v4.1:
 150Added AES interface for Versal
 151Fixed coverity warnings and MISRAC violations
 152Updated return status om Sha3DataUpdate function
 153Optimized code in xsecure.c file
 154Added assert statements to function parameters
 155Added support for A72 and R5 of versal.
 156Initialized status variables to XST_FAILURE.
 157
 158xilnvm_v1_0:
 159Initial release to support eFuse read/write and bbram programming
 160
 161xilpuf_v1_0:
 162Initial release to support Puf Registration and Regeneration
 163
 164axicdma_v4_6:
 165In simple and sg example, fix data buffer cache maintenance ops.
 166
 167axidma_v9_10:
 168In examples fix data buffer cache maintenance ops.
 169
 170rfdc_v7_0:
 171Added support for VOP for GEN3 devices.
 172Added support for DSA for GEN3 devices.
 173Added a get enabled interrupts API.
 174Fixed minor NCO offset issue.
 175Fixed calibration mode issue for GEN1/2 devices.
 176Added API for registering RFDC with libmetal.
 177Added support for reporting DAC current on GEN3 devices.
 178Refactor of Clock distribution.
 179
 180zynqmp_pmufw:
 181Fixed warnings in PMU FW versionless compilation
 182Change power state of power domain or island only if it is powered up
 183 by checking PWR_STATUS register
 184Fixed IPI message buffer overflow issue which occurs when CRC is enabled
 185Fixed PMU FW CPP check errors
 186Fixed PMU FW coverity warnings
 187Change WDT timeout when performing secure operations which take more time
 188Fixed PMU versionless build issues
 189Return error incase of invalid pin ID when calling XPm_PinCtrlGetParameter()
 190Corrected source address in restore_training_data()
 191Added power down permission check for processor and PLL nodes in 
 192 PmForcePowerdown()
 193Added support for RPU only subsystem restart case
 194
 195scugic_v4_1:
 196Fix issues in interrupt mapping/un-mapping for AMP use case. Default mapping
 197of all
 198interrupts to relevant CPU during initialization has been removed. Now,
 199interrupt would
 200be mapped to the CPU, only if request is made to enable that specific
 201interrupt ID.
 202Add support to generate pl-ps interrupt IDs for Versal.
 203Add APIs to mark processor as asleep/awake, these APIs are applicable only
 204for
 205GIC500.
 206
 207freertos10_xilinx_v1_4:
 208Added support for CortexA72.
 209
 210intc_v3_10:
 211Updated intc_update_source_array  proc in tcl to calculate total_source_intrs
 212based on width of interrupt port/pin.
 213
 214ttcps_v3_10:
 215Added assert checks in XTtcPs_CalcIntervalFromFreq API.
 216Modified xttcps_intr_example to make it generic, to
 217use any intended TTC device.
 218In XTtcPs_SetOptions() default condition will never reach. So replaced
 219switch case as if-else.
 220Added interrupt handler in driver. Updated examples to use ttc driver
 221interrupt handler.
 222Added the stack usage,memory foot-print and execution time for
 223each API, compiler informations, assumptions of use in the header file
 224and mentioned the parameters range in the source code.
 225
 226
 227standalone_v7_1:
 228Updated Cortexr5 BSP to skip access to secure address sapce,
 229if processor is marked as non secure in trustzone setting.
 230Fixed Cortexr5 events in arm/cortexr5/xpm_counter.c.
 231Updated Cortexr5 BSP to fix infinite loop in Xil_MemMap API.
 232Removed NULL pointer de-referencing from xil_printf function.
 233Updated xil_smc.h to add SMC IDs related to Versal.
 234Updated Init_MPU API in Cortexr5 BSP to print warning on console,
 235if DDR size is not in power of 2.
 236Updated transaltion table for versal
 237ARMv8/64bit/platform/versal/translation_table.S
 238to mark DDR_CH_1, DDR_CH_2 and DDR_CH_3 regions as memory, based on
 239respective region
 240sizes in hdf.
 241Optimized Xil_DCacheInvalidateRange API in ARMv8 BSP, to fix performace drop
 242obseved on Versal platform.
 243Updated Xil_DCacheFlushRange to point to Xil_DCacheInvalidateRange API, since
 244both
 245APIs executes same functinality. It has been done to avoid code duplication.
 246Added MPU mapping for AIE address space in Cortexr5 BSP
 247arm/cortexr5/platform/versal/mpu.c.
 248
 249
 250Changes for 2019.1
 251===============================
 252v_hdmiphy1_v1_0:
 253Initial Release.
 254
 255v_hdmirx_v_2_3:
 256Updated the description of the API XV_HdmiRx_GetLinkStatus.
 257
 258v_hdmitx_v_2_3:
 259No functional changes, upversioned to align with v_hdmirx_v2_3.
 260
 261v_hdmirxss_v_5_3:
 262Fixed an issue in pass-through application where TX's stream color space is not set according to RX's decoded InfoFrame color space.
 263Clears SCDC registers when HPD is toggled in applications.
 264Fixed an issue where TX stream doesn't come up when RX hotplug is performed on HDMI 2.0 resolution when LOOPBACK_MODE_EN is set to 1 in the applications.
 265Toggles HDP after loading the default EDID.
 266Starts HDCP Authentication on the first TX VSYNC in PassThrough applications.
 267
 268v_hdmitxss_v_5_3:
 269Fixed an issue in pass-through application where TX's stream color space is not set according to RX's decoded InfoFrame color space.
 270Clears SCDC registers when HPD is toggled in applications.
 271Fixed an issue where TX stream doesn't come up when RX hotplug is performed on HDMI 2.0 resolution when LOOPBACK_MODE_EN is set to 1 in the applications.
 272Toggles HDP after loading the default EDID.
 273Starts HDCP Authentication on the first TX VSYNC in the applications.
 274
 275vphy_v1_9:
 276Moved the RXLPM setting from vphy_i.c/h to vphy.c/h.
 277Added RXCDR_CFG3 configuration in GTYE4 DP.
 278
 279rfdc_v6_0:
 280New interpolaton & decimation modes (IP dependent).
 281New Image Reject Filter (IP dependent).
 282New DAC modes (IP dependent).
 283Second Nyquist zone inerse sinc filter (IP dependent).
 284Support for alternative DAC bondout (IP dependent).
 285New ADC signal detector (IP dependent).
 286New calibration override APIs (IP dependent).
 287Extended coarse delay (IP dependent).
 288New clock distribution network with integer clock division(IP dependent).
 289New Common mode over/under interrupts (IP dependent)
 290Interrupt APIs now return standard error codes (exempt XRFdc_IntrHandeler
 291and XRFdc_SetStatusHandler).
 292XRFdc_DynamicPLLConfig now only restarts a tile if it was on previously.
 293
 294libmetal_v2_0:
 295Updated shared memory APIs to decouple from shmem allocation implementation
 296Sync up libmetal upstream 5774af1b8e28ea39cbf92ae131eee4f93af699b2
 297CPP atomic bug fix;
 298metal io region offset<->phy to support the OS which has function to do
 299this conversion;
 300interrupt API update to separate IRQ controller implementation and
 301device driver interrupt handling.
 302
 303axiethernet_v5_9:
 304In tcl use unique global variables to fix bsp generation for certain designs.
 305
 306canfd_v2_1:
 307Update fifo number to read data from RX FIFO 0 or RX FIFO 1
 308Fix incorrect setting of data phase buad rate prescaler
 309
 310csudma_v1_4:
 311Adds PSU_PMU processor check to skip the Flushing cache memory and Invalidating
 312cache memory API's for PMU Microblaze platform.
 313Add support for versal IP name.
 314
 315emaclite_v4_4:
 316Fix poll example failure on microblaze platform.
 317
 318emacps_v3_9:
 319Add support for RX watermark
 320Update example for versal emulation
 321Use selected speed in loopback mode
 322Fix MDC divisor for versal emulation
 323Fix BD memory allocation and its attributes
 324Fix alignment pragmas for IAR compiler.
 325
 326freertos10_xilinx_v1_3:
 327Declared attribute of vApplicationAssert() as weak in
 328portZynqUltrascale.c for A53. It fixes CR#1014562
 329Upgraded FreeRTOS to new version 10.1.1 (PR#10686)
 330Provided feature for stream buffer and message buffer.(PR#10459)
 331Add support for hard float in R5 freertos adapter.
 332
 333hwicap_v11_2:
 334Updated the Number of words per frame as mention in the ug570.
 335Removed .o referenced function prototypes from the header file.
 336
 337iicps_v3_9:
 338Added arbitration lost support in polled transfer
 339
 340ipipsu_v2_5:
 341Make IPI driver common for both ZynqMP and Versal platforms.
 342Add extern c macro.
 343Fix the ipis without buffer.
 344Add versal IP name support.
 345
 346llfifo_v5_3:
 347Fix poll and interrupt examples receive programming sequence.
 348
 349lwip211_v1_0:
 350Upgrade lwip to open source version 2.1.1
 351Fix cache handling in RX path for GEM.
 352Fix freertos echo server compilation on emaclite platform.
 353Pick correct compiler for R5.
 354Update lwip examples to be in sync with new xilffs.
 355Add IEEE1588 byte padding for PL Ethernet.
 356Add support for versal IP name.
 357Fix GCC warnings in emaclite adapter source.
 358Fix xemacliteif_input() for freertos multi-packet scenario.
 359
 360ospipsv_v1_0:
 361First Release.
 362Fixed data alignment issues on IAR compiler.
 363
 364qspips_v3_6:
 365Fixed memory leak issue while reading from qspi.(CR#1016357)
 366Modified APIs,to wait for the on going operation to complete
 367before performing the next operation.
 368Modified the mask in XQspiPs_GetReadData() API to retrieve
 369configuration register values of both the Flashes in dual parellel mode.
 370
 371prc_v1_2:
 372Updated the tcl logic to generated the XPrc_ConfigTable properly.
 373
 374qspipsu_v1_9:
 375Resolved MISRA-C:2012 violations in safety mode(CR#1014359)
 376Clear DMA_DST_ADDR_MSB register properly
 377Added idling support.
 378Set recommended clock and data tap delay values for 40MHZ,
 379100MHZ and 150MHZ frequencies(CR#1023187)
 380Fixed warnings in the application.
 381Fixed data alignment warnings on IAR compiler(CR#1025530)
 382Fixed compilation error in lqspi example on IAR compiler.
 383
 384scugic_v4_0:
 385Update get_psu_interrupt_id proc to return multiple interrupt IDs
 386CR#100266.
 387Updated get_psu_interrupt_id proc, to fix interrupt id
 388computation for vectored interrupts. It fixes CR#998583.
 389Updated get_concat_number proc to avoid executing
 390get_pins command twice. It fixes CR#1028356
 391
 392sdps_v3_7:
 393Add SDPS idling support
 394Added support for versal SD IP name
 395Add support for Cache Invalidation after the DMA is complete
 396Add UHS mode support for Microblaze platform
 397Disable calls to dll_reset APIs for versal platforms
 398Fix data alignment on IAR compiler
 399
 400spips_v3_2:
 401Resolved MISRA-C:2012 violations in safety mode(CR#1016116)
 402Added versal support
 403
 404standalone_v7_0:
 405Includded stddef.h and stdint.h in xbasic_types.h
 406xparameters_ps.h- Added interrupt id for usbpsu
 407Added XST_NO_ACCESS status macros for generic access error.
 408Updated Xil_MemCpy API to copy two bytes at a time from source to destination if byte count is <= 2.
 409Added support for Versal.
 410Added armclang complier support to the Cortexa53 64 bit BSP.
 411Fix microblaze_disable_dcache for 64 bit microblaze
 412Added frequently used functions in common area in xil_utils.c, so that other
 413modules can make use of it.
 414
 415ttcps_v3_8:
 416Modified in XTtcPs_ClearInterruptStatus function to clear
 417interrupt status register by reading instead of writing it.
 418
 419wdttb_v4_4:
 420Fixed compiler warning.
 421Fixed MISRA-C violations.
 422Added Versal support.
 423
 424xilffs_v4_1:
 425Add additional LFN options in mld.
 426Add support to enable use of CHMOD functionality.
 427Change the argument type to int for length of string.
 428Added support for versal SD IP name
 429Fix data alignment on IAR compiler
 430
 431xilflash_v4_6:
 432Fixed compilation errors for application with xilflash(CR#1018603)
 433
 434xilfpga_v5_0:
 435Optimize the delays in the PS-PL resets path.
 436Optimize the execution time for Image validation.
 437Remove redundant API's from the interface agnostic layer and make the
 438existing API's generic.
 439Optimize the bitstream validation logic for Non-secure bitstream Images.
 440Fixed PL power-up issue with pmufw.
 441Updated the data handling logic to avoid the code duplication.
 442Fixed PS-PL resets handling issues.
 443Removed SecureIV shared variable dependency and updated the secure Iv
 444handling logic.
 445Added CSUDMA address alignment check.
 446Fixed MISRA-C violations.
 447Removed vesal platform related changes.As per the new design, the Bitstream
 448loading for versal platform is done by PLM based on the CDO's data exists in
 449the PDI images. So there is no need of xilfpga API's for versal platform to
 450configure the PL
 451Read the return status of the functions in xilfpga_pcap.c
 452
 453xilisf_v5_13:
 454Declare XQspiPsu_Msg instance as global.
 455Fixed multiple definition error in C++ project.
 456Added support for OSPI flash interface.
 457Added support for SST26WF016B flash.
 458Used 3Byte Sector erase and write commands for QSPI Micron flashes.
 459
 460xilskey_v6_7:
 461Updated makefile to support ARMCC and IAR compiler
 462Fixed compilation warnings/errors for ARMCC and IAR
 463Fixed MISRAC violations
 464Added assert conditions for input parameters.
 465Updated xilskey_efuseps_zynqmp_input.h
 466 - Documentation of AES key
 467 - Added macro XSK_EFUSEPS_CHECK_AES_KEY_CRC for AES CRC
 468   check which is to be updated by user.
 469 - Removed PPK0/1 SHA2 hash programming support
 470Added example for PUF regeneration.
 471Handled PUF underflow issue
 472TCL file is updated to copy only required files to ZynqMP project.
 473Updated functions return status variables to default XST_FAILURE
 474For Microblaze devices added GPIO selection based on the design.
 475Added support for SSIT devices on microblaze.
 476
 477xilsecure_v4_0:
 478Code was made compatible with MISRAC rules
 479RSA memory is zeroized after evey RSA operation.
 480Updated AES error codes.
 481AES engine in set under reset after use
 482Data is zeroized after GCM tag mismatch
 483SHA3 engine is held in reset after use
 484DMA status registers are cleared after transfer is done
 485Updated assert statements
 486Secure image load errors out if bootgen image is not at the specified location
 487Renamed global variables used in xsecure.c
 488Deprecated SHA2 support
 489Refactored code, now the library has three folders zynqmp, versal and common
 490Added support versal
 491Deprecated XSecure_RsaDecrypt call, updated with XSecure_RsaPublicEncrypt()
 492Added state machines into the library for RSA, AES and SHA
 493Added IAR support
 494Added tmeouts for the loops
 495Modified return status variables to XST_FAILURE by default
 496XSecure_Sha3Finish is updated with error condtion if padding is wrongly selected
 497Updated Xsecure.c and xsecure.h files to fix IV size, made csudma as
 498static variable added an API to give csudma pointer to xilfpga.
 499
 500xxvethernet_v1_2:
 501In tcl use unique global variables to fix bsp generation for certain designs.
 502
 503axidma_v9_9:
 504examples- Fix use of #elif check in deriving DDR_BASE_ADDR.
 505Fix XAxiDma_BdRingFromHw implementation for cyclic mode.
 506In sgcyclic example wait for both tx and rx done counters.
 507
 508usbpsu_v1_5:
 509Add usb controller idiling support to usbpsu driver
 510Add new example for usb polling mode
 511Modify xusbpsu_wrapper.c file for issuing XUsbPsu_Ep0StallRestart() for EP0
 512Updated usbpsu.tcl to fix the logic for generating SUPER_SPEED paramter
 513Add versal platform support to usbpsu driver
 514Add support for versal usb IP name
 515Update copyright year for usbpsu files
 516Updated index.html and readme.txt files in the usbpsu examples
 517Enable hibernation API's only when XUSBPSU_HIBERNATION_ENABLE is defined
 518Fixed MISRA-C mandatory violations
 519Fix incorrect dma_alignment pragma directive for IAR workbench
 520
 521mcdma_v1_3:
 522In mcdma examples remove snoop enable and dependency on HPC_DESIGN macro.
 523In driver tcl enable CCI only for EL1 non-secure state.
 524Create channel submit variant to program additional BD fields.
 525Add HasRxLength field in config and channel structure.
 526
 527xilmailbox_v1_0:
 528Initial Release.
 529Updated mld supported peripheral option with A72 and PMC.
 530
 531zdma_v1_7:
 532Add support for versal IP name.
 533Update writeonly mode example to support versal IP.
 534Fix alignment pragmas for IAR compiler.
 535Rename the dma buffers in the xzdma_simple_example.c file
 536to avoid peripheral test compilation errors with armclang compiler.
 537
 538cpu_cortexr5_v1_5:
 539Create a new version of cortex r5 CPU driver to add support for hard
 540float.
 541
 542coresightps_dcc_v1_5:
 543Fixed MISRA C Mandatory Violations CR#1025101.
 544
 545xilmfs_v2_3:
 546Deprecate the XilMFS Library
 547
 548usbps_v2_4:
 549Fix incorrect dma_alignment pragma directive for IAR workbench
 550
 551zynqmp_fsbl:
 552Added dual parallel configuration support and QPI support for 24bit qspi boot
 553mode for Macronix flash parts
 554AES engine and SHA engine are reset during FSBL initialization
 555Zeroize PL upon error in decryption
 556Remove sha2 support from FSBL
 557Always select EEPROM lower page for reading SPD data
 558Dynamic DDR configuration is strictly based upon the design for all boards
 559including ZCU102 and ZCU106
 560Added support for armclang compiler
 561Removed disabling of the WDT error before exiting FSBL to avoid overwriting of
 562the PMU settings
 563Updated PMU with FSBL running status using bits 1 and 2 from PMU global
 564general purpose register 5
 565DDR end address is not fixed at 2GB but derived from Vivado
 566Using XilPM XPm_SetConfiguration API instead of using direct IPI calls for
 567communicating with PMUFW.
 568
 569xilpm_v2_4:
 570Add checksum support for IPI data
 571Misra C fixes in XilPm
 572Support for IAR compier
 573Deprecated PM_SECURE_RSA_AES
 574
 575zynqmp_pmufw:
 576Store and restore LPD SLCR_SECURE registers during POS.
 577Idle nodes only once even if they are assigned to multiple masters.
 578Add support to idle and reset all twelve TTCs.
 579Misra C fixes in PMU Firmware.
 580Set LPD WDT error action after FSBL completion as FSBL disables before
 581exiting.
 582Store FSBL to reserved DDR and restore before performing APU-only restart.
 583Added missing cpp protection macros to the PMU header files.
 584Update to XilFPGA APIs to support latest 5.0 version.
 585Validate reason for abort suspend.
 586Fix CRC checksum related issues in IPI messaging.
 587Added permission check for modifying error actions over IPI.
 588Creat custom FSM handler for GPU nodes to handle the states of PP0 and PP1.
 589Bypass DDR related code if DDR is not present in the design.
 590Check for parent node in PmSlaveGetWakeUpLatency to avoid access to invalid
 591memory.
 592Bypass DDR ECC poll if DDR ECC is not enabled.
 593Register handler and trigger FW error when Assert occurs.
 594Add hook for custom module in PMU Firmware.
 595Check for NULL before calling get reset status operations to avoid access to
 596invalid memory.
 597Add handler for EMIO get reset status.
 598Leave MIO34 tristated and connect to PMU GPO only when it need to be driven.
 599low when user configures through macros.
 600Handle PLL lock errors during PLL reset.
 601Remove APU access to LPD WDT clock register over MMIO read/write.
 602Added PMU RAM ECC error injection STL during startup.
 603Disabled the error actions once before processing the ActionId.
 604Fixed DDR_reinit incorrectly checks for PLL lock on unused PLLs.
 605Add check for no of users for vpll.
 606Add support for Ultra96 power button.
 607
 608gpiops_v3_5:
 609Fixed MISRA-C suggested violations.
 610Added support for Versal.
 611Removed platform specific example and added that support in default file.
 612
 613Changes for 2018.3.1
 614===============================
 615rfdc_v5_1:
 616Now get maximum FS from IP.
 617Determinig ADC Type now on a per-tile basis.
 618The wrong fabric rate was being used for a 2GSPS ADC at a
 619decimation rate of 8.The wrong fabric rate was being used
 620for a 2GSPS ADC at a decimation rate of 8.
 621The paramater "DataType" is now "MixerInputDataType".
 622Added APIs to set and get IM3 Dither.
 623
 624Changes for 2018.3
 625===============================
 626dp12_v7_0:
 627Display port 2017.4 core drivers are renamed.
 628
 629dp12rxss_v4_2:
 630Display port 2017.4 receiver subsystem drivers are renamed.
 631Fixed application compilation errors.
 632
 633dp12txss_v5_1:
 634Display port 2017.4 transmitter subsytem drivers are renamed
 635Fixed application compilation errors.
 636
 637dp14_v7_1:
 638Display port 2018.1 core drivers are renamed.
 639Updated the channel equivalization sequence.
 640Updated to pass the complaince tests.
 641
 642dp14rxss_v5_1:
 643Display port 2018.1 receiver subsystem drivers are renamed.
 644Removed the dp12 applications.
 645Added support to new application examples.
 646
 647dp14txss_v6_1:
 648Display port 2018.1 transmitter subsystem drivers are renamed.
 649Removed the dp12 applications.
 650Addeed support to new application examples
 651
 652v_scenechange_v1_0:
 653Initial release for SceneChange IP.
 654
 655v_mix_v5_0:
 656Modified existing Stop API for flush feature.
 657
 658v_frmbuf_wr_v4_0:
 659Added new API, This API is used to wait for IP to enter into idle state.
 660Modified existing Stop API to support Flushing feature.
 661
 662v_frmbuf_rd_v4_0:
 663Added new API, This API is used to wait for IP to enter into idle state.
 664Modified existing Stop API to support Flushing feature.
 665
 666i2stx_v2_0:
 667This patch has 2 new APIs, one API is to enable the justification and 
 668the other one is to set Left or Right justification.
 669
 670i2srx_v2_0:
 671This patch has 2 new APIs, one API is to enable the justification and 
 672the other one is to set Left or Right justification.
 673
 674
 675v_hdmitxss_v5_2:
 676Added I2S, Repeater and Repeater Professional applications.
 677Repeater functionality is disabled in the applications by default.
 678Added log for video bridge unlocked.
 679Fixed Video Masking Feature.
 680
 681v_hdmitx_v2_2:
 682Fixed HPD and toggle to support different AXI-Lite frequency.
 683Added Overflow and Underflow (Video Bridge) Interrupt.
 684
 685v_hdmirxss_v5_2:
 686Added I2S, Repeater and Repeater Professional applications.
 687Repeater functionality is disabled in the applications by default.
 688XV_HDMIRXSS_HDCP_1_PROT_EVT, XV_HDMIRXSS_HDCP_2_PROT_EVT events are deprecated.
 689Added TMDS Clock Ratio callback support.
 690
 691v_hdmirx_v2_2:
 692Fixed SDK GCC warning message issue.
 693Added TMDS Clock Ratio callback support.
 694
 695vphy_v1_8:
 696Updated CDR values for DP in xvphy_gtye4.c
 697Removed deprecated APIS: XVphy_DrpWrite and XVphy_DrpRead
 698Added/Moved APIs XVphy_SetTxVoltageSwing and XVphy_SetTxPreEmphasis from xvphy_i.c/h
 699Added XVphy_SetTxPostCursor API in xvphy.h
 700
 701freertos10_xilinx_v1_2:
 702Updated FreeRTOS tcl to add -hier option while using get_cells command.
 703It fixes CR#1011395.
 704Added Xilinx copyright to files containing xilinx code
 705and retain FreeRTOS license text as-is. Also, added
 706FreeRTOS copyright in porting files which uses FreeRTOS
 707code, wherever it is missing.
 708
 709hdcp1x_v4_2:
 710Addded hdcp14_PropagateTopoErrUpstream flag to track topology failures and ready the topology for the repeater application to read.
 711Updated the XHdcp1x_TxPollForWaitForReady function to ready topology in case of a topology error, and make it available in XHdcp1x_TxGetTopology().
 712Updated the XHdcp1x_TxReset() to clear the Authentication Request flag.
 713Updated XHdcp1x_PortHdmiRxDisable function to clear KSV_FIFO.
 714
 715sysmonpsu_v2_5:
 716Fixed Cppcheck warnings
 717Modified code for MISRA-C:2012 Compliance.
 718
 719sysmon_v7_5:
 720Added Example for Vaux external channels
 721
 722axidma_v9_8:
 723Fix cppcheck, gcc and doxygen warnings.
 724Added 64 bit DMA addresses support for Microblaze-X
 725
 726can_v3_3:
 727Fix cppcheck and GCC warnings.
 728
 729canfd_v1_3:
 730Fix cppcheck, gcc and doxygen warnings.
 731Changed the Canfd ID with 11 bit value.
 732Fixed Selftest Hang issue (CR#1009802)
 733
 734canfd_v1_3:
 735Fix cppcheck, gcc and doxygen warnings.
 736Changed the Canfd ID with 11 bit value.
 737
 738canfd_v2_0:
 739Added support for canfd 2.0 spec regarding PL
 740SoftIP.
 741
 742emacps_v3_8:
 743Fix cppcheck, GCC and doxygen warnings.
 744Remove duplicate code in xemacps_bd.h
 745Fixed PTP interrupt masks and cleaned up comments.
 746Fix warning in example for redefinition of interrupt number.
 747Added 64 bit DMA addresses support for Microblaze-X
 748Add support for Versal IP name.
 749
 750gpiops_v3_4:
 751Resolved cppcheck warnings.(CR#1006331)
 752Resolved MISRA-C mandatory violations.(CR#1007751)
 753
 754sdps_v3_6
 755Fixed Cppcheck, Doxygen and gcc warnings (CR#1006375)
 756Add initializer macro for HasEMIO
 757Add support for using 64Bit DMA in 32Bit Processor
 758Add cache invalidation call before returning from ReadPolled API
 759Resolve compilation warnings for ARMCC toolchain
 760Change Expected Response for CMD3 to R1 for MMC
 761Added 64 bit DMA addresses support for Microblaze-X
 762
 763xilffs_v4_0:
 764Upgraded the FatFS version to 0.13b
 765Fix Cppcheck and Doxygen warnings
 766Modify sector buffer alignment to that of cache line supported
 767SD Example - Change file size to 8MB from 8KB for ZynqMP platform
 768Modify tcl file to create FILE_SYSTEM_INTERFACE_SD in xparameters.h only once
 769if there are multiple instances of SD
 770Add Word Access support in latest FatFS source
 771Update the bug fixes on 0.13b FatFS
 772
 773clockps_v1_0:
 774First release of clocksPS drivers.
 775Fix Doxygen and coverity reported issues.
 776
 777lwip202_v1_2:
 778Add mcdma support and handle IEEE_1588 for AXI Phy in ethernet header.
 779Add AXI 2.5G Ethernet support.
 780Fix axiethernet apps build error by removing dependency on HSI get_connected_intr_cntrl API output.
 781Fix copyrights.
 782In tcl update get_cells API argument to support hierarchical designs.
 783Fix warning for redefining BYTE_ORDER
 784
 785lwip_echo_server:
 786Fix warning in iic phy reset in lwip echo server.
 787Fixed gcc compilation warning for zynqmp platform.(CR#1011020)
 788
 789mcdma_v1_2:
 790Add API XMcdma_LookupConfigBaseAddr() to lookup config by base address.
 791Add XMcdma_BdSetSwId() and XMcdma_BdGetSwId() macro to access SW ID field in BD.
 792Export XMcdma_BdChainFree() and XMcDma_BdSetAppWord() APIS to use from LwIP contrib source.
 793Read num channels from IP configuration.
 794Fix gcc warning.
 795Remove unused define for buffer length mask(XMCDMA_BD_LEN_MASK).
 796Fix typos and rephrase comment description.
 797Read buffer length register width from IP config.
 798In driver tcl update get_cells API to support hierarchical designs.
 799Added 64 bit DMA addresses support for Microblaze-X
 800
 801nandpsu_v1_5:
 802Added 64 bit DMA addresses support for Microblaze-X.
 803Updated driver source code to fix compilation warnings.
 804
 805cpu_v2_8:
 806Added Os and LTO settings in extra compiler flags for PMU BSP
 807
 808iicps_v3_8:
 809Fix for Cppcheck and Doxygen warnings.
 810Add timeout interrupt in master mode.
 811
 812intc_v3_8:
 813Updated check_cascade proc, to add check
 814for irq_in pin.It fixes CR#1005371
 815
 816iomodule_v2_6:
 817Updated driver tcl to replace get_cells -of_object with get_cells -of_objects.
 818Added support for 64 bit vector address.
 819
 820tmr_inject_v1_1:
 821Added support for 64 bit fault address.
 822
 823qspips_v3_5:
 824Fixed compilation warnings for ARMCC.
 825Added support for the low density ISSI flash parts.
 826
 827qspipsu_v1_8:
 828Added support for IS25LP064 and IS25WP064.
 829Added an example for accessing 64bit dma within 32 bit application.(CR#1004701)
 830Removed checkpatch warnings for xqspipsu.c and xqspipsu.h
 831Removed the mentions of Spansion flash from BlockErase API. (CR#1006247)
 832Fixed cppcheck, doxygen and gcc warnings. (CR#1006336)
 833Setup64BRxDma() should be called if the RxAddress is greater than 32 bit address space. (CR#1006862)
 834Added support for low density ISSI flash parts
 835Fixed the code in XQspiPsu_GenFifoEntryData() for data transfer length up to 255 for reducing the extra loop.
 836Fixed compilation warnings.
 837Added 64 bit DMA addresses support for Microblaze-X.
 838
 839rfdc_v5_0:
 840Update DAC min sampling rate to 500MHz and also update VCO Range, PLL_DIVIDER and PLL_FPDIV ranges.
 841Add XRFdc_GetFabClkOutDiv() API to read fabric clk div.
 842Add Inline APIs XRFdc_CheckBlockEnabled(), XRFdc_CheckTileEnabled().
 843Add support to dump HSCOM regs in XRFdc_DumpRegs() API.
 844Fixed Multiband crossbar settings in C2C mode.
 845Add MixerType member to MixerSettings structure and Update Mixer Settings APIs to consider the MixerType variable.
 846Add inline APIs XRFdc_CheckDigitalPathEnabled(), XRFdc_IsADCDigitalPathEnabled() and XRFdc_IsDACDigitalPathEnabled().
 847Add XRFdc_GetMultibandConfig() API to read Multiband configuration.
 848Update the APIs to check the corresponding section(Digital or Analog)enable.
 849Fixed MISRAC, Doxygen and coverity warnings.
 850Check for Block0 enable for tiles participating in MTS.
 851Update the clock reset sequence.
 852Updated driver and examples, to remove the xparameters.h
 853dependency for Linux platform.
 854Modified phasecorrection factor as per  QMC Phase
 855correction factor range in driver.
 856Move mixer related APIs to xrfdc_mixer.c file.
 857Remove __MICROBLAZE__ defines and use libmetal interface for Microblaze.
 858Reorganize the code (like adding macros for constants, add asserts for Linux, create static APIs, adding brief comments
 859etc) to improve readability and optimization.
 860Update powerup-state value based on PLL mode in XRFdc_DynamicPLLConfig() API.
 861Check for DigitalPath enable in XRFdc_GetNyquistZone() and XRFdc_GetCalibrationMode() APIs for Multiband.
 862Add support to read the REFCLKDIV param from design.
 863Update XRFdc_SetPLLConfig() API to support range of REF_CLK_DIV values(1 to 4).
 864Corrects the Block_Id used for QMC event in IQ datatype in XRFdc_UpdateEvent() API.
 865Add XRFDC_MIXER_MODE_R2R option to support BYPASS mode for Real input.
 866
 867scugic_v3_10:
 868Updated get_psu_interrupt_id to generate correct
 869interrupt id's, when output of utility reduced logic
 870is connected to pl-ps interrupt as well as ILA probe.
 871Fix for CR#999732.
 872Updated source files to fix warings reported by 
 873coverity, checkpatch and doxygen. It fixes
 874CR#1006344.
 875Resolves MISRA-C:2012 mandatory violations.
 876It fixes CR#1007753.
 877Fix GCC,cppcheck and doxygen warnings in driver
 878and example. It fixes CR#1006344 and CR#1010947.
 879Update scugic tcl to add -hier option while
 880using get_cells command. It fixes CR#1011395.
 881Updated get_psu_interrupt_id proc to return multiple
 882interrupt ID's, in case if specific interrupt port of
 883PL based IP is connected to the pl_ps_irq0 as well as
 884pl_ps_irq1 directly or through same concat block pin.
 885Fix for CR#100266.
 886Updated get_psu_interrupt_id proc, to fix interrupt id
 887computation for vectored interrupts. It fixes CR#998583
 888
 889tmrctr_v4_6:
 890Updated driver examples to call TmrCtrDisableIntr
 891API with the correct arguments. It fixes
 892CR#1006251.
 893Fixed several checkpatch errors/warnings in
 894interrupt examples.
 895
 896xilisf_v5_12:
 897Added support for IS25LP064A and IS25WP064A.
 898Removed the check for address to be non zero and
 899Added check for Spansion flash before proceeding to quad mode read (CR#1002769)
 900Added support for Macronix 1G flash parts. (CR#978447)
 901Removed checkpatch and GCC warnings.
 902Added support for MT25QL01G flash from Micron (CR#1004264)
 903Updated the library notes for Micron flash parts. (cr#973229)
 904Added support for the low density ISSI flash parts. (PR#9237)
 905Fixed the compilation warnings for ARMCC compiler. (CR#1008307)
 906
 907xxvethernet_v1_1:
 908Update tcl to find mcdma from design and add cannonical macro in xparameters.h and update topology in xxxvethernet_g.c accordingly.
 909Add API XXxvEthernet_LookupConfigBaseAddr(UINTPTR Baseaddr) to lookup config by base address.
 910Add Macro XXxvEthernet_IsMcDma(InstancePtr) to check Mcdma is connected or not.
 911Fix error generating bsp sources for xxv+axidma design.
 912Fix interrupt ID generation for ZynqMP designs.
 913
 914Resetps_v1_2
 915Fixed compilation warnings in resetps driver
 916Fixed Doxygen reported warnings
 917
 918rtcpsu_v1_7
 919Modified logic to get the last day of month correctly.(CR#1004282)
 920Removed Checkpatch warnings.
 921Resolved cppcheck and doxygen warnings.
 922Resolved MISRA-C mandatory violations.(CR#1007752)
 923Fixed compilation warnings.
 924Added Versal support & Fixed MISRA-C violations.
 925
 926usbpsu_v1_4
 927Fixed the errors which occur when tested with IAR compiler
 928Added the new examples into mss file
 929Add support for connecting to host in high-speed
 930
 931uartps_v3_7:
 932Resolved MISRA-C mandatory violations.(CR#1007755)
 933
 934xilfpga_v4_2
 935Refactor the xilfpga library to support different PL programming Interfaces.
 936Added support for readback of PL configuration data.
 937Added Support to load the vivado generated .bit and .bin files.
 938Added example for loading partial reconfiguration bitstreams.
 939Modified the PL data handling Logic to support different PL programming interfaces.
 940Added support for unaligned bitstream programming.
 941Fixed issues with secure partial bitstream loading.
 942
 943standalone_v6_8:
 944Fixed compilation warnings in xil_cache.c.(CR#1005118)
 945Optimized the code in Xil_DCacheFlush() and Xil_DCacheFlush() in xil_cache.c for A53-32.
 946Modified the return value of Xil_MemMap() as pointer instead of address of pointer in xil_mpu.c(CR#1005119)
 947Updated Cortexa9 translation table to mark DDR memory as inner cacheable,
 948if BSP is built with the USE_AMP flag. It fixes CR#1006745.
 949Modified code in xil_printf.c to print u64 varibales in
 95032 bit processor.It fixes CR#1007207
 951Optimized the code to use a single function and removed
 952code redundancy in xil_printf.c . It Fixes CR#1009654.
 953Updated cache APIs and inline assembly macros in microblaze BSP to support
 95464 bit addresses.
 955Fix issues in A53 32 bit cache APIs for Xil_DCacheFlush and Xil_DCacheInvalidate. This fixes CR:1016012.
 956
 957axivdma_v6_6:
 958Added support for vertical flip programming.
 959
 960axicdma_v4_5:
 961Include missing initializers for 'XAxiCdma_Config' fields.
 962Fix cppcheck warning.
 963Fix gcc warning in peripheral test application.
 964Fix SG interrupt example compilation error when driver DEBUG mode is enabled.
 965In SG interrupt example reset error and done states for each DMA transfer.
 966Fix typos in peripheral app generation tcl.
 967
 968zynqmp_pmufw:
 969Fix GEM RXQ high pointer in case of WOL
 970Fix read of pmu global gen storage reg5
 971Added support for PL configuration readback
 972Refactor xilfpga APIs to support different PL programming interfaces
 973Return error for invalid event ID for register notifier API
 974Remove unsupported error condition event from register notifier
 975Check for event handler registration before dispatching the event
 976If AIB acknowledgment is not received for DDR the PMU should not return
 977failure
 978AIB should be enabled before FPD power down
 979Fix conditional compilation for ENABLE_NODE_IDLING code
 980Return acknowledgment if EEMI API ID is invalid
 981Remove redundant PM API argument checks which are in pm_api.c/h as its already
 982performed by API implementation
 983Fix bug in QSPI node idling
 984Change clock active checker to look for any clock to be active
 985Idle peripherals before PS and system in warm restart
 986Return failure if user sends AMS_REF_CLOCK mmio_write call
 987PMU Firmware support for AES encryption and decryption
 988Use reserved location of DDR to store training data
 989Put DDR in self refresh before warm-restart
 990Optimize power management code to save memory
 991Start FPD WDT only when FSBL execution completes since FSBL also uses it
 992Remove redundant code from restart functionality
 993Remodel clock infrastructure to support clock EEMI APIs
 994Implement clock set/get parent EEMI APIs
 995Implement clock enable, disable and get start EEMI APIs
 996Implement clock set/get divider EEMI APIs
 997Implement PmClockIsActive behavior
 998Implement PLL set/get parameter EEMI APIs
 999Implement PLL set/get mode EEMI APIs
1000Add CSU/PMU global register access via MMIO calls
1001Skip TTC3 reset while recovery enabled
1002Put RPU1 in forced off state in lockstep mode
1003Power down TCM during force powerdown of RPU
1004Force powerdown unused RPU cores
1005Add support to set restart scope during WDT restart
1006PMU Firmware support for eFUSE access
1007Power down unused RPU after other master calls PmInitFinalize
1008Enable unused RPU power down functionality by default
1009Implement pin mux control functionality in PMU
1010Release requirements of RPU1 in PmInitFinalize
1011Disable eFUSE access functionality by default in PMU
1012
1013axipmon_v6_7:
1014Fix Doxygen reported warnings.
1015
1016zynqmp_fsbl:
1017Fix write on pmu global gen storage reg5
1018Add support to ISSI 8Mb, 16Mb and 32Mb flash parts
1019Add support to DDR self refresh during PS only reset and APU only reset
1020Add support for dynamic DDR controller configuration
1021FSBL should fall back after WDT timer gets expired
1022WDT should be untouched by FSBL during APU only restart
1023Mark RPU cores as usable in FSBL depending on wheter RPU partitions are
1024present are not
1025Mark both RPU cores as usable for JTAG boot mode
1026Added support to use Macronix flash in QPI mode
1027FSBL should not abort execution if FMC card is not plugged in
1028Caches should be flushed out before applying protection config in ZynqMP FSBL
1029
1030csudma_v1_3:
1031Fix Doxygen reported warnings
1032Fixed misra-c required standard violations.
1033
1034xilflash_v4_5:
1035Fixed compilation errors for ARMCC compiler(CR#1008306)
1036
1037zdma_v1_6:
1038Fix Doxygen, cppcheck and coverity reported warnings.
1039Fixed MISRA-C mandatory violations.(CR#1007757)
1040
1041axiethernet_v5_8:
1042Fix cppcheck and gcc warnings.
1043Update tcl to improve error message for non-supported designs.
1044Fix interrupt ID generation for ZynqMP designs.
1045In SG axidma interrupt example, fix 'committing RxBD to HW' error.
1046
1047wdtps_v3_1:
1048Fix interrupt ID conflict issue in example.
1049
1050ipipsu_v2_4:
1051Fix Doxygen reported warnings.
1052Fix Gcc warnings.
1053
1054zynq_fsbl:
1055Added code to check EFUSE_SEC_EN bit and force encryption.
1056
1057sdi_common_v1_1:
1058Moved SDI specific timing from video common to SDI driver
1059
1060v_sditx_v2_0:
1061Using SDI specific timing from SDI common driver
1062Fix compilation warnings
1063Change driver version
1064Add ST352 insertion on C-Stream
1065
1066v_sditxss_v3_0:
1067Fix compilation warnings
1068Change driver version
1069Added field1 vactive size programming for SD NTSC resolution
1070Add ST352 insertion on C-Stream
1071Added pixco example for Import Examples in SDK GUI
1072Updated Copyright
1073Implemented formatting changes in Pixco Example Design
1074Example design application for UHDSDI Tx subsystem with PIXCO module
1075Removed the unused API that reports subcore version numbers
1076Corrected the SD NTSC mode resolution
1077
1078v_sdirx_v1_3:
1079Add support for ST352 in C-Stream
1080Using SDI specific timing from SDI common driver
1081Corrected the SD NTSC mode resolution
1082
1083video_common_v4_5:
1084Corrected the vertical timing parameters
1085Add support for new video mode XVIDC_VM_720x486_60_I
1086
1087v_tpg_v8_1:
1088Add support for interlaced mode and polarity
1089
1090vtc_v8_0:
1091Removed hard coded programming of register XVTC_GASIZE_F1_OFFSET
1092Corrected the timing parameters for VGA (640x480) resolution
1093Added new register Added new register XVTC_GASIZE_F1_OFFSET
1094
1095v_vscaler_v3_0:
1096Fix for 64-bit addressing support
1097
1098v_hscaler_v3_1:
1099Fix for 64-bit addressing support
1100
1101v_multi_scaler_v1_0:
1102Initial version of Multi Scaler IP
1103
1104audio_formatter_v1_0:
1105Initial version of Audio Formatter IP
1106
1107sdiaud_v2_0:
1108Add 32 channel support.
1109Add support for channel status extraction logic both on embed and extract side.
1110Add APIs to detect group change, sample rate change, active channel change.
1111
1112xilsecure_v3_2:
1113Added error if input data is greater than key modulus while performing
1114RSA private decryption
1115Added support for SHA to accept data, if data is/isn't 4 bytes aligned,
1116if address is/isn't not word aligned and no restrictions for data size.
1117Removed conditional compilation for PMU in xsecure.c and xsecure.h
1118Fixed compilation warnings
1119Added supportive APIs to encrypt/decrypt the data blobs from Linux/U-boot
1120Added support to clear user key after use
1121
1122xilskey_v6_6:
1123Modified PUF example's macro names
1124Fixed armcc compiler errors
1125Added supportive APIs to program efuse from Linux via smc calls
1126Added support for PUF regeneration
1127Fixed compilation warnings
1128Added doxygen tags
1129
1130Changes for 2018.2
1131===============================
1132freertos10_xilinx_v1_1:
1133Updated licensing information as per Freertos 10.0
1134
1135standalone_v6_7:
1136Fixed compilation warnings in xil_sleeptimer.c
1137Added API Xil_GetExceptionRegisterHandler.
1138
1139v_hdmirxss_v5_1:
1140Fixed a bug in XV_HdmiRxSs_BrdgOverflowCallback
1141Cleaned up the flow during HPD during the transition from HDMI 2.0 to HDMI 1.4
1142Updated application's EDID and udpated XV_ConfigTpg and EnableColorBar
1143
1144v_hdmitxss_v5_1:
1145Updated application's EDID and udpated XV_ConfigTpg and EnableColorBar
1146
1147v_hdmirx_v2_1:
1148Fixed a bug in PioIntrHandler
1149
1150video_common_v4_4
1151Fixed EDID parsing hanging issue
1152Fixed timing parameters for 720p24, 720p25 and 720p30
1153Removed dependency of math.h library from video_common's EDID parser
1154
1155v_hdmi_common_v1_1:
1156Fixed XV_HdmiC_ParseAudioInfoFrame on SampleFrequency and SampleSize parsing
1157
1158cpu_v2_7:
1159Replaced post_generate with post_generate_final.
1160This change has been made to make sure that "#endif"
1161in xparameter.h is placed at the end of file.
1162Updated generate proc to set HW based compiler flags,
1163earlier it was being done by HSI.It fixes CR#999895.
1164
1165i2srx_v1_1:
1166Changed log APIs so that they take the i2srx instance as argument.
1167Changed the channel status clear API to cover all the registers.
1168
1169i2stx_v1_1:
1170Changed log APIs so that they take the i2stx instance as argument.
1171Changed the channel status clear API to cover all the registers.
1172
1173iicps_v3_7:
1174Changed Eeprom scanning code with the dynamic Eeprom scanning code
1175from other examples. (CR#997545)
1176Changed the data packing code as per the other examples.
1177
1178rfdc_v4_0:
1179Add XRFdc_MTS_Sysref_Config API to enable/disable sysref.
1180Update max VCO value to 13108MHz to support max DAC sample rate of 6.554MHz.
1181Add macro to configure Threshold OFF mode.
1182Adjust calculated latency by sysref period, where doing so results in closer alignment to the target latency.
1183Corrected Set/Get MixerSettings API description for FineMixerScale parameter.
1184Enable VCO Auto selection while configuring the clock.
1185Add XRFdc_GetPLLConfig() API to get PLL Configurations.
1186Add XRFdc_GetLinkCoupling() API to get the Link Coupling mode.
1187Add clock configuration files for ZCU111 in examples.
1188Updated the lmk configuration to support different revisions of zcu111
1189Added support for configuring lmx 5.12GHz
1190Removed CalibrationMode check for DAC in XRFdc_GetMixerSettings() and XRFdc_GetNyquistZone() APIs.
1191Updated lower limit of Ref clock to 102.40625MHz.
1192
1193sdiaud_v1_1:
1194Changed selftest to cover all the GUI parameters like UHD SDI standard and maximum number of channels.
1195Changed clk phase bit default value.
1196Changed Set Clk Phase API's 2nd argument description.
1197Removed get version API call from the self test.
1198Added new line standards.
1199Added new API to enable rate control.
1200Removed inline function which reads the IP version.
1201Removed version register offset.
1202Added rate control enable shift and mask.
1203Added new macros for UHD-SDI standard and channels.
1204
1205lwip202_v1_1:
1206Avoid redundant axi ethernet config lookup and intialize.
1207Add Hot plug autodetect support for EmacPS and AXI Ethernet.
1208
1209spips_v3_1
1210InputClockHz parameter copied in instance for use in
1211application(CR#998910)
1212
1213sdps_v3_5
1214Resolve compilation warnings for sdps driver
1215
1216sysmonpsu_v2_4
1217Remove looping check for PL accessible bit
1218Remove usleeps from AMS CTRL example
1219
1220Resetps_v1_1
1221Fixed compilation warnings in resetps driver
1222
1223xilffs_v3_9
1224Resolve build warnings for xilffs library
1225
1226xilisf_v5_11
1227Added support for ISSI 256Mb series flash parts.
1228
1229nandpsu_v1_4
1230Added ICCARM compiler support in driver.
1231
1232xilfpga_v4_1
1233Added partial bitstream loading support.
1234
1235xilsecure_v3_1
1236Added support for 512, 576, 704, 768, 992, 1024, 1152, 1408, 1536, 
12371984, 3072 key sizes, where previous version has support only 2048 and 
12384096 key sizes.
1239On GCM tag failure, wrongly decrypted data will be zeroized.
1240Added support of user fuses revocation for single partition image.
1241Modified xilsecure_aes_example,input data will be over written with 
1242decrypted data
1243Added compilation flag for opting secure/non-secure environment, by 
1244deault it is non -secure, mainly it is taken into account while 
1245building PMUFW
1246
1247xilskey_v6_5
1248Fixed hanging issue for BBRAM ZynqMP when program/zeroise is requested 
1249while programming mode is in enabled state.
1250
1251zynqmp_fsbl
1252For secure boot added support for enhanced user fuses revocation.
1253
1254axidma_v9_7
1255Add support for 64MB data transfer.
1256
1257Changes for 2018.1
1258===============================
1259v_hdmi_common_v1_0
1260Initial release of HDMI Common Library
1261
1262csi2txss_v1_2
1263Add Frame End Generation feature
1264
1265csi2tx_v1_1
1266Add Frame End Generation feature
1267
1268video_common_v4_3:
1269Added EDID parsing capability with extende feature
1270Added new color space format XVIDC_CSF_YCBCR_420 to support UHDSDI
1271Tx/Rx soft IPs
1272Added new memory format BGR8
1273
1274v_mix_v4_0
1275Added 8th overlay layer
1276Moved logo layer enable from bit 8 to bit 15
1277
1278v_frmbuf_rd_v3_0:
1279Added interlaced support
1280Added new memory format BGR8
1281Added interrupt handler for ap_ready
1282
1283v_frmbuf_wr_v3_0:
1284Added interlaced support
1285Added new memory format BGR8
1286Added interrupt handler for ap_ready
1287
1288mcdma_v1_1:
1289Added failure checks in the tcl to avoid bsp compilation errors incase
1290stream interface is unconnected.
1291Updated tcl logic to export proper values for CACHE_COHERENT properties
1292when h/w is configured for single axi4 data interface.
1293Fix unused variable warning.
1294
1295axicdma_v4_4:
1296Extend AXI CDMA examples to support data buffers above 4GB.
1297
1298axidma_v9_6:
1299Use UINTPTR type for storing address.
1300Use virtual addr for BD access in _UpdateBdRingCDesc().
1301Extend AXI DMA examples to support data buffers above 4GB.
1302
1303dp_v7_0:
1304Updated the drivers to optimize for size.
1305Updated the drivers for DP1.4 support.
1306
1307dprxss_v5_0:
1308Updated the code to to optimize for size.
1309Added support for DP1.4.
1310Added new examples for DP1.4.
1311
1312i2stx_v1_0:
1313Added initial version of Xilinx I2S Tx soft IP driver.
1314
1315i2srx_v1_0:
1316Added initial version of Xilinx I2S Rx soft IP driver.
1317
1318iicps_v3_6:
1319Set Transfer size before slave address in MasterRecvPolled.
1320
1321resetps_v1_0
1322-Added Initial version of the resetps driver for Ultrascale+ ZynqMPSoC
1323-Added xresetps_example.c: Contains a list of peripherals to reset. List has
1324 reset ID of the peripheral, a peripheral register, a value for that
1325 register to be modified before reset and a reset value to validate
1326 successful reset.
1327-Change supported peripheral in mdd file from dummy ps7_resetps instance
1328 to a valid psu_crf_apb and psu_crl_apb instance to allow SDK to
1329 pull the drivers
1330-Remove psu_crl_apb IP instance from mdd file.
1331 Resetps driver is using both psu_crl_ap, psu_crf_apb  IP instances.
1332 But one instance is enough to pull  the driver into the SDK.
1333
1334wdttb_4_3
1335Added a function to program the width of Watchdog timer
1336Updated doxygen tags
1337
1338axivdma_v6_5:
1339Align default TX/RX framebuffer count with IP configuration.
1340Fix compilation error in selftest example.
1341
1342axiethernet_v5_7:
1343Fix compilation issues in multicast/extvlan example.
1344Implementing poll timeout API which replaces the loops
1345Set num of multicast table entries parameter based on hw design.
1346Use table entries count from config structure.
1347Used UINTPTR type for DMA BaseAddress.
1348
1349cpu_cortexa9_v2_6:
1350Added -g flag in default extra compiler flags, for linaro
1351toolchain. It fixes CR#995214.
1352
1353emacps_v3_7:
1354Export TSU clock frequency to xparameters.h
1355
1356freertos10_xilinx_v1_0:
1357Upgraded freertos kernel version to 10.0
1358Updated FreeRTOS tcl to fix bug in detecting latest standalone
1359version.It fixes CR#990995.
1360Export platform macros to xparameters.h based on processor.
1361Added interrupt handler API's for A9, A53, R5.
1362Added support for ttc in microblaze systems
1363Fixed compilation warnings related to interrupt handling API's
1364
1365freertos_lwip_tcp_perf_client and freertos_lwip_tcp_perf_server:
1366Add new SW apps.
1367Correct freertos version number.
1368
1369freertos_lwip_udp_perf_client and freertos_lwip_udp_perf_server:
1370Added new SW apps for freertos UDP performance tests.
1371
1372hdcp1x_v4_2:
1373Updated the XHdcp1x_PortDpRxEnable function to remove the
1374XDp_RxSetIntrHdcpAksvWriteHandler, XDp_RxSetIntrHdcpBinfoReadHandler,
1375and XDp_RxSetIntrHdcpRoReadHandler functions and replace them
1376with the new XDp_TxSetCallback function.
1377
1378freertos901_xilinx_v1_3:
1379Updated FreeRTOS tcl to fix bug in detecting latest standalone
1380version.It fixes CR#990995.
1381
1382lwip202_v1_0:
1383Upgrade to LWIP2.0.2 version
1384Remove PPC references
1385Add support for IGMP for emacps
1386Add multicast MAC update for IPv6 in xemacpsif.c and xaxiemacif.c
1387Add IPv6 source
1388Fix jumbo frame checks to work on R5
1389Add examples for raw and socker mode IGMP, webserver and
1390tftp client and server apps.
1391Update xInsideISR flag in emacps_error_handler.
1392In init_axi_dma() use UINTPTR for axidma base address.
1393Add support for Realtek RTL8211 phy.
1394Update header names in raw and socket examples.
1395
1396lwip_udp_perf_client and lwip_udp_perf_server:
1397Added new SW apps for raw mode UDP performance tests.
1398
1399rfdc_v3_2:
1400Add XRFdc_SetInterpolationFactor() and XRFdc_SetDecimationFactor() APIs.
1401Add CoarseMixMode field in mixer settings.
1402Add XRFdc_SetCalibrationMode() and XRFdc_GetCalibrationMode() APIs for calibration modes switch.
1403Add XRFdc_DynamicPLLConfig() API for PLL and external clock switch support.
1404Add XRFdc_GetClockSource() API to get clock source.
1405Add XRFdc_GetPLLLockStatus() API to get PLL lock status.
1406Add XRFdc_GetDriverVersion() API to get the driver version.
1407Add XRFdc_MultiConverter_Sync() and XRFdc_MultiConverter_Init() APIs to support Multi-Tile Sync.
1408Updated Set/Get Interpolation/Decimation factor APIs to consider the actual factor.
1409Add XRFdc_SetInvSincFIR() and XRFdc_GetInvSincFIR() APIs to support inverse-sinc.
1410Add XRFdc_MultiBand() and XRFdc_SetSignalFlow() APIs to configure Multiband and Singleband.
1411Update PLL structure in XRFdc_DynamicPLLConfig() API.
1412Update ADC and DAC datatypes in Mixer API and use input datatype for ADC in threshold and QMC APIs.
1413Removed FIFO disable check in DDC and DUC APIs.
1414Add support for Marker event source for DAC block.
1415Fixed DAC latency calculation in MTS.
1416Added support for reloading DTC scans.
1417Add option to configure sysref capture after MTS.
1418Update XRFdc_SetPLLConfig() API to correct PLL settings(PLL_CRS1, PLL_LPF1, PLL_CRS2).
1419
1420qspipsu_v1_7:
1421Removed unsupported 4 byte write and sector erase
1422commands.(CR#984966)
1423Added a support for MT25QL02G flash from Micron
1424(CR#990642)
1425Added a support for S25FL064L flash from Spansion
1426(CR#990724)
1427Added a support for MX66U1G45G flash from Macronix
1428(CR#992367)
1429Removed the check for writing the data to DMA MSB.
1430(CR#992560)
1431Added an API in driver to toggle the WP pin of the flash.
1432Added write protect example.(PR#2448)
1433Added support in EL1 non-secure mode. (CR#974882)
1434In dual parallel mode enable both CS when issuing write enable command.
1435(CR#998478)
1436
1437scugic_v3_9:
1438Added new API's to unmap specific/all SPI interrupts
1439from the target CPU. It fixes CR#992490.
1440
1441spi_v4_4:
1442When receive fifo exists, we need to check for status
1443register rx fifo empty flag. If clear we can proceed for
1444read. Otherwise we will hit execption. (CR# 989938)
1445
1446standalone_v6_6:
1447Updated cortexa9/xil_errata.h and cortexa9/xil_cache.c
1448to remove errata 753970, It fixes CR#989132.
1449Export platform macros to bspconfig.h based on processor.
1450Updated sleep routines to support user configurable sleep
1451implementation. Now sleep routines will use TTC instance
1452specified by user
1453Added a macro to replace conditional loops
1454Fixed the compilation warning in A53
1455Made changes to ensure that for A9/Zynq, C stack information
1456is flushed out from L1 D cache or L2 cache only when the
1457respective caches are enabled.
1458Updated asm_vectors.S and boot.S in Cortexa53 64 bit BSP, to add isb
1459after writing to cpacr_el1/cptr_el3 registers.
1460It would ensure disabling/enabling of floating-point unit, before any
1461subsequent instruction.
1462Updated get_connected_if proc in standalone tcl to detect the HPC
1463port configured with smart interconnect. It fixes CR#990318.
1464Updated the csu_wdt interupt to the correct value. Fixes CR#992229.
1465Fix for heap handling in ARM platforms. Fixes CR#993932.
1466Updated Cortex R5 BSP to add new mld parameter "lockstep_mode_debug",
1467to enable/disable debug logic in non-JTAG boot mode, when processor
1468is in lockstep configuration. By default, value of this parameter
1469is "false" and debug logic would be disabled. It can be enabled through
1470BSP setting by changing value of "lockstep_mode_debug" as "true".
1471It fixes CR#993896.
1472By default CPUACTLR_EL1 is accessible only from EL3, it
1473results into abort if accessed from EL1 non secure privilege
1474level. Updated Xil_ConfigureL1Prefetch function in Cortexa53 64 bit BSP
1475to avoid CPUACTLR_EL1 access from privile levels other than EL3.
1476Updated hypervisor enabled BSP to use PV console, based on the
1477XEN_USE_PV_CONSOLE flag. By deafault hypervisor enabled BSP would
1478use UART console, PV console can be enabled by appending
1479"-DXEN_USE_PV_CONSOLE" to the BSP extra compiler flags.
1480
1481sysmonpsu_v2_3:
1482Added missing closing bracket error when C++ is used
1483Added Conversion Support for voltages having Range of 1 Volt
1484Correct the AMS block channel numbers
1485Added example for testing AMS block voltage measurement
1486Added peripheral test support for sysmonpsu. CR-980362
1487Provided conditional checks for interrupt example in
1488sysmonpsu_header.h
1489Get Ref Clock Frequency information from design
1490Update Clock Divisor to the proper value
1491Update example code to run at higher frequency and remove sleep
1492
1493sdps_v3_4:
1494Use different commands for single and multi block transfers
1495Separated out SDR104 and HS200 clock defines
1496Move UHS macro check to SD card init routine
1497
1498csudma_v1_2:
1499Added support for peripheral test app support.
1500Fixed compilation issues in peripheral test creation
1501Add new API XCsuDma_64BitTransfer() in the driver useful
1502for 64-bit dma address transfers through pmu processor CR-996201.
1503
1504uartps_v3_6:
1505This patch updates the flow control mode offset value. CR-995026
1506
1507zdma_v1_5:
1508Added support for peripheral test app support.
1509Fixed peripheral app generation issues when running on OCM(CR-990806).
1510Fixed compilation issues in peripheral test creation
1511
1512libmetal_v1_4:
1513- Sync libmetal OSS project with upstream
1514
1515libmetal_demo:
1516- Update to work with updated libmetal lib
1517
1518openamp_v1.5:
1519- Sync openamp OSS project with upstream 83f2b72
1520
1521openamp_rpc_demo:
1522openamp_matrix_multiply_demo:
1523openamp_echo_test:
1524- Update to work with updated openamp and libmetal libs
1525- Use different shared memory based on RPU id.
1526
1527v_hdmirxss_v5_0:
1528Updated version from 4.0 to 5.0
1529Added Info frame supported
1530Added new reset sequence
1531Added support for ZCU104, ZCU106 and VCU118
1532Improve system flow in the example design
1533Added EDID parsing capability
1534
1535v_hdmitxss_v5_0:
1536Updated version from 4.0 to 5.0
1537Added Info frame supported
1538Added new reset sequence
1539Added support for ZCU104, ZCU106 and VCU118
1540Improve system flow in the example design
1541Added EDID parsing capability
1542
1543v_hdmirx_v2_0:
1544Updated version from 1.3 to 2.0
1545Added Info frame supported
1546Added new reset sequence
1547
1548v_hdmitx_v2_0:
1549Updated version from 1.3 to 2.0
1550Added Info frame supported
1551Added new reset sequence
1552
1553usbpsu_v1_4:
1554Modify USBPSU driver code to fit USB common example code for all USB IPs
1555Added support for flushing Dcache for setupdata packet for control ep's
1556Changed the mass storage examples to be in sync with common mode example code
1557Changed the dfu examples to be in sync with common example code
1558Added hibernation support for usb
1559Added changes to usbpsu driver for supporting microblaze platform
1560Enabled event generation for usb controller when run on microblaze plaforms
1561
1562xilfpga_v4_0:
1563Added the following Secure features to the xilfpga library.
15641) Authenticated Bitstream loading using DDR.
15652) Authenticated Bitstream loading Using OCM.
15663) Authenticated + Encrypted Bitstream loading Using DDR with User-key.
15674) Authenticated + Encrypted Bitstream Loading Using OCM with Device-key.
15685) Authenticated + Encrypted + Key rolling Bitstream loading Using DDR with User-key.
15696) Authenticated + Encrypted + Key rolling Bitstream loading Using DDR with Device-key.
15707) Authenticated + Encrypted + Key rolling Bitstream Loading Using OCM with User-key.
15718) Authenticated + Encrypted + Key rolling Bitstream Loading Using OCM with Device-ke
1572
1573For this version onwards we are not stripping the Header for Both
1574Secure and Non-Secure Bitstream Images.So the entry point interface
1575will be changed as follows.
1576u32 XFpga_PL_BitSream_Load (UINTPTR WrAddr, UINTPTR KeyAddr, u32 flags);
1577
1578Added the legacy bit file loading feature support from U-boot.
1579and improve the error handling support by returning the
1580proper ERROR value upon error conditions.
1581
1582xilrsa_v1_5:
1583Added description in mld
1584
1585xilsecure_v3_0:
1586Added support for NIST-SHA3 padding
1587Added API to make KECCAK/NIST(default)padding selection
1588Added AES and KUP key clear call after decryption
1589Modified XSecure_AesDecrypt() to use key in Secure header
1590Added APIs to load secure single partition image
1591
1592xilskey_v6_4:
1593Corrected status bits for Ultrascale plus
1594Added support for Virtex Ultrascale and Ultrascale plus
1595Cache is been re-loaded by library after programming eFUSE bits in ZynqMP
1596
1597xxvethernet_v1_0:
1598Add new driver for XXV Ethernet IP
1599Add support for USXGMII IP
1600
1601zynqmp_fsbl:
1602Added support for NIST-SHA3 padding
1603Added Boot header authentication
1604Forcing encryption for all partitions when ENC_ONLY eFUSE bit is set
1605Fixed AES KEY and IV re-use vulneribility issue
1606
1607zynqmp_pmufw:
1608- Using CSU WDT for PMU fail-safe mechanism instead of LPD WDT
1609- Implemented idle hooks for nodes USB, DP and SATA
1610- Added support for graceful forcepowerdown of PU to prevent any mid-flight
1611  axi transactions from locking up the interconnect and hanging the device.
1612- Added wake on USB support to wakeup all masters for which USB is set as
1613  wakeup source
1614- Corrected the timeout logic in node idling functions
1615- Seperated FPD and PLD power supply check hooks to increase FPD power up
1616  delay to 40ms(this is the maximum rampup time for FPD power rails)
1617- Added GPO section to config object to get the initial state of PMU GPO's
1618  and configure them in PMU Firmware
1619- Using TTC instead of IPI interrupt from PMU to interrupt APU upon WDT event
1620- Added all builds flags to xpfw_config.h file so that user can enable/disable
1621  any functionality from this config file
1622- Added misc folder to PMU Firmware
1623- Added modularity of xilfpga and xilsecure features using compiler switches
1624- Skip FPD power down when debugger is connected
1625- Added Power Off Suspend to RAM feature
1626- Use IPI-1 for callbacks/communication initiated by PMU Firmware to
1627  other masters
1628- Updated PM version to 1.0 to match with EEMI API version
1629- Added support for resetting GPIO5 resets going to PL
1630- Keeping OCM bank3 ON during suspend if wake on LAN is set
1631- Added API to support secure single partition image
1632- Sending PL_INIT status in PmGetChipid API response to indicate PL EFUSE is
1633  loaded into EFUSE IPDISABLE or not
1634- Polling for acknowledgment from AIB after isolation is enabled when
1635  power domain or island is powered down
1636- Checking all access regions present in pmAccessTable for finding vaild
1637  permissions for MMIO read and write calls
1638- Updated PM API IDs list in PMU Firmware with the new API IDs implemented
1639  in EEMI
1640- Updated xilfpga API calls in PMU Firmware with the latest version of
1641  xilfpga library
1642
1643Changes for 2017.4
1644===============================
1645
1646qspipsu_v1_6:
1647Flow for accessing flash parts with size more then 16MB
1648made similar to u-boot and linux.(CR#984966)
1649ICCARM compiler does not support __attribute__ syntax,
1650instead #pragma is used for the similar functionality.(CR#988625)
1651
1652ttcps_v3_5:
1653Updates XTtcPs_GetMatchValue and XTtcPs_SetMatchValue APIs
1654to use correct match register width for zynq  (i.e. 16 bit)
1655and zynq ultrascale+mpsoc (i.e. 32 bit). It fixes CR#986617
1656
1657v_csi2txss_v1_1:
1658Exporting ulps API to subsystem
1659
1660sdps_v3_3:
1661Use different commands for single and multi block transfers
1662
1663emacps_v3_6:
1664Export PL PCS PMA information for ETH1/2/3- CR-984847.
1665
1666qspipsu_v1_6:
1667Flow for accessing flash parts with size more then 16MB made similar to
1668u-boot and linux.(CR#984966) ICCARM compiler does not support
1669__attribute__ syntax, instead #pragma is used for the similar
1670functionality.(CR#988625)
1671
1672axidma_v9_5:
1673CR#987026 Fixed issue poll_multi_pkt example fails on a53
1674Fixed race condition in the XAxiDma_Reset() API.
1675CR#988210 Add interface to query config based on base addr.
1676
1677lwip141_2_0:
1678Correct assigment of TX BD ring in init_dma() and
1679emacps_error_handler().
1680CR#988210 Perform AXI DMA lookup based on base address.
1681
1682zdma_v1_4:
1683Fixed compilation errors for IAR compiler.
1684
1685zynqmp_pmufw:
1686- Exported efuse IP disable as part of version string in PmGetChipid to
1687recognize eg/cg/ev devices
1688- Enabled Optimize for size compiler flag in HSI flow
1689- Clearing master wakeup sources after master state is changed from
1690suspended to active
1691- Fix pmufw warnings related to unused variable, uninitialized variable
1692and signed compare
1693- Provided MMIO Read-only access to PMU LOCAL FPD lock status register
1694- Changed PMU Firmware version to 2017.4
1695- Added wrapper API for IPI poll for Ack in PMU Firmware
1696
1697zynqmp_fsbl:
1698Updated cross compiler flags with hard floating point values
1699Added functionality in FSBL to distinguish EV devices from EG devices
1700
1701
1702
1703Changes for 2017.3
1704===============================
1705
1706v_sdirx_v1_0:
1707Initial version for UHDSDI Rx soft IP
1708
1709v_sdirxss_v1_0:
1710Initial version for UHDSDI Rx subsystem soft IP
1711Added application support for SDI rx subsystem example design
1712
1713v_sditx_v1_0:
1714Initial version for UHDSDI Tx soft IP
1715
1716v_sditxss_v1_0:
1717Initial version for UHDSDI Tx subsystem soft IP
1718
1719Removed the below obsolete drivers & libraries (CR:981161)
1720axi_cdma_v4_1
1721axi_cdma_v4_2
1722axi_dma_v9_2
1723axiethernet_v5_1
1724axiethernet_v5_2
1725axi_pmon_v6_4
1726can_v3_1
1727canfd_v1_1
1728canps_v3_1
1729clk_wiz_v1_0
1730coresightps_dcc_v1_2
1731cpu_cortexa9_v2_2
1732cpu_cortexa9_v2_3
1733cpu_cortexa53_v1_1
1734cpu_cortexa53_v1_2
1735cpu_cortexr5_v1_1
1736ddrpsu_v1_0
1737dmaps_v2_2
1738dphy_v1_0
1739dprxss_v2_0
1740dprxss_v3_0
1741dptxss_v4_0
1742emaclite_v4_2
1743emacps_v3_2
1744gpio_v4_2
1745hdcp1x_v3_0
1746hdcp22_cipher_v1_0
1747hdcp22_mmult_v1_0
1748hdcp22_rng_v1_0
1749hdcp22_rx_v1_0
1750hdcp22_tx_v1_0
1751hwicap_v10_1
1752iic_v3_3
1753iicps_v3_2
1754iicps_v3_3
1755ipipsu_v2_0
1756iomodule_v2_3
1757mipicssi_v1_0
1758mutex_v4_1
1759nandpsu_v1_0
1760qspipsu_v1_1
1761qspipsu_v1_2
1762rtcpsu_v1_2
1763scugic_v3_3
1764scugic_v3_4
1765sdps_v2_8
1766sysmon_v7_2
1767sysmonpsu_v1_0
1768sysmonpsu_v1_1
1769tmrctr_v4_1
1770ttcps_v3_1
1771uartps_v3_1
1772uartps_v3_2
1773usb_v5_1
1774usbps_v2_3
1775usbpsu_v1_0
1776v_axi4s_remap_v1_0
1777v_csc_v2_0
1778v_deinterlacer_v6_0
1779v_deinterlacer_v6_1
1780v_hcresampler_v2_0
1781v_hcresampler_v2_1
1782v_hdmirx_v1_1
1783v_hdmirxss_v2_0
1784v_hdmitx_v1_1
1785v_hdmitxss_v2_0
1786v_hscaler_v3_0
1787v_letterbox_v2_0
1788v_mix_v1_0
1789v_tpg_v7_0
1790v_vcresampler_v2_1
1791v_vscaler_v2_0
1792video_common_v3_0
1793video_common_v3_1
1794vphy_v1_1
1795vprocss_v2_1
1796zdma_v1_0
1797xilffs_v3_3
1798xilffs_v3_4
1799xilfpga_v1_0
1800xilisf_v5_6
1801xilmfs_v2_0
1802xilmfs_v2_1
1803xilpm_v1_0
1804xilrsa_v1_1
1805xilsecure_v1_1
1806xilskey_v5_0
1807xilskey_v6_0
1808lwip141_v1_4
1809lwip141_v1_5
1810standalone_v5_4
1811standalone_v5_5
1812standalone_v6_0
1813freertos821_xilinx_v1_0
1814freertos823_xilinx_v1_0
1815freertos823_xilinx_v1_1
1816freertos823_xilinx_v1_2
1817
1818v_csc_v2_2
1819Added support for conversion from 420/422/444/RGB to 420/422/444/RGB
1820
1821v_demosaic_v1_0
1822added initial version
1823
1824v_frmbuf_rd_v2_0
1825added second buffer for semi-planar formats
1826added 64-bit address support for memory mapped interface
1827added new streaming and memory video formats
1828
1829v_frmbuf_wr_v2_0
1830added second buffer for semi-planar formats
1831added 64-bit address support for memory mapped interface
1832added new memory video formats
1833
1834v_gamma_lut_v1_0
1835added initial version
1836
1837v_mix_v3_0
1838added second buffer for semi-planar formats
1839added 64-bit address support for memory mapped interface
1840re-ordered register map to group layers together
1841
1842video_common_v4_2
1843Added new video modes, framerates, color formats for SDI
1844New member AspectRatio is added to video stream structure
1845Reordered XVidC_VideoMode enum variables and corrected the memory format enums
1846Add XVIDC_VM_3840x2160_60_P_RB video format
1847Added new streaming alpha formats and new memory formats
1848
1849vprocss_v2_4
1850Added support for conversion from 420/422/444/RGB to 420/422/444/RGB in
1851CSC-only topology
1852
1853mbox_v4_2:
1854Added support for FIFO reset using hardware control register
1855Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1856Fixed compilation warnings.
1857
1858mipicsiss_v1_1:
1859Added application support for mipi csi subsystem example design
1860
1861lwip141_v1_9:
1862Updated xemacpsif_physpeed.c to use smc calls to access thr CRL_APB,
1863this is done to support the applications running over EL1 NS mode.
1864Add freertos support for axiethernet fifo configuration.
1865SW workaround for TI DP83867 PHY Data integrity issues on KCU116/VCU118 Boards.
1866Change compiler used on A9.
1867Fixed conflicting types of variable xInsideISR to fix CR-981909.
1868Fix various warning messages in the lwip141 axiethernet adapter.
1869Add support for CCI.
1870Add rx_reset_nodata workaround for Zynq GEM in freertos case.
1871Disable L1 prefetch for ARMv8 in init_dma function in xemacpsif_dma.c to fix CR-981973.
1872
1873llfifo_v5_2:
1874CR#978769 Fix doxygen issues in the driver.
1875Updated comments in the usage section as per example code.
1876Fixed doxygen warnings in the driver.
1877
1878axidma_v9_4:
1879CR#974218 Add support for cyclic DMA mode.
1880
1881axidma_v9_4:
1882CR#974218 Add support for cyclic DMA mode.
1883
1884axiethernet_v5_6:
1885CR#979636 lwip stop's working as soon as something is plugged to it's
1886AXI stream bus.
1887CR#979023 Intr fifo example failed to compile.
1888Add support for axiethernet with mcdma configuration.
1889Fix pmufw bsp compilation error for axi-ethernet based designs.
1890Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1891Fixed compilation warnings.
1892
1893axipmon_v6_6:
1894Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1895
1896axivdma_v6_4:
1897Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1898Fixed compilation warnings.
1899
1900bram_v4_2:
1901Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1902Fixed compilation warnings.
1903
1904cpu_cortexa53_v1_4:
1905Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1906
1907cpu_cortexa9_v2_5:
1908Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1909
1910devcfg_v3_5:
1911Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1912Fixed compilation warnings.
1913
1914dp_v5_3:
1915Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1916
1917cpu_cortexr5_v1_4:
1918Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1919
1920hdcp1x_v4_1
1921Updating the XHdcp1x_TxIsInProgress function to keep track of a pending
1922authentication request.
1923Added flag IsAuthReqPending to the XHdcp1x_Tx data structure to track any
1924pending authentication requests.
1925Updated the XHdcp1x_CipherHandleInterrupt function to not mask the interrupts,
1926as it is being done in hardware now.
1927Updated the initialization to memset the XHdcp1x structure to 0.
1928
1929hwicap_v11_1
1930Updated software reset api by adding delay
1931Fixed compilation warnings
1932
1933intc_v3_7:
1934Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1935
1936iomodule_v2_5:
1937Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1938Fixed compilation warnings.
1939
1940mcdma_v1_0:
1941Initial version of mcdma driver
1942
1943nandpsu_v1_3
1944Added support to import examples in SDK.
1945Added CCI support.
1946
1947mig_7series_v2_1:
1948Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1949
1950mutex_v4_3:
1951Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1952Fixed compilation warnings.
1953
1954nandps_v2_3:
1955Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1956
1957prc_v1_1:
1958Added a new parameter "Cp_Compression" and status error flags
1959Updated api.tcl. Fix for CR-978747.
1960Added U suffix for all macros in xparameters.h. Fix for CR#963131.
1961
1962qspipsu_v1_5:
1963Added index.html for importing example from the system.mss
1964Added support for readind ID till 5th byte as MT25Q series flash supports FSRFlag
1965but 128Mb and 256Mb parts are single die only. If the 6th bit of 5th ID byte
1966is 1 then we can set the FSRFlag.
1967Added CCI support.
1968Modified the checks for 4 byte addressing and commands in examples.
1969
1970qspips_v3_4
1971Added QSPI Buswidth parameter in canonical defines.
1972
1973rtcpsu_v1_5:
1974Fixed compilation warnings, source code cleanup. CR-983311
1975
1976axiethernet_v5_6:
1977CR#979636 lwip stop's working as soon as something is plugged to it's
1978AXI stream bus.
1979CR#979023 Intr fifo example failed to compile.
1980
1981axiethernet_v5_6:
1982CR#979636 lwip stop's working as soon as something is plugged to it's
1983AXI stream bus.
1984CR#979023 Intr fifo example failed to compile.
1985
1986standalone_v6_4:
1987Updated arm/common/xil_exception.c to fix warnings in C level exception handlers
1988of ARM 32 bit processors.
1989Updated cortexa53/64bit/gcc/asm_vectors.S to fix bug in  IRQInterruptHandler code
1990snippet, which checks for the FPEN bit of CPACR_EL1 register.
1991Supports XGetPSVersion_Info function for PMUFW - Fix for CR-967248
1992Supports XGetPlatform_Info function for PMUFW. Fix for CR-978237
1993Updated Xil_In32BE function in xil_io.h to fix bug.It fixes CR#979740.
1994Updated standalone tcl to generate xparameter XPAR_PL_IS_CACHE_COHERENT, if
1995h/w design got created with HPC port.
1996Updated a53 64 bit translation table to mark  memory as a outer shareable for
1997EL1 NS execution. This change has been done to support CCI enabled IP's.
1998Updated a53 64 bit boot code to implement ARM erratum 855873.This fixes CR#982209.
1999Made changes to fix various issues in R5 MPU handling logic. Added new APIs. CR#981028.
2000
2001scugic_v3_8:
2002Updated xdefine_gic_params proc in driver tcl to export correct canonical
2003definitions for pl to ps interrupts.Fix for CR#980534
2004Updated get_psu_interrupt_id proc in scugic tcl, to check if sink pin is
2005connected to any peripheral.This check has been added to avoid the BSP
2006creation failure, if interrupt pin is connected externally.Fix for
2007CR#980414.
2008
2009spi_v4_3:
2010Added U suffix for all macros in xparameters.h. Fix for CR#963131.
2011
2012sysmon_v7_4:
2013Added U suffix for all macros in xparameters.h. Fix for CR#963131.
2014
2015tft_v6_1:
2016Added U suffix for all macros in xparameters.h. Fix for CR#963131.
2017
2018tmrctr_v4_4:
2019Updated XTmrCtr_DisableIntr macro to not to clear T0INT flag.It fixes
2020CR#980512.
2021Resolve compilation warning
2022Added U suffix for all macros in xparameters.h. Fix for CR#963131.
2023
2024tpg_v3_1:
2025Updated NUM_INSTANCES parameter in xparameters.h and
2026xtpg_sinit.c to avoid errors. Fix for cr-976944.
2027
2028trafgen_v4_2:
2029Added U suffix for all macros in xparameters.h. Fix for CR#963131.
2030
2031ttcps_v3_4:
2032Added U suffix for all macros in xparameters.h. Fix for CR#963131.
2033
2034uartns550_v3_5:
2035Added U suffix for all macros in xparameters.h. Fix for CR#963131.
2036
2037wdttb_v4_2:
2038Added U suffix for all macros in xparameters.h. Fix for CR#963131.
2039
2040xilfpga_v3_0:
2041Added PL configuration registers readback support.
2042Added Device-key Encrypted BitStream Loading support to the xilfpga library.
2043
2044sdps_v3_3:
2045Add support for 64bit DMA addressing
2046Add support for 200MHz in SD driver
2047Fixed compilation warnings
2048Removed SD0_OTAPDLYENA and SD1_OTAPDLYENA bits
2049Modify driver to support 64-bit DMA in arm64 only
2050sdps: Prevent SD0_OTAPDLYENA and SD01_OTAPDLYENA bit to set
2051Properly set OTAPDLY value by clearing previous bit settings
2052Added CCI support for SD
2053Updated for Word Access System support
2054Resolved compilation errors with IAR toolchain
2055Added UHS_MODE_ENABLE macro to enable UHS mode
2056
2057xilisf_v5_9:
2058Expanded the description of serial_flash_family and serial_flash_interface.
2059Fix for CR-967359.
2060Added 4Byte addressing support for Micron devices. CR-980169
2061Added doxygen tags.
2062
2063xilffs_v3_7:
2064Added configurable option for _FS_RPATH
2065
2066xilflash_v4_4:
2067Added doxygen tags
2068
2069libmetal_v1_3:
2070- Sync libmetal OSS project with upstream
2071
2072openamp_v1.4:
2073- Sync openamp OSS project with upstream
2074
2075openamp_rpc_demo:
2076openamp_matrix_multiply_demo:
2077openamp_echo_test:
2078- Update to work with updated openamp and libmetal libs
2079
2080zdma_v1_3:
2081Updated driver and examples to support CCI at EL1 NS.
2082
2083emacps_v3_5:
2084Export CCI enablement information and add support in examples.
2085
2086xilsecure_v2_2:
2087Added doxygen tags.
2088Added RSA decrypt with private key and encrypt with public key support.
2089Added RSA 2048 support.
2090Added APIs to support xilsecure functionalities in linux.
2091
2092xilskey_v6_3:
2093Provided support for programming eFUSE and BBRAM of kintex Ultrascale plus.
2094
2095zynqmp_fsbl:
2096- For secure boot added PPK invaliadity checks in FSBL.
2097- Implemented Secondary boot as specified in image header of the boot image.
2098- Enable qspi boot in 1-bit and 2-bit qspi buswidths.
2099- Clear all pending interrupts in case of APU only Restart.
2100- Unconditionally remove PS-PL isolation in PS-only reset.
2101- Disable all alarms before and re-enable them after applying
2102  protection configuration.
2103- Clear total byte counter after every cycle of ADMA to prevent byte count overflow
2104  interrupt from being set.
2105- Modify the max transfer length in DMA to make it 64 it aligned, this is to eliminate
2106  ECC errors.
2107- Added a macro indicating wait time for PL power up, customers can set their respective
2108  values, default value is zero.
2109- Enable propagation PROG signal to PL after ps-only reset which is gated during ps-only reset.
2110- Rectify ID code of ZU6EG devices.
2111
2112zynqmp_pmufw:
2113- Added three level debug prints for PMU Firmware application
2114- Updated scheduler task removal logic to ensure that no task will be removed
2115  before its execution
2116- Enabling Isolation before powering down any power domain/power island to
2117  avoid any bus hang when accessed and disabling the same when powering up
2118- Added extra prints to give detailed information to the user when XMPU/XPPU
2119  violation occurs
2120- Added disabling and re-enabling of PMU interrupts before coming out of
2121  interrupt handler to acknowledge any pending interrupts
2122- Added boot pin control register access to MMIO access region
2123- Updated HSI TCL to get compiler flags from command line
2124- Updated PMU Firmware DDR driver
2125- Enabling broadcasting of inner shareable transactions if PL is configured
2126  for coherency in HW design
2127- Ignoring the PLL use count for floating clocks to avoid PLL use accounting to
2128  be disrupted. And assigning the usb3dual clock to both usb0 and usb1 slaves
2129- Fixed MISRA-C violations in PMU Firmware base code
2130- Disabling WDT recovery when PM master is entering suspended or killed state.
2131  And enabling WDT recovery when PM master comes to active state
2132- Changed LPD WDT timeout value to 90 milliseconds to meet safety requirement
2133- Updated the PMU EM module to set/remove the error action for any error at
2134  run time using IPI. And log the errors and send when the target requests
2135- Added SRST support for FPD WDT
2136- Put SysOsc in sleep mode and change UART requirements while going to deep
2137  sleep mode to avoid more power consumption
2138- Added xilsecure API calls to support xilsecure functionality from Linux
2139
2140Changes for 2017.2
2141================================
2142
2143cpu_cortexr5_v1_3
2144Added -mfloat-abi=hard and -mfpu=vfpv3-d16 in extra compiler flags,
2145to support hard flaoting point for cortex-r5 standalone BSP.
2146
2147gpiops_v3_3:
2148Added notes about gpio pin description for zcu102 and zc702
2149boards. Fix for cr-955076
2150Resolved doxygen warnings.CR#1006331
2151
2152ipipsu_v2_3:
2153Added suffix U for all macros of ipipsu in xparameters.h
2154Fix for CR-963131.
2155
2156qspispu_v1_5:
2157Added support for accessing upper DDR in qspi boot mode and example.
2158Fix for CR-972531
2159
2160scugic_v3_7:
2161Added suffix U for all macros of scugic in xparameters.h
2162Fix for CR-963131.
2163
2164standlone_v6_3:
2165Added hard floating point support in the cortex-r5 BSP.
2166Updated Cortex-a53 32 bit BSP boot code to fix bug in the HW coherency
2167enablement. It fixes the CR#973287
2168Updated Cortex-a53 64 bit BSP boot code, to remove redundant write to
2169the L2CTLR_EL1 register. It fixes the CR#974698
2170
2171sysmonpsu_v2_2:
2172Corrected temperature conversion formulas
2173
2174xilsecure_v2_1
2175Added SHA2 binary for freertos R5 with soft floating point and
2176standalone R5 binary with hard floating point.
2177
2178xilfpga_v2_1:
2179Fixed the check logic issue in Xfpga_PL_BitStream_Load().
2180
2181zynqmp_fsbl:
2182Added word alignement to AuthBuffer, by adding attribute.
2183
2184zynqmp_pmufw:
2185Bypass RPLL in system reset for Silicon 1.0. This is a workaround for a bug in Silicon 1.0 which was fixed in other versions of Silicon
2186Binding main and lsbus top switch clocks to the DDR node to ensure that PLLs which drive these clocks do not get reset/bypassed as long as the DDR being accessed.
2187
2188axiethernet_v5_5:
2189Increase Timeout value in the driver as per new h/w update CR#976244.
2190
2191Change Log for 2017.1
2192=================================
2193
2194Removed the below obsolete drivers & libraries (CR:966227)
2195axi_cdma_v3_0
2196axi_cdma_v4_0
2197axi_dma_v8_1
2198axi_dma_v9_0
2199axi_dma_v9_1
2200axiethernet_v4_3
2201axiethernet_v4_4
2202axiethernet_v5_0
2203axi_pcie_v3_0
2204axi_pmon_v6_1
2205axi_pmon_v6_2
2206axi_pmon_v6_3
2207axi_vdma_v5_0
2208axi_vdma_v5_1
2209axi_vdma_v6_0
2210bram_v4_0
2211can_v3_0
2212canfd_v1_0
2213canps_v3_0
2214coresightps_dcc_v1_0
2215coresightps_dcc_v1_1
2216cpu_cortexa9_v2_1
2217cpu_cortexa53_v1_0
2218cpu_cortexr5_v1_0
2219cpu_v2_4
2220csudma_v1_0
2221devcfg_v3_3
2222dp_v1_0
2223dp_v2_0
2224dp_v3_0
2225dp_v4_0
2226dprxss_v1_0
2227dptxss_v1_0
2228dptxss_v2_0
2229dptxss_v3_0
2230emaclite_v4_0
2231emaclite_v4_1
2232emacps_v2_2
2233emacps_v3_0
2234emacps_v3_1
2235gpio_v4_0
2236gpio_v4_1
2237gpiops_v2_2
2238gpiops_v3_0
2239hdcp1x_v1_0
2240hdcp1x_v2_0
2241hwicap_v9_0
2242hwicap_v10_0
2243iic_v3_0
2244iic_v3_1
2245iic_v3_2
2246iicps_v2_3
2247iicps_v3_0
2248iicps_v3_1
2249intc_v3_3
2250intc_v3_4
2251llfifo_v4_0
2252llfifo_v5_0
2253iomodule_v2_1
2254iomodule_v2_2
2255ipipsu_v1_0
2256mbox_v4_0
2257mutex_v4_0
2258qspips_v3_2
2259qspipsu_v1_0
2260rtcpsu_v1_0
2261rtcpsu_v1_1
2262scugic_v2_1
2263scugic_v3_0
2264scugic_v3_1
2265scugic_v3_2
2266scutimer_v2_0
2267scuwdt_v2_0
2268sdps_v2_3
2269sdps_v2_4
2270sdps_v2_5
2271sdps_v2_6
2272sdps_v2_7
2273spi_v4_0
2274spi_v4_1
2275spips_v2_0
2276srio_v1_0
2277sysmon_v7_0
2278sysmon_v7_1
2279tmrctr_v3_0
2280tmrctr_v4_0
2281tpg_v3_0
2282trafgen_v3_2
2283trafgen_v4_0
2284ttcps_v3_0
2285uartlite_v3_0
2286uartlite_v3_1
2287uartns550_v3_2
2288uartps_v3_0
2289usb_v5_0
2290usbps_v2_2
2291v_csc_v1_0
2292v_deinterlacer_v5_0
2293v_hcresampler_v1_0
2294v_hdmirx_v1_0
2295v_hdmirxss_v1_0
2296v_hdmitx_v1_0
2297v_hdmitxss_v1_0
2298v_hscaler_v1_0
2299v_hscaler_v2_0
2300v_letterbox_v1_0
2301v_vcresampler_v1_0
2302v_vcresampler_v2_0
2303v_vscaler_v1_0
2304video_common_v1_1
2305video_common_v2_0
2306video_common_v2_1
2307video_common_v2_2
2308vphy_v1_0
2309vprocss_v1_0
2310vprocss_v2_0
2311vtc_v6_1
2312vtc_v7_0
2313wdtps_v2_0
2314xadcps_v2_0
2315xadcps_v2_1
2316ycrcb2rgb_v6
2317xilffs_v2_1
2318xilffs_v2_2
2319xilffs_v3_0
2320xilffs_v3_1
2321xilffs_v3_2
2322xilflash_v4_0
2323xilflash_v4_1
2324xilisf_v5_0
2325xilisf_v5_1
2326xilisf_v5_2
2327xilisf_v5_3
2328xilisf_v5_4
2329xilisf_v5_5
2330xilrsa_v1_0
2331xilsecure_v1_0
2332xilskey_v2_0
2333xilskey_v2_1
2334xilskey_v3_0
2335xilskey_v4_0
2336lwip140_v2_3
2337lwip141_v1_0
2338lwip141_v1_1
2339lwip141_v1_2
2340lwip141_v1_3
2341xilkernel_v6_2
2342standalone_v4_2
2343standalone_v5_0
2344standalone_v5_1
2345standalone_v5_2
2346standalone_v5_3
2347standalone_v5_6
2348xilapufw_v1_0
2349xilopenamp_v1_0
2350
2351
2352
2353
2354
2355
2356
2357axiethernet_v5_4:
2358Add Support for TI PHY DP83867 SGMII Mode configuration in the examples.
2359Fixed CR#971367 fix race condition in the tcl for a multi mac design
2360(AXI_CONNECTED_TYPE defined only for one instance).
2361
2362axipmon_v6_5:
2363Updated the makefile to fix the bug, to avoid the compilation failure
2364of the axipmon applications.It fixes the CR#974412
2365
2366axivdma_v6_3:
2367Fixed compilation errors. CR-969129
2368
2369coresightps_dcc_v1_4:
2370Fixed MISRA C mandatory violations CR#970529.
2371
2372ccm_v6_1:
2373Modified num instances parameter as XPAR_XCCM_NUM_INSTANCES
2374in xparameters.h, xccm_sinit.c to avoid compilation errors because it
2375was updated as XPAR_CCM_NUM_INSTANCES in both files. Fix for CR#966099.
2376
2377cfa_v7_1:
2378Modified num instances parameter as XPAR_XCFA_NUM_INSTANCES
2379in xparameters.h, xcfa_sinit.c to avoid compilation errors because it
2380was updated as XPAR_CFA_NUM_INSTANCES in both files. Fix for CR#966099
2381
2382clk_wiz_v1_2:
2383Fixed compilation errors and warnings. CR-970507.
2384
2385cpu_cortexa9_v2_4:
2386Updated makefile with "clean" target
2387Updated tcl to check each extra compiler flag individually
2388for linaro toolchain and if any default flags are missing,
2389it adds the required flags. It fixes CR#965023.
2390Added "-Wall -Wextra" to the extra compiler flags.
2391Updated cpu_cortexa9.tcl to guard xparameters.h by protection macros.
2392It fixes CR#963130.
2393
2394cpu_cortexa53_v1_3:
2395Updated makefile with "clean" target
2396Added "-Wall -Wextra" to the extra compiler flags.
2397Updated cpu_cortexa53.tcl to guard xparameters.h by protection macros.
2398It fixes CR#963130.
2399
2400cpu_cortexr5_v1_2:
2401Updated makefile with "clean" target
2402Added "-Wall -Wextra" to the extra compiler flags.
2403Updated tcl to support IAR compiler.
2404Updated cpu_cortexr5.tcl to guard xparameters.h by protection macros.
2405It fixes CR#963130.
2406
2407cpu_v2_6:
2408Added "ffunction-sections" and  "fdata-sections"
2409to the deafult extra complier flags, and remove "-g" from
2410the same.It fixes CR#965574.
2411Added "-Wall -Wextra" to the extra compiler flags.
2412
2413cresample_v4_1:
2414Modified num instances parameter as XPAR_XCRESAMPLE_NUM_INSTANCES
2415in xparameters.h, xcresample_sinit.c to avoid compilation errors because it
2416was updated as XPAR_CRESAMPLE_NUM_INSTANCES in both files. Fix for CR#966099
2417
2418emacps_v3_4:
2419Updated emacps tcl to export PCS definitions for newer version of
2420Xilinx PCS PMA core where PHY address is not a parameter.
2421Fixed Compilation warnings - CR#957004
2422
2423enhance_v7_1:
2424Updated num instances parameter as XPAR_XENHANCE_NUM_INSTANCES
2425by modifying tcl and _sinit.c files to avoid compilation error. Fix
2426for CR-967548.
2427
2428freertos901_xilinx_v1_0:
2429Added latest freertos version freertos901_xilinx.
2430Updated tcl as per standalone directory structure.
2431Updated makefiles to fix build issue on windows.
2432Updated the tcl to set value of configTIMER_QUEUE_LENGTH  properly.
2433It fixes CR#968541
2434Updated traceTASK_DELAY_UNTIL macro in FreeRTOSSTMTrace.h to
2435fix errors in BSP, built with the stm event trace enabled. It
2436fixes CR#969576
2437
2438gpiops_v3_2:
2439Fixed Compilation warnings - CR#957004.
2440
2441hwicap_v11_0:
2442Adopted read-back configuration data frame support for 8-series devices
2443
2444iicps_v3_5:
2445Workaround for SLVMON issue in zynq.
2446As per user guide when SLVMON bit is cleared in control register,
2447master should stop sending the address.But, this is not happening
2448with the zynq I2C IP.
2449
2450intc_v3_6:
2451Updated xredefine_intc function in tcl to avoid errors,
2452for design in which number of interrupt sources connected
2453to AXI INTC is 0.It fixes CR#966295
2454Updated xredefine_intc and intc_define_vector_table functions
2455to generate separate canonical definitions and constants
2456definitions for interrupt IDs/Masks, if interrupt pin of
2457same IP is connected to two axi intc pins
2458Updated xredefine_intc and intc_define_vector_table functions in
2459tcl, to add "LOW_PRIORITY" string in canonical/constant names of
2460interrupts connected to higher pin number of INTC, only if specific interrupt
2461port of IP is interrupting through more than one INTC pins.
2462Fixed compilation warnings in driver source code.It fixes CR#970483.
2463
2464iomodule_v2_4:
2465Fixed compilation warnings
2466
2467ipipsu_v2_2:
2468Modified the ipipsu.tcl script to have array size in config table. Fixes
2469CR#963134
2470Add support for updating ConfigTable at run time.CR#969385
2471
2472lwip141_v1_8:
2473Updated xemacpsif_physpeed.c to scan for phy addr when newer version of
2474Xilinx PCS PMA core is used.
2475Add Support for TI PHY DP83867 SGMII Mode configuration.
2476Fixed Compilation warnings - CR#957004
2477Add jumbo frame support for ZynqMP GEM.
2478Correct TI PHYCR initialization in xemacpsif_physpeed.c
2479Add SW workaround for TI DP83867 PHY link instability.
2480
2481nandpsu_v1_2:
2482change memcpy to Xil_MemCpy. fixes CR#960462
2483fix for the failure of reading nand first redundant paramter page
2484CR#966603
2485Fixed compilation warning in _g.c
2486Fixed MISRAC mandatory violation - CR#970533
2487
2488prd_v1_1:
2489Modified num instances parameter as XPAR_XPRD_NUM_INSTANCES in xparameters.h,
2490xprd_sinit.c to avoid compilation errors because it was updated as
2491XPAR_PR_DECOUPLER_NUM_INSTANCES in both files. Fix for CR#966099
2492
2493qspipsu_v1_4:
2494Fixed Compilation warnings - CR#957004
2495
2496rtcpsu_v1_4:
2497Fixed Compilation warnings - CR#957004
2498Correct  the calibration and frequency macros to generate the accurate time.
2499
2500rgb2ycrcb_v7_1:
2501Modified num instances parameter as XPAR_XRGB2YCRCB_NUM_INSTANCES
2502in xparameters.h, xrgb2ycrcb_sinit.c to avoid compilation errors
2503because it was updated as XPAR_RGB2YCRCB_NUM_INSTANCES in both
2504files. Fix for CR#966099
2505
2506scugic_v3_6:
2507Added new API XScuGic_Stop to Disable distributor and interrupts
2508in case they are being used only by current cpu. It also removes
2509current cpu from interrupt target registers for all interrupts.
2510Modified the scugic.tcl script to have array size in config table. Fixes
2511CR#963134
2512Add support for changing GIC CPU master at run time.CR#969386
2513Make the CpuId as static variable and Added new XScugiC_GetCpuId to access
2514CpuId.
2515Revert the changes made for CR#964552
2516
2517sdps_v3_2:
2518Corrected voltage switching sequence
2519Fixed Compilation warnings - CR#957004
2520Add DDR and HSD support for eMMC
2521Support for bus width switching based on hdf
2522Added support for A53-32bit on ZynqMP.
2523Fixed MISRAC mandatory violation - CR#970531
2524Fixed UR data flow anomalies
2525Add support in EL1 non secure mode
2526
2527standlone_v6_2:
2528Added Xil_MemCpy for word alinged data access
2529Added support for Floating point access for Cortex-A53 64bit mode standalone BSP
2530Added support for Cortex-A53 64bit EL1 Non-secure execution on hypervisor.
2531If hypervisor_guest is set true in bsp settings, it will be compiled for
2532EL1 Non-secure, else it will be compiled for EL3. By default Cortex A53 64bit
2533BSP is built for EL3 Secure Monitor.
2534Modified Cortex-A53 translation table for upper ps DDR. The 0x800000000 -
25350xFFFFFFFFF range is marked normal memory for the DDR size defined in hdf
2536and rest of the memory in that 32GB region is marked as reserved to avoid
2537any speculative access
2538Fixed Compilation warnings - CR#957004
2539Updated makefiles of R5 and a53 64 bit/32 bit processors to fix error in clean
2540target.It fixes the CR#966900.
2541Added IAR compiler support for Cortex R5 BSP.
2542Add safe Xil_Out32 implementation.
2543Fixed issues with Xil_DCacheDisable API. This is for CR#966220.
2544Updated arm/common, arm/cortexa9, arm/cortexa53 files for doxygen
2545compliant comments
2546Updated cortexa53/64bit/boot.S to clear FPUStatus variable to make sure
2547that it contains initial status of FPU i.e. disabled. In case of a warm
2548restart execution when bss sections are not cleared, it may contain
2549previously updated value which does not hold true once processor resumes.
2550This fixes CR#966826.
2551Updated common,microblaze and arm/cortexr5 files with doxygen compliant
2552comments.
2553Updated Cortex R5 IAR boot code to clear c15 registers and configure the
2554timer.
2555Added arm/cortexa53/64bit/xil_smc.c, xil_smc.h files to provide a C wrapper for
2556smc calling which can be used by cortex-A53 64bit EL1 Non-secure application
2557Added support thumb mode. CR-970805
2558Fixed MISRA C mandatory standard violations in ARM cortexr5 and cortexa53 BSP.
2559It fixes CR#970543
2560Fixed the CR#970859. The MB intrusive profiling when enabled was causing a crash
2561because of invalid HSI command being used. This change fixes it.
2562Updated standalone tcl to generate xparameter XPAR_FPD_IS_CACHE_COHERENT, if
2563any FPD peripheral is configured to use CCI.This change is applicable only for
2564psu_pmu processor bsp.It fixes CR#972638
2565
2566sysmonpsu_v2_1:
2567Fixed Compilation warnings - CR#957004
2568Added voltage conversion macro for Vcco_psio
2569Add PL reset check before PL sysmon reset
2570
2571tmrctr_v4_3:
2572Updated tmrctr_tapp tcl to avoid errors, if axi timer interrupt is connected
2573to more than one pins of interrupt controller.
2574
2575tmr_inject_v1_0:
2576Initial version of tmr_inject driver
2577
2578tmr_manager_v1_0:
2579Initial version of tmr_manager driver
2580
2581ttcps_v3_3:
2582Updated ttcps_tapp.tcl to check whether ttc device is interrupting current
2583processor or not.If device is not interrupting the current processor then,
2584do not include ttc driver instance and interrupt example source/header files to
2585peripheral test. It fixes CR#970569.
2586Updated gen_testfunc_call proc in ttcps_tapp.tclto fix bug in
2587instance number calculation.It fixes the CR#972418.
2588
2589uartlite_v3_2:
2590Added supported peripheral tmr_sem
2591
2592uartps_v3_4:
2593sync UART_CLK_FREQ_HZ parameter with xparameters.h file uart frequency
2594parameter macro
2595Fixed Compilation warnings - CR#957004
2596
2597usbpsu_1_2:
2598Updated source code to fix compilation errors for IAR compiler.
2599Corrected code for dereferncing event data CR#969056
2600
2601video_common_v4_1
2602Added new memory formats
2603Added API to get video mode id with matching blanking information
2604Fixed c++ compilation warnings
2605
2606v_frmbuf_rd_v1_0
2607added initial version
2608
2609v_frmbuf_wr_v1_0
2610added initial version
2611
2612vmix_v2_1
2613Added check to make sure logo layer is enabled before loading logo pixel alpha
2614Define size of configtable array in tcl and update generated g.c
2615Updated PowerOnDefault API to read video stream property from IP configuration
2616Updated processor name in example to reflect change in hardware example design
2617
2618vprocss_v2_3
2619Make log feature optional
2620Updated example design FULL topology test cases
2621Updated makefile to add compiler flags to seggregate dat and text sections
2622Updated mdd to remove sub-core version dependency
2623Added HasMADI flag to subsystem configuration and fix for CR#964829
2624Fixed c++ compilation warnings
2625
2626xilfpga_v2_0:
2627Added Encrypted BitStream Loading support to the xilfpga library.
2628Added Authenticated BitStream Loading support to the xilfpga library.
2629
2630wdttb_v4_1:
2631Fixed race condition in the driver CR#966068
2632
2633xilffs_v3_6:
2634Fixed Compilation warnings - CR#957004
2635Added configurable option for USE_STRFUNC
2636
2637xilflash_v4_3:
2638Fixed Compilation warnings - CR#957004
2639
2640xilisf_v5_8:
2641Fixed FastReadData bug - CR#968476
2642
2643xilmfs_v2_3:
2644Fixed Compilation warnings - CR#957004
2645
2646xilopenamp_v1_0:
2647obsoleted lib (was replaced in 2016.1 release by openamp lib)
2648This is mainly a name change to better match the github project library name.
2649
2650xilpm_v2_1:
2651- Modified clean rule in makefile to remove libxilpm.a. Fix for
2652CR#962551.
2653- Fixed Compilation warnings - CR#957004
2654- Added PM_INIT_FINALIZE API
2655- Added SET_CONFIGURATION API to load the config object
2656- Added config object generator tcl to generate the config data from HDF
2657
2658xilrsa_v1_3:
2659Updated makefile to add clean rule.Fix for CR#962551.
2660
2661xilsecure_v2_0:
2662Added support for PMU
2663Added comments with .nky fields for aes encryption example.
2664Provided genric APIs for encryption and decryption of data.
2665Provided separate example for encryption and decryption of data.
2666Support for Calculation of exponential value can also be done internally
2667Modified AES APIs such that, data passed to APIs should be in little endian
2668format.
2669Fixed compilation warning CR#971971
2670
2671xilskey_v6_2:
2672On ZynqMP Added CRC check after programming whole AES key.
2673For each ZynqMP eFUSE bit programming added verification with all 3 margin reads
2674Removed temperaure and voltage checks for every eFUSE bit programming for ZynqMP
2675Added support for programming more secure control bits-Lbist,LPD/FPD SC enable
2676Modified PROG_GATE programming from three inputs to one.
2677
2678ycrcb2rgb_v7_1:
2679Updated num instances parameter as XPAR_XYCRCB2RGB_NUM_INSTANCES
2680by modifying tcl and _sinit.c files to avoid compilation error. Fix
2681for CR-967548.
2682
2683zdma_1_2:
2684Updated driver to fix compilation errors for IAR compiler.
2685Added support for CCI.
2686
2687zynqmp_fsbl:
2688- Added support for micron QSPI 2G part.
2689- Added PL clearing based on the user configuration
2690- Added HIVEC support
2691- Fixed Vector regions overwritten in R5 FSBL with secure partitions CR#953663
2692- Enhanced secure bitstream authentication to more security.
2693- Added PPK hash and SPKI ID verification for eFUSE RSA authentication
2694- Locks XMPU/XPPU from further access after applying protection configuration,
2695but bypasses this configuration by default.
2696- Enabled ZCU106 board specific code.
2697- Replaced PM_INIT with SET_CONFIGURATION call.
2698- Restricts the FSBL creation if any mandatory IP for FSBL is either isolated for
2699the given processor or not exists in the design, or if OCM is not sufficient
2700- Added USB boot mode support in FSBL.
2701- Added APU ONLY reset.
2702- Made Xilpm library as mandatory for FSBL.
2703- Added authentication of image header prior to use.
2704- Modified Destination CPU check to check PMUFW CPU.
2705- Added LTO flags for FSBL
2706- Fix for multiple program sections in FSBL.
2707- Modified code for MISRA-C:2012 Compliance
2708- Fix to access BRAM in PS only reset.
2709- Fix to write correct value to ANALOG_BUS register
2710
2711libmetal_v1_2:
2712- Sync libmetal OSS project with upstream
2713
2714openamp_v1.3:
2715- Sync libmetal OSS project with upstream, i.e:
2716- Allow APU to restart independently from RPU
2717- Keep working with latest kernel
2718
2719openamp_rpc_demo:
2720openamp_matrix_multiply_demo:
2721openamp_echo_test:
2722- Update to work with updated openamp and libmetal libs
2723- Added reconnection to echo_test
2724
2725zynqmp_pmufw:
2726- Added support for APU sub-system restart
2727- Added support for WDT triggered APU restart and escalation
2728- Fixes for DDR Self-Refresh issues
2729- Added SET_CONFIGURATION API implementation to enable config object loading
2730- PM operations now depend on the config object loaded by FSBL
2731- Added PM_INIT_FINALIZE API call
2732- Added support for handling masters without PM enabled
2733- Debug prints are disabled by default. Can be enabled by defining DEBUG_MODE
2734- Fixes for mandatory MISRA C 2012 violations
2735- PMUFW now enables broadcasting of inner shareable transaction, if any LPD/FPD
2736  peripheral is configured to use CCI.This change is required to support CCI enabled
2737  peripherals in linux.
2738- Fixed build issues when ENABLE_PM is not defined
2739- Added PM_SECURE_RSA_AES API call to support secure image handling
2740- xilsecure is used by PMUFW to support encryption/decryption features
2741- Restore clocks config when APU reboots regardless of nodes state.
2742- Clear power down request bit when processor is forced down.
2743- Release reset after powering up a GPU pixel processor
2744- PmInitFinalize PM API call is added, which is used to inform the PFW that the caller master has initialized its own power management. Until a master calls PmInitFinalize, PFW will keep running/On all slaves which the master can use (this is defined with permissions provided in the configuration object). If a master doesn't have PM support, it will never call PmInitFinalize, so PFW will always ensure that all slaves that the master can use remain running.
2745- New 'uninitialized' state is used to capture that a master has not called PmInitFinalize. All masters are initially 'uninitialized'.
2746
2747Change Log for 2016.4
2748=================================
2749axiethernet_v5_3:
2750Fixed compilation errors for PMU template firmware on ZynqMP
2751for AXI-Ethernet based designs
2752
2753axipmon_v6_5:
2754Updated OCM axipmon example for proper ID
2755
2756iic_v3_4:
2757Reduce the usleep time in Bus-busy check condition.
2758Reduce the usleep time from 1000 to 100 usec in Bus-busy check condition.
2759
2760xilfpga_v1_1:
2761Added PL power-up and Isolation sequence to the xilfpga library
2762Added PS-PL Reset sequence.
2763Added Preprocessor check for XPAR_NUM_FABRIC_RESETS to avoid the
2764compilation errors.
2765Added gpio assert logic to properly reset the PL from PS.
2766
2767freertos823_xilinx_v1_3:
2768Added APIs handle_stdin_parameter and handle_stdout_parameter in
2769FreeRTOS tcl.::hsi::utils::handle_stdin and
2770::hsi::utils::handle_stdout are taken as a base for these APIs and
2771modifications are done on top of it to handle stdin and stdout parameters for
2772design which doesnt have UART.
2773It fixes CR#953681
2774
2775scugic_v3_5:
2776Fixed incorrect modification of interrupt target processor register in
2777XScuGic_InterruptMaptoCpu
2778
2779sdps_v3_1:
2780Fixed compilation warnings
2781Reduce the delay during power cycle
2782Use emmc_hwreset pin to reset eMMC card
2783Add delay between assert/deassert of emmc reset
2784Enable Rst_n bit in ext_csd reg if disabled
2785Add dll reset during auto tuning
2786
2787ttcps_v3_2:
2788Modified XTtcPs_GetCounterValue,XTtcPs_GetInterval and
2789XTtcPs_CalcIntervalFromFreq functions to use 32 bit counter/
2790interval values for zynq ultrascale+mpsoc.It fixes CR#962482.
2791
2792xilffs_v3_5:
2793Removed enable_mmc option
2794Added support for FreeRTOS
2795
2796xilskey_v6_1:
2797Removed Zynq BBRAM control bits as they are part of the eFUSE
2798Fixed compilation warnings
2799Added support for PUF registration and eFUSE programming with PUF data
2800Removed xilinx specific bits programming
2801
2802v_deinterlacer_v6_2:
2803Fix c++ compile problem
2804
2805v_hscaler_v3_1:
2806Fixed configuration validation check for RGB input
2807
2808vprocss_v2_2:
2809Capture failure during router data flow setup in log buffer
2810
2811Standalone_v6_1:
2812Defines interrupt ID number for FPD_SWDT, renamed XPS_WDT_INT_ID
2813as XPS_LPD_SWDT_INT_ID in xparameters_ps.h of cortex r5 and for
281432bit, 64bit of cortex a53 and also removed SCUTIMER, SCUWDT
2815parameters as they are private timers for a9 only.
2816Fix for CR-962858.
2817Modified CortexA9 translation table to correct explanation for memory
2818attributes to fix CR#963345
2819
2820Removes DMAPS and PS7 definitions as they are supported
2821by Zynq, and modifies interrupt ID number for FPGA in
2822xparameters_ps.h of cortex r5 and for 32bit, 64bit of cortex a53.
2823Fix for CR-963258.
2824
2825openamp_v1_2:
2826sync with upstream (fix mem allocator, run as rpmsg master, flood ping)
2827
2828libmetal_v1_1:
2829sync with upstream (fix interrupt handling for more than one handler)
2830
2831openamp apps: echo_test, rpc_demo, mat_mul
2832sync with upstream demo apps
2833remove duplicated definitions
2834update linker script to have vector table and boot section together
2835
2836xilmfs_v2_2:
2837CR#962571: Update Makefile to fix the compilation issues due to incremental
2838build
2839
2840dprxss_v4_0:
2841CR#960371: Move DP159 files out of video_common to dprxss.
2842CR#964969: Added interrupt handler for HDCP authentication.
2843
2844video_common_v4_0:
2845CR#956975: Modified functions to return fixed point instead of floating point
2846CR#960371: Move DP159 files out of video_common to dprxss.
2847
2848xilpm_v2_0:
2849- Added missing API IDs to sync up with PMUFW
2850- Migrated to a new shutdown interface to support passing shutdown type and sub-type arguments
2851
2852zynqmp_pmufw:
2853- Fixed DDR self-refresh sequence to trigger RDIMM init and update drift settings
2854- Split MMIO regions for finer granularity in permissions
2855- Added GET_CHIPID API to query the silicon version register value
2856- Removed shutdown callbacks. Now shutdown requests are executed as they come in.
2857- Fixed build errors when DEBUG_MODE is disabled
2858- Error Management module is disabled by default and should be enabled by adding ENABLE_EM to build flags
2859- MISRA C related fixes have been applied
2860- Migrated to a new shutdown interface to support passing shutdown type and sub-type arguments
2861- Updated XPfw_UserStartUp function to enable broadcasting of inner shareable transaction, if
2862  any LPD/FPD peripheral is configured to use CCI.This change is required to support CCI enabled
2863  peripherals in linux.
2864
2865zynqmp_fsbl:
2866- PS PL isolation is now removed by calling psu_ps_pl_isolation_removal_data() from psu_init.c
2867instead of using fsbl local API XFsbl_PowerUpIsland(). psu_ps_pl_isolation_removal_data()
2868function also has AXI data width configurations which are required.
2869- Added support for initializing upper PS DDR (earlier only lower PS DDR was supported).
2870- Fixed GT mux configuration logic in FSBL for ZCU102, by making each lane individually configurable.
2871- For ZCU102, FSBL sets VADJ in the board specific configuration. Since, this needs to be done only
2872if design has PL DDR (to take PL DDR out of reset), this code is now included under the
2873corresponding conditional.
2874
2875axicdma_v4_3:
2876- Fixed compilation warnings
2877
2878canfd_v1_2:
2879- Fixed compilation warnings
2880
2881canps_v3_2:
2882- Fixed compilation warnings
2883
2884dmaps_v2_2:
2885- Fixed compilation warnings
2886
2887gpio_v4_3:
2888- Fixed compilation warnings
2889
2890hwicap_v10_2:
2891- Fixed compilation warnings
2892
2893iicps_v3_4:
2894- Fixed compilation warnings
2895
2896iomodule_v2_4:
2897- Fixed compilation warnings
2898
2899nandpsu_v1_1:
2900- Fixed compilation warnings
2901
2902qspispu_v1_3:
2903- GQSPI PollData/PollTimeout for dualparallel configurations
2904
2905tmrctr_v4_2:
2906- Used UINTPTR instead of u32 for Baseaddress
2907
2908- Changed the prototype of XTmrCtr_CfgInitialize API
2909
2910- Fixed wrong canonical defines for axi_timer
2911
2912uartps_v3_3:
2913- Fixed compilation warnings
2914
2915usbpsu_v1_1:
2916- Added USB 3.0/2.0 backward capability
2917
2918Change Log for 2016.3
2919=================================
2920freertos823_xilinx_v1_2:
2921Created new version to support event trace through Coresight STM
2922Updated tcl files as per modified standalone BSP structure.
2923
2924lwip141_v1_6:
2925Add support for freertos in the emaclite adapter. Fix for CR#957572.
2926Expose NO_SYS_NO_TIMERS and LWIP_TCP_KEEPALIVE as options
2927
2928emaclite_v4_3:
2929Fix compilation warning.
2930
2931axidma_v9_3:
2932Reduce the size of the buffer descriptor to 64 bytes
2933
2934axicdma_v4_2:
2935Fix compilation warining in the 64-bit platforms.
2936
2937axipmon
2938
2939axivdma_v6_2:
2940Fix compilation warining in the 64-bit platforms.
2941
2942axis_switch_v1_1:
2943Used UINTPTR type for BaseAddress
2944
2945coresightps_dcc_v1_1:
2946Created a new version of the driver to ensure that for MB based systems the driver
2947is not included. This fixes the CR#953056.
2948
2949cpu_cortexa53_v1_2:
2950Added new parameter for A53 execution mode
2951
2952ddrcpsu_v1_1:
2953Export ddr freq value to xparameters.h file.
2954
2955dmaps_v2_2:
2956Removed definition of "INLINE" macro from xdmaps.c to avoid
2957re-definition of the same, since "INLINE" macro is defined
2958in xil_io.h.
2959
2960v_hdmirxss_v3_0:
2961update SI5324 driver to support fast-switching mode
2962Improve HDCP 1.4 authentication
2963
2964v_hdmitxss_v3_0:
2965update SI5324 driver to support fast-switching mode
2966Update function call sequence in XV_HdmiTxSs_StreamUpCallback
2967
2968v_hdmirx_v1_2:
2969squash unused variable compiler warning
2970Resolve wrong image size issue when HTotal=0
2971
2972v_hdmitx_v1_2:
2973Added API to set AXI4-Lite clock frequency
2974squash unused variable compiler warning
2975
2976v_hdmirxss_v3_0:
2977Combine multiple report API into one ReportInfo
2978Clean up warnings
2979Add Event Log
2980
2981v_hdmitxss_v3_0:
2982Add Config to get AXI4-Lite clock frequency from HW and set hdmi tx core
2983Added Event Log
2984Combine Report function into one ReportInfo
2985squash unused variable compiler warning
2986Update XV_HdmiTxSs_SetAudioChannels
2987
2988v_hdmirx_v1_2:
2989Up version to 1.2 with the following updates:
2990Update Address data type to support ZynqMP
2991Update HDCP support
2992
2993v_hdmitx_v1_2:
2994Up version to 1.2 with the following updates:
2995Remove checking VideoMode
2996Update Address data type to support ZynqMP
2997
2998v_hdmirxss_v3_0:
2999Up version to 3.0 with the following updates:
3000Add HDCP repeater support
3001Add HDCP 1.4 & 2.2 auto switching support
3002Add Import Example Design support
3003Update to optimize out HDCP when excluded
3004
3005v_hdmirxss_v3_2:
3006Fix to prevent HDCP protocol switching when only one protocol is in the design
3007
3008v_hdmitxss_v3_0:
3009Up version to 3.0 with the following updates:
3010Add HDCP repeater support
3011Add HDCP 1.4 & 2.2 auto switching support
3012Add Import Example Design support
3013Update Address data type to support ZynqMP
3014Remove checking VideoMode
3015Update to optimize out HDCP when excluded
3016
3017
3018dptx_v3_0:
3019Obsoleted in lieu of the dp driver.
3020
3021dp_v5_1:
3022Updated version from 5.0 to 5.1.
3023Updated to access timing table from video_common using APIs.
3024Use consolidated usleep rather than deprecated MB_Sleep.
3025Updated self-test to reflect IP updates.
3026Update to use new video_common v3.1.
3027RX to support maximum pre-emphasis level of 1.
3028
3029dprxss_v3_1:
3030Updated version from 3.0 to 3.1.
3031Synchronize with new HDCP API modifications.
3032Added HDCP timeout functionality.
3033Update to use new video_common v3.1.
3034
3035dptxss_v4_1:
3036Updated version from 4.0 to 4.1.
3037Synchronize with new HDCP API modifications.
3038Reordered VTC enable and DPTX core enable.
3039Update to use new video_common v3.1.
3040Fix for native video mode compilation.
3041
3042gpio_v4_2:
3043Used UINTPTR type for BaseAddress
3044
3045iicps_v3_3:
3046Modified code for MISRA-C:2012 Compliance
3047
3048ipipsu_v2_1:
3049Modified code for MISRA-C:2012 Compliance
3050
3051sysmonpsu_v1_1:
3052Modified driver code for MISRA-C:2012 Compliance
3053Added SEQ_CH2_REG and SEQ_AVG2_REG, SEQ_INPUT2, SEQ_ACQ2
3054and CFG3_REG configurations
3055
3056emacps_v3_3:
3057Fixed IEEE1588 example issue for Zynq (CR#951152
3058
3059qspipsu_v1_2:
3060Add LQSPI support
3061Added Tap delay support.
3062Added PollData and PollTimeout Support
3063Update PollData and PollTimeout for dualparallel configurations
3064
3065v_mix_v2_0:
3066Add support for logo layer per pixel alpha feature
3067
3068scugic_v3_4:
3069Updated tcl to return correct PL ips' interruptIDs when no interrupt is connected to pl_ps_irq0 to fix CR#953335
3070Made changes in xscugic.c. Created a new static function DoDistributorInit to simplify the flow and avoid code duplication.
3071Changes are made for USE_AMP use case for R5. In a scenario (in R5 split mode) when one R5 is operating with A53 in open amp config
3072and other R5 is running baremetal application, the existing code had the potential to stop AMP to work (if for some reason
3073the R5 running the baremetal app tasked to initialize the Distributor hangs or crashes before initializing the Distributor).
3074Changes are made so that the R5 under AMP first checks if the distributor is enabled or not and if not, it does the standard Distributor initialization.
3075This fixes the CR#952962.
3076
3077standalone_v6_0:
3078Make Xil_AsserWait a global variable
3079Updated cortexr5/mpu.c to move the code related to Init_MPU to .boot section since it is part of boot process to fix CR#949555
3080Program the counter frequency in boot code for CortexA53
3081Update get_pins command in the standalone bsp tcl as per 2016.3 hsi
3082Updated the sleep_common function in microblaze_sleep.c. Fix for CR#954191.
3083Restructured the BSP to avoid code duplication across all BSPs.Source code directories specific to ARM processor's are
3084moved to src/arm directory(i.e. src/cortexa53,src/cortexa9 and src/cortexr5 moved to src/arm/cortexa53,src/arm/cortexa9
3085and src/arm/cortexr5 respectively).Files xil_printf.c,xil_printf.h,print.c,xil_io.c and xil_io.h are consolidated across all
3086BSPs into common file each and consolidated files are kept at src/common directory.Files putnum.c,vectors.c,vectors.h,
3087xil_exception.c and xil_exception.h are consolidated across all ARM BSPs into common file each and consolidated
3088files are kept at src/arm/common directory.GCC files related to file operations are consolidated and kept at src/arm/common/gcc
3089directory.
3090All io interfacing functions (i.e. All variants of xil_out, xil_in ) are made as static inline and implementation
3091is kept in consolidated common/xil_io.h,xil_io.h must be included as a header file to access io interfacing functions.
3092Added undefined exception handler for A53 32 bit and R5 processor.
3093Updated xtime_l.c in R5 BSP to remove implementation of XTime_SetTime API, since TTC counter value register is read only.
3094Updated the signature for functions sleep/usleep. This fixes the CR#956899.
3095Added PSS_PSU_REF_CLK macro to xparameters.h for ZynqMP A53 and R5.
3096Removed unused variables from xil_printf.c and xplatform_info.c
3097Defined ARMA53_32 flag in cortexa53/32bit/xparameters_ps.h.
3098Defined ARMR5 flag in cortexr5/xparameters_ps.h.
3099Added support for zynq 7000s devices
3100Modified xil_io.h to remove __LITTLE_ENDIAN__ flag check for all ARM processors.
3101
3102sdps_v3_0:
3103Added support for mkfs.
3104Updated the copyright year to 2016.
3105Used usleep API instead of MB_Sleep API.
3106Added BUS_WIDTH, BUS_WIDTH, MIO_Bank and HAS_EMIO parameters.
3107Added support for UHS modes.
3108Corrected the logic.
3109Added tap delays for SD/eMMC.
3110Removed sleep.h file from xsdps.h file
3111
3112uartps_v3_2:
3113Modified the transmission break bit set logic.
3114
3115v_axi4s_remap:
3116Used UINTPTR type for BaseAddress
3117
3118v_csc_v2_1:
3119Used UINTPTR type for BaseAddress
3120
3121v_deinterlacer_v6_1:
3122Used UINTPTR type for BaseAddress
3123
3124v_hcresampler_v3_0:
3125Used UINTPTR type for BaseAddress
3126Added passthrough mode support
3127Removed layer1 API's for coefficient peek/poke
3128
3129v_vcresampler_v3_0:
3130Used UINTPTR type for BaseAddress
3131Added passthrough mode support
3132Removed layer1 API's for coefficient peek/poke
3133
3134v_hscaler_v3_0:
3135Used UINTPTR type for BaseAddress
3136Added optional color format conversion handling
3137
3138v_vscaler_v3_0:
3139Used UINTPTR type for BaseAddress
3140Added optional color format conversion handling
3141
3142v_letterbox_v2_1:
3143Used UINTPTR type for BaseAddress
3144
3145v_mix_v2_0:
3146Used UINTPTR type for BaseAddress
3147Added per pixel alpha support to logo layer
3148
3149v_procss_v2_1:
3150Used UINTPTR type for BaseAddress
3151Added optional color format conversion hadnling in scale-only topology
3152Added support to maintain user defined PIP background color after pipe reset
3153Replace deprecated MB_Sleep with usleep
3154
3155video_common_v3_1:
3156Updated version from 3.0 to 3.1.
3157Reordered wait for PLL lock.
3158
3159vtc_v7_2:
3160Added compilation protection in case driver is included without instantiation.
3161Used UINTPTR type for BaseAddress
3162
3163xilffs_v3_4:
3164Added support for mkfs.
3165Added support for multi partitions.
3166Added support for multiple logical drives.
3167Updated the copyright year to 2016.
3168Corrected the data type of temp variable.
3169Enable the _WORD_ACCESS option.
3170Used usleep API instead of MB_Sleep API.
3171Included sleep.h in diskio.c file
3172
3173xilisf_v5_7:
3174Added support for SubSector erase.
3175Updated subsector erase function for Atmel/Winbond
3176
3177xilkernel_v6_4:
3178Fixed CR:955364 update get_pins command as per 2016.3 hsi changes are made in
3179the bsp tcl file.
3180Updated the DEPENDS in mld, tcl and makefile to standalone_v6_0 from standalone.
3181
3182xilskey_v6_0:
3183Added margin 2 read checks for Zynq eFUSE PS and PL.
3184Ultrscale eFUSE programming is handled using hardware
3185module, Hardware module is controlled through GPIO pins,
3186Modified Ultrascale eFUSE example and input.h files to
3187accept GPIO pin numbers from user, Corrected sysmon
3188temperature read to 16-bit resolution.
3189Fixed CR #954260 to correct the sequence of Zynq eFUSE programming
3190Modified ZynqMP PS eFUSE's single USER key programming to
3191separate 32 bit User keys. Provided single bit programming
3192for User Key.
3193For Ultrascale: Added 128 bit user key programming.
3194Provided single bit programming for User keys 32 and
3195128 bit User keys. Added error codes on failures.
3196BBRAM is updated to have DPA protection, and
3197count configuration.
3198
3199xilmfs_v2_1:
3200CR#958938: Update freertos OS name in xilmfs.mld as per latest freertos port.
3201
3202libmetal_v1_0:
3203Add libmetal open-source project to support OpenAMP
3204
3205libmetal_echo_demo_v1_0:
3206Add an echo demo to show the communication between baremetal
3207and Linux application with libmetal APIs
3208
3209openamp_v1.1:
3210Use libmetal to abstract OS services.
3211Automatically set extra compiler flags -DUNDEFINE_FILE_OPS
3212based on WITH_PROXY parameter setting in the GUI.
3213
3214openamp_rpc_demo:
3215openamp_matrix_multiply_demo:
3216openamp_echo_test:
3217Apps changed to use vector table in TCM
3218Initialization changed for libmetal support.
3219Added some debug print with xil_printf.
3220
3221freertos_lwip_echo_server:
3222Fix echo thread stack size. CR#958898.
3223
3224zynqmp_pmufw:
3225
3226- The IPI Framework is now fully integrated with IPI Driver.
3227So PMUFW now works only with a HDF generated from 2016.3 release
3228and uses the IPI configuration as specified in HDF.
3229
3230- FPD power-off suspend is now supported with DDR in self-refresh mode.
3231The sequences required for transitioning DDR into and out of Self-Refresh
3232are included in this release.
3233
3234- Clocks dependencies are modelled and PLLs usage is accounted. This enables
3235suspending of unused PLLs.
3236
3237- PMUFW syncs up with FSBL to initialize the clock/PLL related data structures.
3238IPI or a Register Poll is used as a sync mechanism depending on the order in
3239which FSBL and PMUFW are loaded. A corresponding change in FSBL is also in
3240this release, which means the sync mechanism is taken care seamlessly in the flow.
3241
3242- Linker script has fixes to account for the exact size of PMU RAM available for
3243Firmware, which is 125.7 KB. By default PMUFW is built with -O0 optimization.
3244In case of insufficient memory due to addition of custom code, optimization
3245can be changed to -Os.
3246
3247- PMUFW uses XilFPGA library and it is included by default in the build.
3248APIs to load bitstream into PL have been added.
3249
3250- TCMs are initialized to prevent ECC errors during a power cycle and all
3251dependencies to make TCMs accessible are handled.
3252
3253- FPD power up/down routines are made available as hooks which can be used to
3254override default handlers.
3255
3256- Power operations (using PM module) on unavailable islands have been blocked and
3257return an error.
3258
3259- Each module now resides in its own file with xpfw_mod_ prefix. All modules
3260should follow the same prefix to differentiate from core files and
3261segregate functionality.
3262
3263zynqmp_fsbl:
3264- Avoided multiple IPI triggers during PMUFW load. FSBL now triggers IPI for just the first partition of PMUFW. FSBL wakes up PMU after loading all partitions.
3265- Added compile time check to ensure FSBL (A53_64) is built only with EL3 BSP.
3266- Added support for SHA3 checksum validation by FSBL for partitions that it loads.
3267- FSBL identifies device type and restricts handoff to unavailable CPU cores accordingly.
3268- To optimize usage of OCM, reduced stack usage of exception handlers (R5) and removed stacks for EL0/1/2.
3269- Changed the ECC Initialization code to use ADMA for DMA transfers. Earlier, GDMA was used, which cannot be accessed when FPD is powered down.
3270- FSBL now calls protection/security configuration functions defined by psu_init. This is used for XMPU/XPPU configuration, if any, as per design.
3271- Changed FSBL error code storage register to PMU_GLOBAL_PERS_GLOB_GEN_STORAGE4 (0xFFD80040).
3272- Added XFsbl_PmInit call to notify PMU firmware that initialization of all PM related registers is complete.
3273- Corrected print format for Performance measurement value (fractional part).
3274- Authentication Certificate for the partition will now be copied separately to an OCM buffer (not to memory area where partition is to be loaded).
3275- Changed the FSBL memory layout to have more space for ATF in OCM. FSBL now starts at 0xFFFC0000 and ends at 0xFFFEA000.
3276- Added support for TCM ECC Initialization in FSBL (always in R5 and conditionally in A53).
3277- Added a hook in FSBL to facilitate users to define different variants of psu_init() functions based on different configurations in Vivado.
3278- Remove inline specifier from function prototypes (as per new version of GCC).
3279- Corrected (feature include/exclude) logic to resolve DDRless build failure.
3280- Change done to calculate the actual read offset including bad blocks while reading from NAND. This read offset will be calculated against each read call from FSBL.
3281- Disabled the use_mkfs option in FSBL.
3282
3283zynq_fsbl:
3284- Fabric Initialization sequence is modified to check the PL power before sequence starts and checking INIT_B reset status twice in case of failure.
3285
3286
3287Change Log for 2016.2
3288=================================
3289axidma_v9_2:
3290Fixed compilation warnings in the driver and examples
3291
3292axiethernet_v5_2:
3293Fixed compilation errors for a specific axi ethernet design
3294
3295csudma_v1_1:
3296Fixed race condition in the recv path when source and destination
3297points to the same buffer
3298
3299ddrcpsu:
3300Added initial version of DDRC driver
3301
3302dp_v5_0:
3303Updated version from 4.0 to 5.0.
3304Added additional color encoding support.
3305
3306dptxss_v4_0:
3307Updated version from 3.0 to 4.0.
3308Expose API to set (a)synchronous clock mode.
3309
3310iicps_v3_2:
3311Added workaround for repeated start issue on zynq.
3312
3313scugic_v3_3:
3314Modified XScuGic_InterruptMaptoCpu to write proper value to interrupt target register to fix CR#951848.
3315
3316sdps_v2_8:
3317Added new workaround for auto tuning.
3318Changed the Sleep time in Microblaze.
3319Modified the standard speed of SD to 19MHz.
3320
3321sysmon_v7_3:
3322Updated interrupt example to support ZynqMP
3323sysmon: Corrected conversion formulae
3324sysmon: Corrected interrupt ID of ZynqMP
3325
3326qspipsu_v1_1:
3327qspipsu: Added debug message prints.
3328
3329usb_v5_2:
3330Updated the driver to support 64-bit DMA addressing
3331
3332v_hdmirx_v1_1:
3333Updated VTD control in HDMI RX core driver
3334
3335v_hdmirxss_v2_0:
3336Added DDC peripheral HDCP mode selection to XV_HdmiRxSs_HdcpEnable
3337
3338v_hdmirx_v1_1:
3339Add DDC mode selection for HDCP 1.4 and HDCP 2.2
3340
3341v_hdmitxss_v2_0:
3342
33431. Files changed: xv_hdmirxss.c, xv_hdmirxss_coreinit.c, xv_hdmitxss.c, xv_hdmitxss_coreinit.c
33442. VTC driver has been updated to avoid processor exceptions. Workarounds have been removed.
33453. HDCP 1.x driver now uses AXI timer 4.1, so updated to use AXI Timer config structure to determine timer clock frequency
33464. HDCP 1.x driver has fixed the problem where the reset for the receiver causes the entire DDC peripheral to get reset. Based on this change the driver has been updated to use XV_HdmiTxSs_HdcpReset and XV_HdmiRxSs_HdcpReset functions directly.
33475. Updated XV_HdmiTxSs_HdcpEnable and XV_HdmiRxSs_HdcpEnable functions to ensure that HDCP 1.4 and 2.2 are mutually exclusive. This fixes the problem where HDCP 1.4 and 2.2 state machines are running simultaneously.
3348
3349video_common_v3_0:
3350Updated version from 2.2 to 3.0. All video drivers have been updated to use 3.0.
3351Added API to search on reduced blanking video modes.
3352Updated DP159 to poll I2C bus busy prior to initiation of reads and writes.
3353Added Y-only color format.
3354
3355xilpm_v2:
3356XPm_ClientSuspendFinalize API for RPU now disables lock-step fault log before going to wfi. This ensures that false lock-step errors are not triggered during a power-cycle.
3357Example now uses XPm_ClientSuspendFinalize API instead of a direct wfi
3358call
3359
3360xilfpga_v1_0:
3361Added supported_peripheral field in mld for xilfpga library.
3362It supports only for ZynqMp.
3363
3364xilffs_v3_3:
3365Added one second delay before CD pin check.
3366Corrected the if condition logic.
3367
3368xilisf_v5_6:
3369Added support for MT25QU02G part.
3370Corrected the missing WE before erase.
3371
3372zynqmp_fsbl:
3373Added support for DDR ECC Initialization Fixed the bug causing PMUMB
3374wakeup right after loading of first PMUFW partition in boot images with only FSBL and PMUFW present. Now it is being done after all partitions of PMUFW are loaded.
3375ATF handoff parameter addresses are now being stored in PMU_GLOBAL.
3376Printing address in case of address error.
3377Bypassed debouncing logic for SD card so that SD controller doesn't wait for long durations for card to be stable.
3378Removed enabling of debug logic for R5 lock-step mode.
3379
3380zynq_fsbl:
3381Added symbols to linker script to prevent linking failures in absence of spec file.
3382
3383zynqmp_pmufw
3384Fixed context saving/reset issue when powering down FPD IPI calls are
3385always acknowledged in case of invalid payload RPU, PS-Only and PL
3386resets have been added to pm_reset API Fixes related to compiler
3387warnings and uninitialized variables mmio_write API has been fixed to
3388use the mask argument correctly
3389
3390
3391Change Log for 2016.1
3392=================================
3393Removed the following versions from the 2016.1 build:
3394axicdma_v2_03_a, axidma_v7_02_a, axidma_v8_0, axiethernet_v3_02_a, axiethernet_v4_0,
3395axiethernet_v4_1, axiethernet_v4_2, axiethernet_v4_3, axipcie_v2_03_a, axipcie_v2_04_a,
3396axipmon_v4_00_a, axipmon_v5_00_a, axivdma_v4_05_a, axivdma_v4_06_a, bram_v3_02_a, bram_v3_03_a,
3397canps_v1_01_a, canps_v1_02_a, canps_v2_0, ccm_v4_00_a, ccm_v5_0, cfa_v5_00_a, cfa_v6_0,
3398cpu_cortexa9_v1_01_a, cpu_cortexa9_v2_0, cpu_v1_15_a, cresample_v2_00_a, cresample_v3_0,
3399deinterlacer_v2_00_a, deinterlacer_v3_0, deinterlacer_v3_1, devcfg_v2_03_a, devcfg_v2_04_a,
3400devcfg_v3_0, devcfg_v3_1, devcfg_v3_2, dmaps_v1_05_a, dmaps_v1_06_a, dmaps_v1_07_a, dmaps_v2_0,
3401dptx_v1_0, dptx_v2_0, emaclite_v3_04_a, emacps_v1_04_a, emacps_v1_05_a, emacps_v1_06_a,
3402emacps_v2_0, emacps_v2_1, emc_v3_01_a, enhance_v5_00_a, enhance_v6_0, gamma_v5_01_a, gpio_v3_01_a,
3403gpiops_v1_01_a, gpiops_v1_02_a, gpiops_v2_0, gpiops_v2_1, hwicap_v8_01_a, ic_v3_00_a, iic_v2_07_a,
3404iic_v2_08_a, iicps_v1_03_a, iicps_v1_04_a, iicps_v2_0, iicps_v2_1, iicps_v2_2, intc_v2_06_a,
3405intc_v2_07_a, intc_v3_0, intc_v3_1, intc_v3_2, iomodule_v1_04_a, iomodule_v2_0, llfifo_v2_03_a,
3406llfifo_v3_00_a, manr_v3_00_a, mbox_v3_04_a, mig_7series_v1_00_a, mutex_v3_02_a, nandps_v1_04_a,
3407nandps_v2_0, nandps_v2_1, noise_v4_00_a, os_v3_00_a, osd_v2_00_a, osd_v3_0, qspips_v2_02_a,
3408qspips_v2_03_a, qspips_v3_0, qspips_v3_1, rgb2ycrcb_v5_01_a, rgb2ycrcb_v6_0, scaler_v4_03_a,
3409scaler_v5_00_a, scaler_v6_0, scugic_v1_04_a, scugic_v1_05_a, scugic_v1_06_a, scugic_v2_0,
3410scutimer_v1_02_a, scuwdt_v1_02_a, sdps_v1_00_a, sdps_v2_0, sdps_v2_1, sdps_v2_2, spi_v3_05_a,
3411spi_v3_06_a, spi_v3_07_a, spips_v1_05_a, spips_v1_06_a, stats_v4_00_a, sysmon_v5_03_a, sysmon_v6_0,
3412tft_v4_00_a, tft_v4_01_a, tft_v5_0, tmrctr_v2_05_a, tpg_v1_00_a, tpg_v2_0, trafgen_v1_00_a,
3413trafgen_v2_00_a, trafgen_v2_01_a, trafgen_v3_0, trafgen_v3_1, ttcps_v1_01_a, ttcps_v2_0,
3414uartlite_v2_01_a, uartns550_v2_01_a, uartns550_v2_02_a, uartns550_v3_0, uartns550_v3_1,
3415usb_v4_03_a, usb_v4_04_a, usbps_v1_04_a, usbps_v1_05_a, usbps_v1_06_a, usbps_v2_0, usbps_v2_1,
3416vtc_v4_00_a, vtc_v5_00_a, vtc_v6_0, wdtps_v1_02_a, wdttb_v2_00_a, xadcps_v1_01_a, xadcps_v1_02_a,
3417xadcps_v1_03_a, ycrcb2rgb_v5_01_a, standalone_v3_10_a, standalone_v3_11_a, standalone_v3_12_a,
3418standalone_v4_0, standalone_v4_1, xilkernel_v5_01_a, xilkernel_v5_02_a, xilkernel_v6_0, xilkernel_v6_1,
3419xilisf_v3_02_a, xilisf_v4_0, xilskey_v1_00_a, xilmfs_v1_00_a, lwip140_v1_05_a, lwip140_v1_06_a,
3420lwip140_v2_0, lwip140_v2_1, lwip140_v2_2
3421
3422axicdma_v4_1:
3423Updated examples with MIG DDR3 defines
3424Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3425
3426axidma_v9_1:
3427Updated examples with MIG DDR3 defines
3428Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3429Minor changes in the driver and examples for removing warnings.
3430
3431axiethernet_v5_1:
3432Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3433Changed the prototype of XAxiEthernet_CfgInitialize API.
3434Fix compilation errors in case of zynqmp to fix CR#933825.
3435Updated the tcl to removed delete filename statement to fix CR# 784758.
3436
3437axipcie_v3_0:
3438Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3439Changed the prototype of XAxiPcie_CfgInitialize API.
3440
3441axipmon_v6_4:
3442Added interrupt example support for ZynqMP.
3443Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3444
3445axivdma_v6_1:
3446Updated examples with MIG DDR3 defines.
3447Fix example compilation issue on zynqmp.
3448Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3449Changed the prototype of XAxiVdma_CfgInitialize API.
3450
3451bram_v4_1:
3452Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3453Changed the prototype of XBram_CfgInitialize API.
3454Updated the tcl to removed delete filename statement to fix CR# 784758.
3455
3456can_v2_00_a:
3457Removed from the build.
3458Fixed the CR#911958 (RecvFrame not working with data length less than 8bytes and greater than 4 bytes).
3459
3460canfd_v1_1:
3461Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3462Changed the prototype of XCanFd_CfgInitialize API.
3463
3464canps_v3_1:
3465Fixed CR#911958 to add support for Tx Watermark example.
3466Data mismatch while sending data less than 8 bytes.
3467Updated XCanPs_IntrHandler in xcanps_intr.c to handle error interrupts correctly for CR#925615
3468Fixed missing error interrupts, during can compliance test.
3469Modified tapp tcl to support microblaze.
3470Modified xcanps_intr_example to support intc interrupt controller.
3471
3472Changed file name ccm.h to xccm.h.
3473Moved register offsets and bit definitions to xccm_hw.h file.
3474Added enums.
3475Added range macros.
3476Added the structure type definitions XCcm_Config and XCcm.
3477Removed the functional macros.
3478Added the following macros:
3479XCcm_Enable, XCcm_Disable,XCcm_RegUpdateEnable, XCcm_SyncReset, XCcm_Reset, XCcm_IntrGetPending,
3480XCcm_IntrEnable, XCcm_IntrDisable, XCcm_StatusGetPending, XCcm_IntrClear, XCcm_Start, XCcm_Stop.
3481Added the register offsets and bit masks for the registers.
3482Added backward compatibility macros.
3483Changed filename ccm to xccm.c.
3484Implemented the following functions:
3485XCcm_CfgInitialize, XCcm_Setup, XCcm_GetVersion, XCcm_EnableDbgByPass, XCcm_IsDbgByPassEnabled,
3486XCcm_DisableDbgByPass, XCcm_EnableDbgTestPattern, XCcm_IsDbgTestPatternEnabled,
3487XCcm_DisableDbgTestPattern, XCcm_GetDbgFrameCount, XCcm_GetDbgLineCount, XCcm_GetDbgPixelCount,
3488XCcm_SetActiveSize, XCcm_GetActiveSize, XCcm_SetCoefMatrix, XCcm_GetCoefMatrix, XCcm_SetRgbOffset,
3489XCcm_GetRgbOffset,XCcm_SetClip, XCcm_GetClip, XCcm_SetClamp XCcm_GetClamp XCcm_FloatToFixedConv,
3490and XCcm_FixedToFloatConv.
3491Implemented XCcm_SelfTest function.
3492Implemented XCcm_LookupConfig function.
3493Implemented the functions: XCcm_IntrHandler, XCcm_SetCallBack.
3494
3495cpu_cortexa9_v2_2:
3496Modified cpu_cortexa9 driver mdd file to change compiler to arm-none-eabi-gcc (Linaro)
3497and archiver to arm-none-eabi-ar (Linaro). Modified the extra_compiler_flags to
3498"-mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard -nostartfiles". Linaro toolchain supports hard-float.
3499Modified cpu_cortexa9 driver tcl to properly update for the extra compiler flag for different
3500compilers (Linaro GCC, armcc, IARCC).
3501Added --cpu=Cortex-A9 flag to compiler flag for iccarm to fix CR#938718
3502Modified the tcl to take only the toolchain name when a complete path is passed. This fixes CR#939108.
3503Made changes in the tcl to have separate cases for code sourcery and armcc toolchains.
3504
3505cpu_cortexa53_v1_1:
3506Modified the cpu_cortexa53 tcl to add the extra compiler flag ARMA53_32 for A53 32bit BSP
3507Added timestamp clock frequency to xparamters.h by adding C_TIMESTAMP_CLK_FREQ to cpu driver tcl
3508
3509cpu_v2_4:
3510Updated generate and post_generate procs, not to generate cpu macros, when microblaze is
3511connected as one of the streaming slaves to itself. This is for CR#876604.
3512
3513csi_v1_0:
3514Added the initial version of MIPI CSI2 RX Controller driver.
3515Add Word Count Corruption interrupt feature
3516
3517devcfg_v3_4:
3518Fix for CR#784758. Changes in driver tcl to delete filename statement.
3519
3520dp_v4_0
3521Made changes in mdd file to change OPTION DEPENDS to video_common_v2_2.
3522Added APIs:
3523- XDp_IsLinkRateValid
3524- XDp_IsLaneCountValid
3525- XDp_RxGetBpc
3526- XDp_RxGetColorComponent
3527- XDp_RxSetLineReset
3528- XDp_RxAllocatePayloadStream
3529XDp_RxAllocatePayloadStream is to be called from within RX allocate payload ISR.
3530API changed: XDp_TxAllocatePayloadVcIdTable now takes an additional arg StartTs.
3531Removed soft reset when enabling RX DTG.
3532
3533dphy_v1_0:
3534Added the initial version of MIPI DPHY Controller driver.
3535Added support for HS_SETTLE register
3536
3537dprxss_v3_0:
3538Added support for multiple subsystems in a design.
3539Added handlers as enum for HDCP callback registration.
3540Added function: XDpRxSs_DownstreamReady
3541
3542dptxss_v3_0:
3543Added support for multiple subsystems in a design.
3544Added handlers as enum for HDCP callback registration.
3545Added function: XDpTxSs_ReadDownstream, XDpTxSs_HandleTimeout
3546
3547dsitxss_v1_0:
3548Initial version of MIPI DSI TX Subsystem Driver
3549
3550dsi_v1_0:
3551Initial version for DSI Controller Driver
3552
3553emaclite_v4_2:
3554Used UINTPTR instead of u32 for Baseaddress to fix CR#867425.
3555Changed the prototype of XEmacLite_CfgInitialize API.
3556Fix compilation errors due to conflicting data types (CR#917930).
3557Updated interrupt example to support Zynq and ZynqMP (CR#938244).
3558
3559emacps_v3_2:
3560Change BD typedef and number of words
3561Modified xemacps_example_intr_dma and tapp tcl to support test
3562app interrupt example for microblaze.
3563Added option to enable SGMII.
3564Removed emacps from peripheral tests for Zynq Ultracale MPSoC
3565Replaced counter based timeout with sleep routine in xemacps_example_intr_dma
3566
3567gpio_v4_1:
3568Updated to use cannonical xparameters in examples and clean up of the comments,
3569removed support for DCR bridge and removed xgpio_intr_example for CR 900381.
3570Used UINTPTR type for BaseAddress.
3571
3572hdcp1x_v4_0:
3573Updated the tmrctr being refered to in the hdcp1x.mdd file to tmrctr_v4_1.
3574Updated the drivers to use an individual timer with each hdcp interface.
3575Updated the drivers to support repeater fucntionality for HDMI.
3576Added following fucntions:
3577  XHdcp1x_RxSetRepeaterBcaps, XHdcp1x_RxIsInComputations,
3578  XHdcp1x_TxIsInComputations, XHdcp1x_RxIsInWaitforready,
3579  XHdcp1x_TxIsInWaitforready, XHdcp1x_RxHandleTimeout,
3580  XHdcp1x_RxStartTimer, XHdcp1x_RxStopTimer,
3581  XHdcp1x_RxBusyDelay, XHdcp1x_RxSetTopologyUpdate,
3582  XHdcp1x_RxSetTopology, XHdcp1x_TxGetTopology,
3583  XHdcp1x_RxSetTopologyKSVList, XHdcp1x_TxGetTopologyKSVList,
3584  XHdcp1x_RxSetTopologyDepth, XHdcp1x_TxGetTopologyDepth,
3585  XHdcp1x_RxSetTopologyDeviceCnt, XHdcp1x_TxGetTopologyDeviceCnt,
3586  XHdcp1x_RxSetTopologyMaxCascadeExceeded, XHdcp1x_TxGetTopologyMaxCascadeExceeded,
3587  XHdcp1x_RxSetTopologyMaxDevsExceeded, XHdcp1x_TxGetTopologyMaxDevsExceeded,
3588  XHdcp1x_RxCheckEncryptionChange, XHdcp1x_TxIsDownstrmCapable,
3589  XHdcp1x_TxIsRepeater, XHdcp1x_TxEnableBlank,
3590  XHdcp1x_TxDisableBlank, XHdcp1x_TxGetTopologyBKSV
3591
3592hdcp1x_v3_0:
3593Updated the drivers to support HDCP Repeater functionality.
3594Added following functions:
3595  XHdcp1x_DownstreamReady, XHdcp1x_GetRepeaterInfo,
3596  XHdcp1x_SetCallBack, XHdcp1x_ReadDownstream.
3597  XHdcp1x_TxReadDownstream, XHdcp1x_TxSetCallBack,
3598  XHdcp1x_TxTriggerDownstreamAuth.
3599  XHdcp1x_RxDownstreamReady, XHdcp1x_RxGetRepeaterInfo,
3600  XHdcp1x_RxDownstreamReadyCallback,
3601  XHdcp1x_RxSetCallBack.
3602Updated the hdcp drivers for HDMI support for HDCP 2.2.
3603Added the following functions:
3604  XHdcp1x_IsEnabled, XHdcp1x_ProcessAKsv,
3605  XHdcp1x_RxIsEnabled, XHdcp1x_RxIsInProgress
3606Assigned callback function in XHdcp1x_PortHdmiTxAdaptor to NULL.
3607Disabled hdcp call back in function XHdcp1x_PortHdmiRxEnable.
3608Added DDC write and read handlers.
3609Added callback type used for calling DDC read and write functions
3610Added enumeration XHdcp1x_HandlerType to identify callback functions.
3611Added a check in xhdcp1x_g.c file to check if HDCP is present.
3612Updated the hdcp1x.h file to add documentation and driver description.
3613Updated the hdcp1x.h file to add documentation for Repeater system.
3614Removed all references to HDMI DDC registers in the hdcp drivers.
3615
3616hdcp22_cipher_v1_0:
3617Added the initial version of Xilinx HDCP Cipher core driver.
3618Updated the driver for nested HIP support.
3619Added the GetVersion function.
3620
3621hdcp22_common_v1_0:
3622Added the initial version of Xilinx HDCP Cipher common driver.
3623Updated the driver for nested HIP support.
3624Updated to BigDigits v2.5
3625Removed floating point operations.
3626
3627hdcp22_common_v1_1:
3628Fixed warnings and errors for gcc and g++ compilers.
3629
3630hdcp22_common_v2_0:
3631Changed DIGIT_T type to u32 for 64-bit support
3632
3633hdcp22_mmult_v1_0:
3634Added the initial version of the driver that can be used to access the Xilinx HDCP22
3635Montogmery Multiplier(Mmult) core.
3636Updated the driver for nested HIP support.
3637Added default configuration file xhdcp22_cipher_g.c
3638
3639hdcp22_mmult_v1_1:
3640Added 64 bit address support.
3641
3642hdcp22_rng_v1_0:
3643Added the initial version of the driver that can be used to access the Xilinx HDCP22
3644Random Number Generator(RNG) core.
3645Updated the driver for nested HIP support.
3646
3647hdcp22_rng_v1_1:
3648Added 64 bit address support.
3649
3650hdcp22_rng_v1_2:
3651Fix for pointer word alignment.
3652
3653hdcp22_rx_v1_0:
3654Added the initial version of the Xilinx HDCP 2.2 Receiver driver.
3655Updated the driver for nested HIP support.
3656Updated LoadPrivateKey function to calculate Montgomery constants.
3657Fixes for HDCP 2.2 complaince testing
3658
3659hdcp22_rx_v2_0:
3660Added repeater upstream support.
3661Added 64 bit address support.
3662Fixes for warnings reductions.
3663
3664hdcp22_rx_v2_1:
3665Fixed warnings and errors for gcc and g++ compilers.
3666
3667hdcp22_rx_v2_2:
3668Updated for 64-bit support.
3669
3670hdcp22_tx_v1_0:
3671Added the initial version of the Xilinx HDCP 2.2 Tx core driver.
3672Updated the driver for nested HIP support.
3673Added authenticated callback function.
3674Fixes for HDCP 2.2 complaince testing
3675
3676hdcp22_tx_v2_0:
3677Add repeater downstream support.
3678Added 64 bit address support.
3679Fixes for warnings reductions.
3680Fixes for transmitter compliance.
3681
3682hdcp22_tx_v2_1:
3683Fixed pairing table update
3684Fixed warnings and errors for gcc and g++ compilers.
3685
3686hdcp22_tx_v2_3:
3687Updated for 64-bit ARM support.
3688Enhancement to perform HDCP2 Capable check for re-authentication attempts.
3689Enhancement to cipher enablement to avoid unessary AXI bus transactions.
3690Fix in XHdcp22Tx_WaitForReceiver to poll RxStatus based on fixed interval.
3691Fix in XHdcp22Tx_WaitForReceiver to wait for READY and non-zero Message_Size before reading message buffer.
3692Fix to check return status of DDC write/read when polling RxStatus register.
3693
3694hwicap_v10_1:
3695Updated driver, to read 7 Series FPGA frame data correctly.
3696Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3697Changed the prototype of XHwIcap_CfgInitialize API.
3698Removed xhwicap_clb_srinv.h, xhwicap_clb_ff.h, xhwicap_clb_lut.h files
3699Removed xhwicap_lut.c and xhwicap_ff.c examples
3700Removed defines XHI_FAR_MAJOR_FRAME_MASK, XHI_FAR_MINOR_FRAME_MASK,
3701XHI_FAR_MAJOR_FRAME_SHIFT, XHI_FAR_MINOR_FRAME_SHIFT, XHI_C0R_1.
3702Fix for CR#909615 to make the following changes:
3703Updated XHI_FAR_COLUMN_ADDR_MASK to 0x3FF
3704Updated XHI_FAR_BLOCK_SHIFT to 23
3705Updated XHI_FAR_TOP_BOTTOM_SHIFT to 22
3706Updated XHI_FAR_ROW_ADDR_SHIFT to 17
3707Updated XHI_NUM_FRAME_BYTES to 404
3708Updated XHI_NUM_FRAME_WORDS to 101
3709Updated XHI_NUM_WORDS_FRAME_INCL_NULL_FRAME to 202
3710
3711iic_v3_2:
3712Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3713Changed the prototype of XIic_CfgInitialize API.
3714In Low level driver in repeated start condition NACK for last byte is added.
3715Changes are done in XIic_Recv for CR# 862303
3716
3717
3718iicps_v3_1:
3719Updates example files xiicps_eeprom_intr_example.c, xiicps_eeprom_polled_example.c,
3720xiicps_slave_monitor_example.c.
3721Re-order the master_send and master_receive functions to handle the
3722interrupts properly.
3723
3724intc_v3_5:
3725Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3726
3727iomodule_v2_3:
3728Updated xdefine_canonical_xpars in iomodule.tcl to generate canonical definitions,
3729whose canonical name is not the same as hardware instance name.
3730
3731ipipsu_v2_0:
3732Created new major version.
3733Fix response buffer address calculation.
3734
3735llfifo_v5_1:
3736Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3737Changed the prototypes of XLlFifo_CfgInitialize, XLlFifo_Initialize APIs.
3738Fix Incorrect AXI4 Base address being exported to the xparameters.h file (CR#885653).
3739
3740mbox_v4_1:
3741Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3742Changed the prototypes of XMbox_CfgInitialize API.
3743The driver tcl is updated to remove delete filename statement to fix CR# 784758.
3744
3745mig_v1_0:
3746Added initial version of MIG driver for UltraScale DDR3.
3747This driver is created only to allow the SDK tools to create a memory test application
3748and to populate xparameters.h with memory range constants.
3749
3750mipicsiss_v1_0:
3751Added initial version of Xilinx MIPI CSI Rx Subsystem driver.
3752Add Word Count Corruption interrupt feature
3753
3754mutex_v4_1:
3755Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3756Changed the prototype of XMutex_CfgInitialize API.
3757
3758qspipsu_v3_3:
3759Modified the API prototypes according to MISRAC standards to remove compilation
3760warnings for fixing CR# 868893.
3761Made changes in xqspips_g128_flash_example.c to add support for Macronix 256Mb and 1Gb
3762flash parts.
3763
3764qspipsu_v1_0:
3765Added Support for Macronix 1Gb part.
3766
3767rtcpsu_v1_3:
3768Corrected calibration and fractional masks.
3769Once we write the RTC time it gets reflected in the current time register after 1sec delay,
3770so corrected the RTC read and write logic in the code for giving correct time.
3771
3772scugic_v3_2:
3773Modified xscugic_hw.h file to correct the interrupt target processor mask value for
3774cpu interface 2 i.e. XSCUGIC_SPI_CPU2_MASK
3775Modified DistributorInit function for CPU while executing in AMP
3776Modified tcl to support PL interrupts for ZynqMP Soc
3777Modified the DistributorInit in xscigic.c. The change ensures that for Zynq AMP case
3778the GIC distributor is left unchanged under the assumption that Linux master will
3779initialize it. The change fixes the CR#937243.
3780Modified scugic tcl to compute the interrupt ID instead of reading from interrupt pin
3781property for PL ips in get_psu_interrupt_id for zynqmpsoc to fix CR#940127
3782
3783sdps_v2_7:
3784Made changes to considered the slot type befoe checking CD/WP pins.
3785Added support for MMC cards.
3786Added workaround for issue in auto tuning mode of SDR50, SDR104 and HS200.
3787Corrected the Tuning logic in driver.
3788Removed Bus width check for eMMC.
3789Added Tap Delay configurations.
3790
3791spi_v4_2:
3792Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3793Changed the prototype of XSpi_CfgInitialize API.
3794Updated the tcl to remove delete filename statement (CR# 784758).
3795
3796spips_v3_0:
3797Made changes in XSpiPs_Abort and XSpiPs_ResetHw to read all RX_FIFO entries.
3798
3799srio_v1_1:
3800Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3801Changed the prototype of XSrio_CfgInitialize API.
3802
3803sysmon_v7_2:
3804Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3805Changed the prototype of XSysMon_CfgInitialize API.
3806Updated interrupt example to support Zynq and ZynqMP (CR#938326).
3807Fix for CR#910905. Remove incorrect use of configuration register 3
3808for 7 series.
3809Fixed compilation errors when sysmon is configured in Streaming mode (CR#940976)
3810
3811sysmonpsu_v1_0 :
3812Added new system monitor driver.
3813Correct the assert function call.
3814Modified interrupt examples.
3815Corrected valid list of Single and External Mux channels.
3816
3817tmrctr_v4_2:
3818Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3819Changed the prototype of XTmrCtr_CfgInitialize API.
3820Updated tcl, to generate correct device id for timer canonical define
3821
3822trafgen_v4_1:
3823Made changes in tcl to remove delete filename statement to fix CR# 784758.
3824
3825ttcps_v3_1:
3826Made changes in tcl to remove delete filename statement to fix CR# 784758.
3827Modified XTtcPs_CfgInitialize to add XTtcps_stop before configuring the TTC.
3828Removed invokation of XTtcps_stop from examples (before TTC configuration).
3829Modified ttcps_tapp.tcl to generate proper device and interrupt IDs for
3830peripheral test and exclude ttc3 for cortexr5 in peripheral test. Also
3831made changes to xttcps_tapp_example.c to add status check after SetupTicker
3832is called by TmrInterruptExample to fix CR#938908.
3833Modified cortexr5/xtime_l.c to avoid enabling overflow interrupt, instead
3834modified cortexr5/sleep.c and usleep.c to poll the counter value and compare
3835it with previous value to detect the overflow to fix CR#940209.
3836
3837uartlite_v3_2:
3838Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3839Changed the prototype of XUartLite_CfgInitialize API.
3840
3841uartns550_v3_4:
3842Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3843Changed the prototype of XUartNs550_CfgInitialize API.
3844
3845uartps_v3_1:
3846Modified code for latest RTL changes.
3847Added platform variable in driver instance structure.
3848Modified uartps_tapp.tcl to support microblaze.
3849Modified xuartps_intr_example to support intc interrupt controller.
3850Fix compilation errors in peripheral test for no interrupt uartps designs.
3851
3852usb_v5_1:
3853Used UINTPTR instead of u32 for Baseaddress to fix CR# 867425.
3854Changed the prototype of XUsb_CfgInitialize API.
3855
3856usbps_v2_2:
3857Fix for CR#873974 (Zynq PS7 USB - Update Driver to Invalidate Caches After Buffer Receive
3858in Endpoint Buffer Handler Code).
3859Fix for CR#873972 (Zynq PS7 USB - Update Driver to Handle Moving of dTD Head/Tail Pointers).
3860
3861usbpsu_v1_3:
3862Added Cache Coherency(CCI) support.
3863
3864usbpsu_v1_2:
3865Added Reset/disconnect and ch9 handler callback functions
3866Added DFU example
3867Made changes to assign EP number and direction from wIndex field
3868removed unnecessary declaration of XUsbPsu_SetConfiguration in xusbpsu.h file
3869Corrected InstancePtr->UnalignedTx with Ept->UnalignedTx in xusbpsu_controltransfers.c
3870
3871v_axi4s_remap_v1_0:
3872Initial version of the driver (Generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC).
3873
3874v_csc_v2_0:
3875Updated tcl to include new args ENABLE_422 and ENABLE_WINDOW.
3876Is422Enabled, IsDemoWindowEnabled added to XV_csc_Config structure.
3877Made changes to integrate layer-1 with layer-2.
3878Made changes so that IsDemoWindowEnabled prevents access to absent HW regs.
3879Corrected typo in XV_CscSetColorspace setting K31 FW reg.
3880Updated the XV_CscDbgReportStatus routine.
3881Changes made so that macros query Is422Enabled, IsDemoWindowEnabled flags which were added to
3882the XV_csc_Config structure.
3883
3884v_deinterlacer_v6_0:
3885Made changes to integrate layer-1 with layer-2.
3886Added WaitForIdle function.
3887
3888v_hcresampler_v2_0:
3889Made changes to integrate layer-1 with layer-2.
3890
3891v_hdmirxss_v2_0 :
3892Added Cable (dis)connect printf
3893
3894v_hdmirx_v1_1:
3895Added support for read not complete DDC event
3896
3897v_hdmitx_v1_1 :
3898Added XV_HdmiTx_SetHdmiMode and XV_HdmiTx_SetDviMode
3899Removed support for reduced blanking
3900
3901v_hdmirxss_v2_0 :
3902Moved HDCP 2.2 reset from stream up/down callback to connect callback
3903Added HDCP authenticated callback support
3904Remove xintc.h from xv_hdmirxss.h as it is processor dependent
3905Updated for Zync ARM support. CR#949087
3906
3907v_hdmirxss_v3_2 :
3908Removed authentication request flag from xhdcp.c/h
3909
3910v_hdmitxss_v2_0 :
3911Added XV_HdmiTxSs_SetHdmiMode and XV_HdmiTxSs_SetDviMode
3912Removed reduced blanking support
3913Moved HDCP 2.2 reset from stream up/down callback to connect callback
3914Add XV_HdmiTxSs_SendGenericAuxInfoframe function
3915Updated for Zync ARM support. CR#949087
3916
3917v_hdmitxss_v3_2 :
3918Removed authentication request flag from xhdcp.c/h
3919
3920v_hdmirx_v1_1:
3921Added Link Check callback
3922Added pixel clock calculation to HdmiRx_TmrIntrHandler
3923Update to fix compiler warnings. CR#949087
3924
3925v_hdmitx_v1_1 :
3926Reorganization of code
3927
3928v_hdmirxss_v2_0 :
3929Add HDCP Support
3930
3931v_hdmitxss_v2_0 :
3932Add HDCP Support
3933
3934v_hdmirxss_v2_0:
3935Updated version from 1.0 to 2.0
3936
39371. Added 3D support
39382. Added Native Video Support
39393. Added NTSC/PAL/420 Support
3940
3941v_hdmitxss_v2_0:
3942Updated version from 1.0 to 2.0
3943
39441. Fixed Audio Infoframe issue
39452. Added 3D support
39463. Added Native Video Support
39474. Added NTSC/PAL/420 Support
3948
3949v_hdmirx_v1_1:
3950Updated version from 1.0 to 1.1
3951
3952v_hdmitx_v1_1:
3953Updated version from 1.0 to 1.1
3954
3955v_hdmirx_v1_0:
3956Made changes in mdd file to change OPTION DEPENDS to video_common_v2_2.
3957
3958v_hdmitx_v1_0:
3959Made changes in mdd file to change OPTION DEPENDS to video_common_v2_2.
3960
3961v_hscaler_v2_0:
3962Made changes to integrate layer-1 with layer-2.
3963Updated the XV_HScalerDbgReportStatus routine.
3964Added macro to query the Is422Enabled flag that was added to the XV_hscaler_Config structure.
3965
3966v_letterbox_v2_0:
3967Made changes in mdd file to change OPTION DEPENDS to video_common_v2_2.
3968Made changes to integrate layer-1 with layer-2.
3969
3970v_mix_v1_0:
3971Added initial version of Mix Layer-2 Driver (Generated by Vivado(TM) HLS).
3972Added stride and memory interface alignment requirements
3973Added new interface types for each layer
3974Export per layer video format (color format) user parameter to driver
3975Updated example design to align with hw changes
3976Added fix for stream layer not working
3977Added fix for offset alignment to example design
3978Added fix for window coordinate 0,0
3979
3980v_tpg_v7_0:
3981Made changes in mdd file to change OPTION DEPENDS to video_common_v2_2.
3982
3983v_vcresampler_v2_0:
3984Made changes in mdd file to change OPTION DEPENDS to video_common_v2_2.
3985Made changes to integrate layer-1 with layer-2.
3986
3987v_vscaler_v2_0:
3988Made changes to integrate layer-1 with layer-2.
3989
3990v_dpt4175:
3991Initial Commit for 2016.3
3992Added 64 Bit Support (UINTPTR)
3993Removed xil_printf
3994Added -Wall-Wextra in Makefile
3995
3996v_pt4175:
3997Initial Commit for 2016.3
3998Added 64 Bit Support (UINTPTR)
3999Removed xil_printf
4000Added -Wall-Wextra in Makefile
4001Added PixPerPacket Function
4002
4003v_voip_decap_v1_0:
4004Initial Commit for 2016.1
4005Change space to tab in the Makefile
4006Fixed mismatch in MASK parameter (CR 952247)
4007Added 64 Bit Support (UINTPTR)
4008Added register support for Dynamic PayloadType
4009
4010v_voip_framer_v1_0:
4011Initial Commit for 2016.1
4012Change space to tab in the Makefile
4013Added 64 Bit Address Support (UINTPTR)
4014Fixed mismatched function with PG (CR 955024)
4015Removed all the xil_printf from the drivers
4016Added 64 Bit Support (UINTPTR)
4017
4018v_voip_packetizer56_v1_0:
4019Initial Commit for 2016.1
4020Change space to tab in the Makefile
4021Added 64 Bit Support (UINTPTR)
4022
4023v_voip_depacketizer_v1_0:
4024Initial Commit for 2016.1
4025Change space to tab in the Makefile
4026Added 64 Bit Support (UINTPTR)
4027
4028v_voip_fec_tx_v1_0:
4029Initial Commit for 2016.1
4030Change space to tab in the Makefile
4031Revert back option version in mdd file to 1.0 as this is initial version
4032Update debug statistic offset
4033Added 64 Bit Support (UINTPTR)
4034
4035v_voip_fec_rx_v1_0:
4036Initial Commit for 2016.1
4037Change space to tab in the Makefile
4038Add debug status and statistic function for the core
4039Added 64 Bit Support (UINTPTR)
4040
4041video_common_v2_2:
4042Changes made so that functions with pointer arguments that don't modify contents are now const.
4043Added ability to insert a custom video timing table: XVidC_RegisterCustomTimingModes and
4044XVidC_UnregisterCustomTimingMode.
4045Added 3D support.
4046Fixed video timings for some resolutions.
4047
4048vphy_v1_1:
4049Made changes in mdd file to change OPTION DEPENDS to video_common_v2_2.
4050Corrected PllParams.Cdr[1] values for DP and HDMI.
4051Added GTPE2 and GTHE4 Support and Enhanced Event Log
4052Updates for DP GTPE2 Support
4053Fixed 1PPC MMCM parameter calculation in HDMI
4054Corrected TX_CLK25_DIV1 and added RX_CLK25_DIV1 initialization
4055Updated the RXCDRCFG2 values for GTHE4
4056Updated xvphy_gtpe2.c to take the correct refclk frequency for DP
4057
4058vphy_v1_2:
4059Added HdmiFastSwitch in XVphy_Config
4060Fixed bug in XVphy_IsPllLocked function
4061Updates for 64-bit compilation
4062Used usleep API instead of MB_Sleep API
4063Replaced xil_printf with log events for debugging
4064Modified XVphy_DruGetRefClkFreqHz API
4065Fixed Null pointer dereference in XVphy_IBufDsEnable
4066Suppressed warning messages due to unused arguments
4067
4068vphy_v1_3:
4069Added comments in xvphy_hdmi_intr.c on the XVphy_WaitUs usage.
4070Added error message in XVphy_HdmiCpllParam when DRU is enabled and RX TMDS ratio is 1/40
4071Fixed rounding of DRU and RX refclk frequencies
4072Fixed race condition in XVphy_HdmiRxClkDetFreqChangeHandler when storing RxRefClkHz value
4073
4074vphy_v1_4:
4075Reorganized the vphy.c/.h files reduce the number of APIs exposed to users
4076Created xvphy_i.c/h to contain APIs from vphy.c/.h which are shared by HDMI and DP
4077Added preprocessor directives for SW footprint reduction
4078Made debug log optional (can be disabled via makefile)
4079Added type_defs and APIs to implement the optional err_irq port (xilinx internal)
4080Added mechanism to re-trigger GT TX reset when TX align get stuck in xvphy_hdmi_intr.c
4081Added N2=8 divider for GTHE3 & GTHE4 CPLL for DP only
4082Implemented 2/4 byte GT mode switching HDMI
4083Fixed c++ compiler warnings
4084Added Transceiver_Width, C_Err_Irq_En, AXI_LITE_FREQ_HZ Parameters in xvphy_g.c and in vphy main data structure
4085Added XVphy_GtUserRdyEnable for TX and RX in XVphy_DpInitialize API
4086
4087vphy_v1_5:
4088Updated the Updated the RXPI_CFG0 calculation in xvphy_gthe4.c
4089Corrected RXCDR_CFG values for DP in xvphy_gthe4.c
4090Added XVphy_CfgCpllCalPeriodandTol API in xvphy_gthe4.c adn vphy_i.h
4091Added Div in HdmiCfgCalcMmcmParam search algorithm in xvphy_hdmi.c
4092Added DrpClkFreq in XVphy_Config
4093
4094vphy_v1_6:
4095Marked XVphy_DrpRead & XVphy_DrpWrite as deprecated APIs
4096Added XVphy_DrpRd & XVphy_DrpWr to replace the deprecated equivalent APIs
4097Added XVphy_SetErrorCallback, XVphy_ErrorHandler & XVphy_PllLayoutErrorHandler APIs
4098Adjusted GTXE2 CPLL DRU linerate to 2.5 Gbps
4099Improved stability and robustness during GTXE2 bonded mode
4100Changed ClkOutxDiv declaration to u16 in vphy.h
4101Added XVPHY_LOG_EVT_NO_QPLL_ERR & XVPHY_LOG_EVT_DRU_CLK_ERR log events
4102Added XVphy_RegisterDebug API in vphy.c/h
4103Fixed bug in HdmiCfgCalcMmcmParam when linerate exceeds 3.4 Gbps when oversampling is enabled
4104Improved stability to avoid SW hang when HdmiCfgCalcMmcmParam is not able to find the applicable divider for ARM processors
4105Fixed XVphy_HdmiDebugInfo printout for RX only configuration
4106Added doxygen tags
4107Added XVphy_Hdmi_CfgInitialize to replace the deprecated XVphy_HdmiInitialize API
4108
4109vphy_v1_7:
4110Added new files: xvphy_gtye4.c, xvphy_mmcme2.c, xvphy_mmcme3.c & xvphy_mmcme4.c
4111Added GTYE4 Support for HDMI
4112Migrated MMCM reconfig from RTL to SW driver
4113Added new APIs: XVphy_SetPolarity, XVphy_SetPrbsSel, XVphy_TxPrbsForceError
4114Added 8.1 Gbps support in DP
4115Corrected FVCO range for MMCME4 in xvphy_hdmi.h
4116Updated US/US+ QPLL0 VCO MAX to 16.375 GHz (GTHE3/GTHE4)
4117Removed XVphy_DruSetGain API in xvphy_hdmi.c
4118Changed line comments from // to /* */
4119Added N2=8 divider for CPLL for US & US+ devices
4120Added maximum userclk checking in PLL parameter computation
4121
4122vphy_v1_8:
4123Corrected the GTYE4 CDR settings for DP in xvphy_gtye4.c
4124Removed the expired deprecated APIs XVphy_DrpWrite and XVphy_DrpRead
4125Corrected a bug in XVphy_HdmiQpllParam API
4126
4127vprocss_v2_1:
4128Added new version 2.1
4129Added optional color format conversion handling in scaler only topology
4130Updated tcl to support multiple instances
4131
4132wdttb_v4_0:
4133Updated Window watchdog support.
4134Updated XWdtTb_Config structure with Window WDT parameters.
4135Updated XWdtTb core structure with config parameter and removed RegBaseAddress parameter.
4136Added following static inline functions:
4137XWdtTb_GetTbValue, XWdtTb_SetRegSpaceAccessMode,
4138XWdtTb_GetRegSpaceAccessMode, XWdtTb_GetLastEvent,
4139XWdtTb_GetFailCounter, XWdtTb_IsResetPending,
4140XWdtTb_GetIntrStatus, XWdtTb_IsWrongCfg.
4141Added following functions:
4142XWdtTb_AlwaysEnable, XWdtTb_ClearLastEvent,
4143XWdtTb_ClearResetPending, XWdtTb_IntrClear,
4144XWdtTb_SetByteCount, XWdtTb_GetByteCount,
4145XWdtTb_SetByteSegment, XWdtTb_GetByteSegment,
4146XWdtTb_EnableSst, XWdtTb_DisableSst, XWdtTb_EnablePsm,
4147XWdtTb_DisablePsm, XWdtTb_EnableFailCounter,
4148XWdtTb_DisableFailCounter, XWdtTb_EnableExtraProtection,
4149XWdtTb_DisableExtraProtection, XWdtTb_SetWindowCount, XWdtTb_CfgInitialize.
4150Updated following functions with Window WDT feature:
4151XWdtTb_Start, XWdtTb_Stop, XWdtTb_IsWdtExpired, XWdtTb_RestartWdt.
4152Changed multi line comments to single line comments wherever required.
4153Moved XWdtTb_LookupConfig definition to xwdttb_sinit.c.
4154Changes made to adherence to coding and Doxygen guidelines.
4155Removed included xil_io, xil_types, xparameters and xil_assert header files.
4156Moved XWdtTb_GetTbValue to xwdttb.h file.
4157Changes made to adhere to MISRA-C guidelines.
4158Added new files xwdttb_hw.h and xwdttb_sinit.c.
4159Added masks and shifts macros for Window WDT:
4160Added macros for Window WDT feature.
4161
4162zdma_v1_1:
4163Added new version 1.1
4164Modified XZDma_SetMode API
4165Corrected XZDma_SetChDataConfig API
4166
4167standalone_v5_4:
4168Updated xplatform_info.h to add macros for support for A53 32 bit.
4169Modified boot.s to disable ACTLR.DBWR bit to avoid potential R5 deadlock for errata 780125.
4170Modified file xil_misc_psreset_api.c to improve the description for XOcm_Remap function to avoid
4171confusion for Cortex-A9.
4172Enabled I-Cache and D-Cache in boot code for a53 32 bit BSP in the initialization.
4173Modified file xil_misc_psreset_api.c to correct the description for XOcm_Remap function to avoid confusion for
4174Microblaze.
4175Added #defines for mmu attributes which can be used with Xil_SetTlbAttributes API for cortex-a9.
4176Added default undefined exception handler with debug print of the instruction causing undefined exception for
4177Cortex-A9 BSP.
4178Included #defines for silicon for checking the current executing platform using XGet_Zynq_UltraMp_Platform_info API
4179for ZynqMP Soc. Updated xplatform_info.h and xplatform_info.c accordingly. Added a new API XGetPSVersion_Info to
4180return information for PS Silicon version. Modified APIs for platform information to add support for
4181Cortex-A53 32bit mode.
4182Initialize global constructor for C++ applications for Cortex-A53 (32 and 64 bit) and Cortex-R5.
4183Updadted the translation table according to proper address map for cortex-A53 (32 and 64 bit).
4184MPU initialization is corrected based on proper address map for cortex-R5 (mpu.c).
4185Modified boot.S file to set the reset vector register RVBAR equivalent to vector table base address for
4186cortex-A53 (32 and 64 bit).
4187Modified cortexa9 gcc Makefile to update the extra compiler flag as per the toolchain update.
4188Corrected the sleep and usleep routines to avoid hardcoding the timer frequency, instead take it
4189from xparameters.h to properly configure the timestamp clock frequency.
4190Updated cortexa9 BSP to add macros: asm_cp15_inval_dc_line_mva_poc, asm_cp15_clean_inval_dc_line_mva_poc,
4191asm_cp15_inval_ic_line_mva_pou, asm_cp15_inval_dc_line_sw, asm_cp15_clean_inval_dc_line_sw. These macros are
4192used CACHE APIs to replace inline assembly code. This is done for better MISRA C compliance.
4193Modified prototypes of xil_In32 and xil_Out32 for cortexa9 to remove warnings.
4194Added axipmon interrupt id's in xparameter_ps.h for cortexa53 BSP.
4195Added axipmon interrupt id's in xparameter_ps.h for cortexr5 BSP.
4196Updated A53 64 bit BSP xil_io.c APIs Xil_Out8, Xil_Out16, Xil_Out32, Xil_Out64 to use volatiles.
4197Updated A53 32 bit BSP xil_io.c APIs Xil_Out8, Xil_Out16, Xil_Out32 to use volatiles.
4198Changes across various files in the BSP for MISRA C compliance.
4199Added interrupt ID macros for system monitor in A53 and R5 BSPs (xparameters_ps.h).
4200Removed macro XPAR_SCUTIMER_DEVICE_ID from Cortex-R5 xparameters_ps.h (as it is not relevant).
4201Updated boot.S in Cortex-R5 to add support for R5 lock-step mode (enabling the comparator logic and
4202enabling fault log.
4203Renamed USEAMP to VEC_TABLE_IN_OCM in boot.S to avoid confusion with USE_AMP for Cortex-R5.
4204Renamed USEAMP and USE_AMP to UNDEFINE_FILE_OPS around file operation open(),read(), write() etc for
4205Cortex-A9 and Cortex-R5.
4206Removed the upper 512MB remapping to 0 in boot.S for USE_AMP flag for Cortex-A9.
4207Added support for 64 bit address extension for MicroBlaze BSP. Updated mb_interface.h to add macros for
4208new assembly instructions. The macros added are: mfeare, mfpvre, lwea, lhuea, lbuea, swea, shea, sbea.
4209Made changes in MicroBlaze BSP xil_io.c and xil_io.h to convert Xil_In8, Xil_In16, Xil_In32, Xil_Out8,
4210Xil_Out16, Xil_Out32 into static inline functions. Made changes in xil_io.c and xil_io.h to change u32
4211to UINTPTR.
4212Made changes in MicroBlaze BSP to add implementation for xil_printf (added the file xil_printf.c). Earlier
4213xil_printf was part of toolchain which is now removed from toolchain and made part of BSP.
4214Modified cortexr5/xtime_l.c to add an API XTime_StartTimer and updated cortexr5/xil-crt0.S to configure
4215the TTC3 timer when present. Modified cortexr5/sleep.c, cortexr5/usleep.c to use TTC3 when present otherwise
4216use set of assembly instructions to provide required delay to fix CR#913249.
4217Made changes in A53 and R5 BSPs to replace the _exit with exit (xil-crt0.S). This fixes the CR#937036.
4218Modified the boot code for cortex-r5 in cortexr5/gcc/boot.S to initialize the floating point registers,
4219banked registers for various modes and enabled the cache ECC check before enabling the fault log for
4220lock step mode and updates the cortex-r5 bsp makefile at cortexr5/gcc/Makefile to support the floating
4221point registers initialization boot code to fix the CR#937490
4222Updated the exit function in cortexr5/gcc/_exit.c to enable the debug logic in case of lock-step mode
4223when fault log is enabled to fix the CR#938281
4224Included instrinsics.h header file to cortexa9/iccarm/xpseudo_asm_iccarm.h for inline assembly instructions
4225definitions used in C. It also modifies cortexa9/iccarm/Makefile to remove --cpu=Cortex-A9 flag to add it in
4226compiler flags of BSP to fix CR#938718
4227Fix for CR#938738. Added print.c in MB BSP.
4228Updated cortexr5/sleep.c and usleep.c to avoid disabling the interrupts when sleep/usleep is being executed
4229using assembly instructions to fix CR#913249.
4230Modified cortexr5/boot.S to reset the dbg_lpd_reset before enabling the fault log to avoid intervention for
4231lock-step mode and cortexr5/_exit.c to enable the dbg_lpd_reset once the fault log is disabled to fix
4232CR#947335
4233
4234xilskey_v5_0:
4235Modified JtagWrite_Ultrascale.
4236Added verification for programming bits.
4237Added checks for programming.
4238AES key programmed is verified.
4239Calculated CRC of provided AES key.
4240Added Ultrascale BBRAM programming.
4241Added example for Ultrascale BBRAM.
4242Modified TCL for supporting all platforms.
4243Fixed Array out of bounds error.
4244
4245xilffs_v3_2:
4246Added support for LFN.
4247Added support for use_lfn option.
4248Added use_lfn option.
4249Ignore CD/WP checks for Embedded slot.
4250Corrected ST_WORD and ST_DWORD macros.
4251
4252xilflash_v4_2:
4253Added support to change BPI Flash from sync to async in examples.
4254Added support to unlock the MicronG18 flash in examples.
4255Added canonical name to FLASH_BASEADDR in examples.
4256
4257xilisf_v5_3:
4258Updated xilisf_stm_read_write_example.c to remove compilation error.
4259
4260xilisf_v5_4:
4261Updated xilisf_stm_read_write_example.c to remove compilation error.
4262
4263xilisf_v5_5:
4264Updated xilisf_stm_read_write_example.c to remove compilation error.
4265Fix compilation errors and warnings.
4266Added support for spansion in extended address mode.
4267Added support for S25FL512S and S25FL256S.
4268Added support for MT25QU01G
4269Used 3byte command with 4 byte addressing for Micron.
4270
4271xilrsa_v1_2:
4272Added support for Linaro tool chain in tcl.
4273Updated the version number.
4274Added binary for Linaro Tool chain.
4275
4276xilsecure_v1_1:
4277Updated the silsecure library.
4278
4279freertos823_xilinx_v1_1:
4280Modifies the makefiles, mld and tcl for freertos bsp to update them to latest standalone bsp 5.4.
4281
4282lwip141_1_4:
4283Made changes for lwip to work on A53 with caches enabled.
4284Corrected writing default values to last tx and rx BDs and then re-writing.
4285Added support for TI phy with axi ethernet interface.
4286Zynq BD space made normal non-cacheable.
4287Corrected Zynq GEM clock config when GEM1 is selected.
4288Added support for MicroBlaze FreeRTOS.
4289Made changes to add support for Axi Etherent on ZyqnMP.
4290Made changes in tcl to ensure that the parameter LWIP_COMPAT_MUTEX is defines as 1 for
4291MicroBlaze FreeRTOS use case.
4292Made changes to remove an incorrect assert in sys_arch.c (sys_arch_mbox_fetch) for FreeRTOS use case.
4293Made other miscellaneous changes in adapter files for removing warnings.
4294Made changes in lwip.tcl to Fix issues with the Axi Ethernet on ZynqMP R5.
4295Fix compilation errors for Axi Ethernet on ZynqMP.
4296
4297freertos_hello_world:
4298Updated the freertos hello world application to add a timer. The timer
4299times out after 10 seconds and kills the tasks and prints a success message.
4300Updated the tcl to add checks for A53 32 bit. The application is not supported
4301for A53 32 bit.
4302
4303lwip_echo_server:
4304Made changes not to disable D-cache for A53.
4305
4306xilopenamp_v1.0:
4307Deprecate xilopenamp_v1.0 now replaced by openamp_v1.0
4308
4309openamp_v1.0:
4310New openamp library in sync with open-source project
4311
4312openamp_echo_test:
4313Made changes not to call vTaskEndScheduler (FreeRTOS R5 based application). Removed the timer being
4314created for this purpose.
4315Removed the assert print which was caused because of calling endscheduler API for cortex-r5 freertos bsp
4316Reworked code to use new openamp library
4317
4318openamp_matrix_multiply:
4319Made changes not to call vTaskEndScheduler (FreeRTOS R5 based application). Removed the timer being
4320created for this purpose.
4321Reworked code to use new openamp library
4322
4323openamp_rpc_demo:
4324Made changes not to call vTaskEndScheduler (FreeRTOS R5 based application). Removed the timer being
4325created for this purpose.
4326Reworked code to use new openamp library
4327
4328xilkernel_thread_demo:
4329Updated xilkernel thread demo tcl (to check for IP_NAME not for instance name).
4330
4331freertos_lwip_echo_server:
4332Added a new lwip echo server app to be used only with FreeRTOS BSP. The functionality of this app
4333is exactly same as lwip_echo_server except the fact that it does not support 1000BaseX, sgmii modes and
4334is exclusively for FreeRTOS.
4335
4336zynqmp_fsbl:
4337Fix for decryption only secure test failure in R5, by disabling data cache.
4338Workaround provided in FSBL for SD card insert/remove detection.
4339Added performance measurement feature, with which time taken by various stages of FSBL can be monitored.
4340When FSBL runs on R5, FSBL's vectors are overwritten with those of user applications. This is now avoided for non-secure boot.
4341Added support for Winbond 64M and ISSI 128M QSPI parts.
4342Fix the issue in FSBL when only WDT1 is present in design.
4343R5 BSP now disables debug logic and enables comparators. For R5 Lockstep, in JTAG bootmode, Turn-off comparators and enable debug logic so that further applications can be ran on JTAG.
4344Added the PL reset capability using EMIO[95-92] in FSBL after successful PL configuration.
4345Fix the logic to determine the bank crossing condition in case of a dual parallel qspi connection. Also corresponding change fix done to calculate the number of bytes to be programmed in a given bank.
4346A workaround is provided in FSBL to power-up PL before MIO configuration (for Silicon versions 1 and 2). Also, removal of isolation for PL is now deferred until its configuration is done.
4347Added support for PS-Only reset, i.e. only the PS component is reset without re-configuring the PL component.
4348Added support for Macronix QSPI flash parts.
4349Changed linker script. With this, FSBL now fails to build (linker error) if FSBL's loadable sections exceed the OCM region allotted to it. This avoids possible overlap of FSBL with other applications built for OCM.
4350Added support for ZCU102 board specific configuration, including GT configuration.
4351Updated extra compiler flags for A53-64 (ARMA53_64), A53-32 (ARMA53_32).
4352Added support for PL bitstream loading in DDRless system.
4353To minimize the possibility of speculative access of DDR before it is initialized, in A53 FSBL's translation table (duplicated from BSP), DDR region is marked as "reserved". DDR region is again marked as "Memory" after DDR initialization.
4354Due to a bug in 1.0 Silicon, PS hangs after System Reset if RPLL is used. Hence, just for 1.0 Silicon, RPLL clock is bypassed before giving System Reset (this is workaround in FSBL).
4355When multiboot register value is non zero and when second SD instance is used, the bin filename was incorrectly determined in FSBL. This is fixed now.
4356Fix for failure in authenticating PL bitsream.
4357Restrict cores for which FSBL can be created (throw error if not running on A53-0, R5-0, R5-L).
4358Renamed stack names in A53 FSBL linker script.
4359
4360zynq_fsbl:
4361PS UART code is now referred only when PS UART is present in design. This is since STDOUT_BASEADDRESS is defined even for coresight UART.
4362Added support for Macronix flash.
4363Removed the hard coded value of qspi read command and configured to pick from LQSPI_CFG register.
4364As xilrsa is not mandatory for zynq, remove xilrsa check while creating application in SDK.
4365
4366
4367Change Log for 2015.4
4368=================================
4369can_v3_1:
4370Fixed the issue wrong values for the IP Parameters being exported to the xparameters.h file
4371
4372coresightps_dcc_v1_2
4373Added support for IAR Compiler.
4374
4375dp_v3_0
4376Fixed fractional TU bytes calculation.
4377Updated PHY status check to work cores instantiated with a single lane.
4378Qualify interrupt status with interrupt mask.
4379Added MSA callback.
4380Fixed TPS3 mask value.
4381Move waiting for PHY to be ready to link training rather than initialization to allow more flexible usage in pass-through systems.
4382
4383dprxss_v2_0
4384Removed HDCP handler types.
4385Added HDCP and Timer Counter support.
4386Protected HDCP under macro number of instances.
4387Added Timer Counter reset value macro.
4388Generate a HPD interrupt whenever RX cable disconnect/unplug interrupt is detected.
4389Removed DP159 bit error count code. Used DP159 bit error count function from Video Common library.
4390
4391dptxss_v2_0
4392Added support for customized main stream attributes for SST and MST
4393Added HDCP instance into global sub-cores structure.
4394Added new handler types: lane count, link rate, pre-emphasis voltage swing adjust and set MSA.
4395Added function: XDpTxSs_SetHasRedriverInPath.
4396Updated register offsets in debug MSA info.
4397Removed cross checking user set resolution with RX EDID.
4398Set interlace to zero when video mode is XVIDC_VM_CUSTOM.
4399Removed video mode check.
4400Added HDCP and Timer Counter support.
4401Removed cross checking user set resolution with RX EDID.
4402
4403hdcp1x_v2_0
4404Added dependency on timer counter driver.
4405Updated for integration in subsystems for cases that an HDCP core is not instantiated (default *_g.c and protection macros).
4406Added EffectiveAddr argument to XHdcp1x_CfgInitialize.
4407Updated naming of HDMI references as xv_hdmi* rather than xhdmi* to match new HDMI drivers.
4408
4409rtcpsu_v1_1
4410Enabled rtc controller switching to battery supply when vcc_psaux is not available
4411
4412tmrctr_v4_0
4413Added alternate initialization sequence to allow for setting a different EffectiveAddress (using standard CfgInitialize and InitHw).
4414Updated for integration in subsystems for cases that an HDCP core is not instantiated (default *_g.c and protection macros).
4415Creation of xtmrctr_sinit.c file. Moved LookupConfig from xtmrctr.c.
4416
4417v_hdmirx_v1_0
4418Initial release.
4419
4420v_hdmirxss_v1_0
4421Initial release.
4422
4423v_hdmitx_v1_0
4424Initial release.
4425
4426v_hdmitxss_v1_0
4427Initial release.
4428
4429video_common_v2_1
4430Fixed video timings for some resolutions.
4431   XVIDC_VM_720x480_60_I,
4432   XVIDC_VM_720x576_50_I,
4433   XVIDC_VM_1440x480_60_I,
4434   XVIDC_VM_1440x576_50_I,
4435   XVIDC_VM_1920x1080_50_I,
4436   XVIDC_VM_1920x1080_60_I,
4437   XVIDC_VM_1280x720_50_P,
4438   XVIDC_VM_1680x720_50_P,
4439   XVIDC_VM_1680x720_60_P.
4440
4441vphy_v1_0
4442Initial release.
4443
4444vtc_v7_1:
4445Corrected VsyncStart Calculations
4446Added interlaced programming feature.
4447
4448standalone_v5_3:
4449Modified Cortex-A9 BSP to add openamp support
4450Modified assembly instruction for iar compiler for cortex-a9
4451
4452sdps_v2_6:
4453Polled for Transfer Complete bit after cmd6.
4454Dont switch to 1.8V
4455Added support for SD v1.0
4456
4457zdma_v1_0:
4458Modified ZDMA simple transfer example
4459Modified XZDma_CreateBDList API
4460
4461zynqmp_fsbl:
4462Fix for SD1 boot failure in FSBL when the design has SD1 and no SD0/eMMC
4463Skip power-up requests for QEMU
4464Corrected the ReadBuffer index value in QSPI-24 bit (for Spansion)
4465Corrected logic to trigger PMU_0 IPI
4466Added support for SD1 and SD1 with level shifter bootmodes
4467Removed UART initialization workaround in FSBL
4468Power state not to be checked before sending powering up request
4469
4470zynqmp_pmufw:
4471Skip UART configuration during PMUFW init
4472Updated PM API
4473Added PS-Only Reset Support
4474Added DAP wake handling
4475
4476xilisf_v5_4
4477updated the IntelStmDevices list to support Micron N25Q256A flash device.
4478xilskey_v4_0:
4479Added DFT control bits programming feature for Zynq Platform
4480Modified JtagWrite API for programming eFUSE on Zynq Platform
4481Added efuse PS and bbram PS support  for Zynq MP SoC
4482Added Xilskey write and read regs APIs for ZynqMP SoC
4483Added efuseps APIs for Zynq MP
4484Added BBRAM PS functionality for Zynq MP SoC
4485Added Example for Zynq MP efusePs
4486Added BBRAM Ps example for Zynq MP SoC
4487Corrected error code names of efuse PL programming for Ultrascale
4488Added c++ boundary blocks for header files xilskey_eps.h, xilskey_utils.h and xilskey_jtag.h.
4489
4490freertos823_xilinx_v1_0:
4491The freertos821_xilinx_v1_0 version is changed to freertos823_xilinx_v1_0 to upgrade the
4492freertos kernel version to 8.2.3 with the support for processor cortex-a53 64bit mode.
4493
4494lwip141_v1_3:
4495Made changes in xemacpsif_dma.c to add required barriers.
4496Remove repeated sysarch protect and unprotect calls.
4497Replace printf with xil_printf.
4498Add support for TI phy.
4499
4500Change Log for 2015.3
4501=================================
4502axicdma_v4_0
4503Added support for 64-bit Addressing.
4504Mark only BD Memory region as uncacheable.
4505
4506axidma_v9_0
4507Added support for 64-bit Addressing.
4508Fix bug in the number of words in a buffer descriptor
4509
4510axiethernet_v5_0
4511Updated the driver tcl for Hier IP(To support User parameters).
4512Fixed CR 870631 AXI Ethernet with FIFO will fail to create the BSP if the interrupt pin on the FIFO is unconnected.
4513
4514axipmon_v6_2
4515New version of the driver for Ultrascale+ ZynqMP SoC with the following changes
4516Added Is32BitFiltering in XAxiPmon_Config structure.
4517Updated XAxiPmon_SetWriteId, XAxiPmon_SetReadId,XAxiPmon_GetWriteId, XAxiPmon_GetReadId
4518XAxiPmon_SetWriteIdMask, XAxiPmon_SetReadIdMask, XAxiPmon_GetWriteIdMask, XAxiPmon_GetReadIdMask
4519functions in xaxipmon.c.
4520Added XAPM_RID_OFFSET and XAPM_RIDMASK_OFFSET in xaxipmon_hw.h
4521
4522axipmon_v6_3
4523Updated version to comply to MISRA-C:2012 guidelines.
4524
4525axis_switch_v1_0
4526New version of the driver to support to axis_switch
4527
4528axivdma_v6_0
4529Added support for a vdma triple buffer api and added support for 64 bit addressing.
4530
4531canfd_v1_0
4532First version of the driver for can_fd.
4533
4534coresightps_dcc_v1_1
4535Updated for Ultrascale+ ZynqMP SoC support
4536
4537cpu_cortexa53_v1_0
4538New driver for cortex a53
4539
4540cpu_cortexr5_v1_0
4541New driver for cortex R5
4542
4543cpu_cortexr5_v1_1
4544Minor updates in the tcl file
4545
4546csu_dma_v1_0
4547First version of the driver for CSU DMA in Ultrascale+ ZynqMP SoC
4548
4549dp_v2_0:
4550Added MST functionality to RX. New APIs added are:
4551- XDp_RxHandleDownReq, XDp_RxGetIicMapEntry,
4552- XDp_RxSetIicMapEntry, XDp_RxSetDpcdMap,
4553- XDp_RxMstExposePort, XDp_RxMstSetPort,
4554- XDp_RxMstSetInputPort, XDp_RxMstSetPbn,
4555- XDp_RxSetIntrDownReqHandler, XDp_RxSetIntrDownReplyHandler,
4556- XDp_RxSetIntrAudioOverHandler, XDp_RxSetIntrPayloadAllocHandler,
4557- XDp_RxSetIntrActRxHandler, XDp_RxSetIntrCrcTestHandler
4558Added Intr*Handler and Intr*CallbackRef interrupt-related members to XDp_Rx
4559structure for:
4560- DownReq, DownReply, AudioOver, PayloadAlloc, ActRx,CrcTest
4561Added new data structures related to RX MST topology:
4562- XDp_RxIicMapEntry, XDp_RxDpcdMap, XDp_RxPort, XDp_RxTopology
4563Renamed XDp_Tx* to XDp_* to reflect commonality with RX for:
4564- XDp_TxSbMsgLinkAddressReplyPortDetail
4565- XDp_TxSbMsgLinkAddressReplyDeviceInfo
4566GUID type change for ease of use:
4567- 'u32 Guid[4]' changed to 'u8 Guid[16]'
4568Added handlers and setter functions for HDCP and unplug
4569events.
4570Added callbacks for lane count changes, link rate changes
4571and pre-emphasis + voltage swing adjust requests.
4572
4573dptxss_v1_0:
4574Initial version of the driver for the Display Port Tx Sub System Driver
4575
4576dual_splitter_v1_0
4577Initial version of the Xilinx Dual Splitter core
4578
4579emaclite_v4_1
4580Added Length check in XEmacLite_AlignedWrite function in xemaclite_l.c file to
4581avoid extra write operation - CR 843707
4582
4583emacps_v3_1
4584Do not call error handler with '0' error code when there is no error- CR 869403
4585
4586gpiops_v3_1
4587Added support for Zynq Ultrascale+ MP -  CR 856980.
4588
4589iomodule_v2_2
4590Updated XIOModule_Uart_InterruptHandler function in xiomodule_uart_intr.c file
4591to read Status register instead of reading Interrupt Pending register - CR #862715
4592
4593ipipsu_v1_0:
4594Initial version of the IPI driver for Ultrascale+ ZynqMPSoC
4595
4596nandpsu_v1_0
4597Initial version of the NAND driver for Ultrascale+ ZynqMPSoC
4598
4599qspipsu_v1_0
4600Initial version of the QSPI driver for Ultrascale+ ZynqMPSoC
4601
4602rtcpsu_v1_0
4603Initial version of the RTC driver for Ultrascale+ ZynqMPSoC
4604
4605sdps_v2_5
4606Added SD 3.0 features and updated the code according to MISRAC-2012.
4607
4608devcfg_v3_3:
4609Minor driver version upgrade that fixes the XDcfg_ReadMultiBootConfig macro which was passing
4610wrong number of arguments
4611
4612llfifo_v5_0:
4613Major driver version that updates the register offsets in the AXI4 data path as per latest IP version(v4.1)
4614
4615sysmon_v7_1:
4616Minor driver version upgrade that modifies temperature transfer function for for Ultrascale.
4617
4618video_common_v2_0
4619Added new timings:
4620   XVIDC_VM_1440x480_60_I,
4621   XVIDC_VM_1440x576_50_I,
4622   XVIDC_VM_1440x240_60_P,
4623   XVIDC_VM_1680x720_50_P,
4624   XVIDC_VM_1680x720_60_P,
4625   XVIDC_VM_1680x720_100_P,
4626   XVIDC_VM_1680x720_120_P,
4627   XVIDC_VM_1680x1050_50_P,
4628   XVIDC_VM_1920x1080_100_P,
4629   XVIDC_VM_1920x1080_120_P,
4630   XVIDC_VM_2560x1080_50_P,
4631   XVIDC_VM_2560x1080_60_P,
4632   XVIDC_VM_2560x1080_100_P,
4633   XVIDC_VM_2560x1080_120_P,
4634   XVIDC_VM_4096x2160_24_P,
4635   XVIDC_VM_4096x2160_25_P,
4636   XVIDC_VM_4096x2160_30_P,
4637   XVIDC_VM_4096x2160_50_P,
4638   XVIDC_VM_4096x2160_60_P,
4639   XVIDC_VM_4096x2160_60_P_RB,
4640   XVIDC_VM_CUSTOM.
4641Modified XVIDC_DP159_CT_PWR -> XVIDC_DP159_CT_UNPLUG.
4642Added bit error count function.
4643Removed extra DP159 register programming as per new DP159 programming guide.
4644
4645vtc_v7_0:
4646Major driver version upgrade that makes the following changes:
4647Adds interlaced field to XVtc_Signal structure. Removes XVtc_RegUpdate as there are is one more API
4648XVtc_RegUpdateEnable present with same functionality.
4649Modifies HActiveVideo value to 1920 for XVTC_VMODE_1080I mode.
4650Removes Major, Minor and Revision parameters from XVtc_GetVersion.
4651Modifies return type of XVtc_GetVersion from void to u32.
4652Adds progressive and interlaced mode switching feature.
4653Modifies XVtc_SetGenerator, XVtc_GetGenerator, XVtc_GetDetector, XVtc_ConvTiming2Signal and XVtc_ConvSignal2Timing APIs.
4654Removes XVTC_ERR_FIL_MASK macro because it is  not present in latest product guide.
4655Modifies register offsets from XVTC_* to XVTC_*_OFFSET for consistency.
4656Adds new file xvtc_selftest.c.
4657Removed call to Reset from initialization function to avoid processor exception. See CR#949946
4658
4659xadcps_v2_2:
4660Minor driver version upgrade that uses correct Device Config base address in xadcps.c.
4661
4662zdma_v1_0:
4663New version of the LPD/FPD DMA driver for Ultrascale+ ZynqMPSoC
4664
4665usbps_v2_3:
4666Created new version
4667Fixed CR#873972 - corrected logic for moving of dTD Head/Tail Pointers
4668Fixed CR#873974 - invalidated Caches After Buffer Receive in Endpoint Buffer Handler
4669
4670uartps_v3_1:
4671Added support for Zynq Ultrascale+ MP related changes
4672
4673uartns550_v3_3:
4674Fixed an issue with the clock divisor - CR 857013
4675
4676uartlite_v3_0:
4677XUartLite_ReceiveBuffer function in xuartlite.c is updated to receive data into user buffer in critical region - CR#865787.
4678
4679standalone_v5_2:
4680Corrected interrupt ID's of TTC.
4681Added PSU definitions for TEST APP.
4682Modified translation table in a53 32bit bsp
4683Changed A53 32bit bsp makefile
4684Added interrupt IDs for RTC
4685Rearranged the Cortex A53 folder structure
4686Modified translation_table.s for Zynq DDR-less system
4687Modified Xil_DCacheFlushRange, Xil_DCacheInvalidateRange and Xil_ICacheInvalidateRange API to add
4688Support for addresses higher than 4GB by not truncating the addresses to 32bit
4689Added support for 64bit print in xil_printf
4690xil_settlbattributes modified for addresses > 4GB
4691Changed in boot.s to include more memory attributes
4692
4693xilffs_v3_1:
4694Used --create option for armcc compiler
4695Modify makefile to check for IAR compiler
4696Card detection checked after disk status
4697Added support for SD1
4698Removed Change Bus Speed, Clock API's in glue layer
4699Added Read_Only option
4700Add card check logic to support Zynq Ultrascale+ MPSoC
4701
4702xilisf_v5_4:
4703Modified SPIPS examples to support on ZynqMP.
4704Added examples to test QSPIPSU interface.
4705
4706xilflash_v4_1:
4707Fix Write buffer programming for IntelStrataFlash
4708Fix Spansion write buffer programming
4709Added Pass/Fail string to readwrite_example
4710
4711xilskey_v3_0:
4712Added ultrascale efuse functionality
4713Added new functions
4714Added API for clk calculations
4715
4716lwip141_v1_2:
4717Add support for A53
4718Update autonegotiation for ZynqMP
4719Use updated autonegotiation for Zynq as well
4720Give error message when A53 32 bit compiler is used
4721Fix bsp compilation errors when elite is configured with interrupts though a concat IP
4722
4723zynq_fsbl:
4724In the file pcap.c, changes done to write to devcfg.STATUS register to clear the DMA done count.
4725
4726freertos821_xilinx_v1_0:
4727FreeRTOS BSP that supports MicroBlaze, CortexA9 and CortexR5
4728
4729xilopenamp_v1_0:
4730XilOpenAMP library that supports Cortex-R5 slave
4731
4732freertos_hello_world:
4733New FreeRTOS demo application
4734
4735openamp_matrix_multiply
4736openamp_rpc_demo
4737openamp_echo_test:
4738OpenAMP demo applications to run on R5 slave and are based on xilopenamp_v1_0.
4739
4740xilkenrel_v6_3:
4741CR:938727 configuring the config_bufmalloc exporting invalid number of statifc bufs.
4742
4743xilpm_v2_0:
4744Replace ACK_CB_STANDARD with ACK_NON_BLOCKING
4745Removed latency argument for XPm_ReleaseNode
4746Migrate to IPI driver
4747Added XPm_ResetAssert and XPm_ResetGetStatus PM API calls
4748PM return value changes to be compliant with PMU-FW
4749Added resume_address to self suspend and request wake-up APIs
4750Add callback APIs
4751Add MMIO API calls
4752Added PM node IDs for all remaining devices
4753Added capability CAP_WAKEUP
4754Updated example to as per API changes
4755
4756