linux/arch/arm/mach-davinci/board-dm644x-evm.c
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   1/*
   2 * TI DaVinci EVM board support
   3 *
   4 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
   5 *
   6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
   7 * the terms of the GNU General Public License version 2. This program
   8 * is licensed "as is" without any warranty of any kind, whether express
   9 * or implied.
  10 */
  11#include <linux/kernel.h>
  12#include <linux/init.h>
  13#include <linux/dma-mapping.h>
  14#include <linux/platform_device.h>
  15#include <linux/gpio.h>
  16#include <linux/i2c.h>
  17#include <linux/i2c/pcf857x.h>
  18#include <linux/i2c/at24.h>
  19#include <linux/mtd/mtd.h>
  20#include <linux/mtd/nand.h>
  21#include <linux/mtd/partitions.h>
  22#include <linux/mtd/physmap.h>
  23#include <linux/phy.h>
  24#include <linux/clk.h>
  25#include <linux/videodev2.h>
  26#include <linux/export.h>
  27
  28#include <media/tvp514x.h>
  29
  30#include <asm/mach-types.h>
  31#include <asm/mach/arch.h>
  32
  33#include <mach/common.h>
  34#include <mach/i2c.h>
  35#include <mach/serial.h>
  36#include <mach/mux.h>
  37#include <mach/nand.h>
  38#include <mach/mmc.h>
  39#include <mach/usb.h>
  40#include <mach/aemif.h>
  41
  42#include "davinci.h"
  43
  44#define DM644X_EVM_PHY_ID               "davinci_mdio-0:01"
  45#define LXT971_PHY_ID   (0x001378e2)
  46#define LXT971_PHY_MASK (0xfffffff0)
  47
  48static struct mtd_partition davinci_evm_norflash_partitions[] = {
  49        /* bootloader (UBL, U-Boot, etc) in first 5 sectors */
  50        {
  51                .name           = "bootloader",
  52                .offset         = 0,
  53                .size           = 5 * SZ_64K,
  54                .mask_flags     = MTD_WRITEABLE, /* force read-only */
  55        },
  56        /* bootloader params in the next 1 sectors */
  57        {
  58                .name           = "params",
  59                .offset         = MTDPART_OFS_APPEND,
  60                .size           = SZ_64K,
  61                .mask_flags     = 0,
  62        },
  63        /* kernel */
  64        {
  65                .name           = "kernel",
  66                .offset         = MTDPART_OFS_APPEND,
  67                .size           = SZ_2M,
  68                .mask_flags     = 0
  69        },
  70        /* file system */
  71        {
  72                .name           = "filesystem",
  73                .offset         = MTDPART_OFS_APPEND,
  74                .size           = MTDPART_SIZ_FULL,
  75                .mask_flags     = 0
  76        }
  77};
  78
  79static struct physmap_flash_data davinci_evm_norflash_data = {
  80        .width          = 2,
  81        .parts          = davinci_evm_norflash_partitions,
  82        .nr_parts       = ARRAY_SIZE(davinci_evm_norflash_partitions),
  83};
  84
  85/* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF
  86 * limits addresses to 16M, so using addresses past 16M will wrap */
  87static struct resource davinci_evm_norflash_resource = {
  88        .start          = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
  89        .end            = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
  90        .flags          = IORESOURCE_MEM,
  91};
  92
  93static struct platform_device davinci_evm_norflash_device = {
  94        .name           = "physmap-flash",
  95        .id             = 0,
  96        .dev            = {
  97                .platform_data  = &davinci_evm_norflash_data,
  98        },
  99        .num_resources  = 1,
 100        .resource       = &davinci_evm_norflash_resource,
 101};
 102
 103/* DM644x EVM includes a 64 MByte small-page NAND flash (16K blocks).
 104 * It may used instead of the (default) NOR chip to boot, using TI's
 105 * tools to install the secondary boot loader (UBL) and U-Boot.
 106 */
 107static struct mtd_partition davinci_evm_nandflash_partition[] = {
 108        /* Bootloader layout depends on whose u-boot is installed, but we
 109         * can hide all the details.
 110         *  - block 0 for u-boot environment ... in mainline u-boot
 111         *  - block 1 for UBL (plus up to four backup copies in blocks 2..5)
 112         *  - blocks 6...? for u-boot
 113         *  - blocks 16..23 for u-boot environment ... in TI's u-boot
 114         */
 115        {
 116                .name           = "bootloader",
 117                .offset         = 0,
 118                .size           = SZ_256K + SZ_128K,
 119                .mask_flags     = MTD_WRITEABLE,        /* force read-only */
 120        },
 121        /* Kernel */
 122        {
 123                .name           = "kernel",
 124                .offset         = MTDPART_OFS_APPEND,
 125                .size           = SZ_4M,
 126                .mask_flags     = 0,
 127        },
 128        /* File system (older GIT kernels started this on the 5MB mark) */
 129        {
 130                .name           = "filesystem",
 131                .offset         = MTDPART_OFS_APPEND,
 132                .size           = MTDPART_SIZ_FULL,
 133                .mask_flags     = 0,
 134        }
 135        /* A few blocks at end hold a flash BBT ... created by TI's CCS
 136         * using flashwriter_nand.out, but ignored by TI's versions of
 137         * Linux and u-boot.  We boot faster by using them.
 138         */
 139};
 140
 141static struct davinci_aemif_timing davinci_evm_nandflash_timing = {
 142        .wsetup         = 20,
 143        .wstrobe        = 40,
 144        .whold          = 20,
 145        .rsetup         = 10,
 146        .rstrobe        = 40,
 147        .rhold          = 10,
 148        .ta             = 40,
 149};
 150
 151static struct davinci_nand_pdata davinci_evm_nandflash_data = {
 152        .parts          = davinci_evm_nandflash_partition,
 153        .nr_parts       = ARRAY_SIZE(davinci_evm_nandflash_partition),
 154        .ecc_mode       = NAND_ECC_HW,
 155        .bbt_options    = NAND_BBT_USE_FLASH,
 156        .timing         = &davinci_evm_nandflash_timing,
 157};
 158
 159static struct resource davinci_evm_nandflash_resource[] = {
 160        {
 161                .start          = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
 162                .end            = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
 163                .flags          = IORESOURCE_MEM,
 164        }, {
 165                .start          = DM644X_ASYNC_EMIF_CONTROL_BASE,
 166                .end            = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
 167                .flags          = IORESOURCE_MEM,
 168        },
 169};
 170
 171static struct platform_device davinci_evm_nandflash_device = {
 172        .name           = "davinci_nand",
 173        .id             = 0,
 174        .dev            = {
 175                .platform_data  = &davinci_evm_nandflash_data,
 176        },
 177        .num_resources  = ARRAY_SIZE(davinci_evm_nandflash_resource),
 178        .resource       = davinci_evm_nandflash_resource,
 179};
 180
 181static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);
 182
 183static struct platform_device davinci_fb_device = {
 184        .name           = "davincifb",
 185        .id             = -1,
 186        .dev = {
 187                .dma_mask               = &davinci_fb_dma_mask,
 188                .coherent_dma_mask      = DMA_BIT_MASK(32),
 189        },
 190        .num_resources = 0,
 191};
 192
 193static struct tvp514x_platform_data dm644xevm_tvp5146_pdata = {
 194        .clk_polarity = 0,
 195        .hs_polarity = 1,
 196        .vs_polarity = 1
 197};
 198
 199#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
 200/* Inputs available at the TVP5146 */
 201static struct v4l2_input dm644xevm_tvp5146_inputs[] = {
 202        {
 203                .index = 0,
 204                .name = "Composite",
 205                .type = V4L2_INPUT_TYPE_CAMERA,
 206                .std = TVP514X_STD_ALL,
 207        },
 208        {
 209                .index = 1,
 210                .name = "S-Video",
 211                .type = V4L2_INPUT_TYPE_CAMERA,
 212                .std = TVP514X_STD_ALL,
 213        },
 214};
 215
 216/*
 217 * this is the route info for connecting each input to decoder
 218 * ouput that goes to vpfe. There is a one to one correspondence
 219 * with tvp5146_inputs
 220 */
 221static struct vpfe_route dm644xevm_tvp5146_routes[] = {
 222        {
 223                .input = INPUT_CVBS_VI2B,
 224                .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
 225        },
 226        {
 227                .input = INPUT_SVIDEO_VI2C_VI1C,
 228                .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
 229        },
 230};
 231
 232static struct vpfe_subdev_info dm644xevm_vpfe_sub_devs[] = {
 233        {
 234                .name = "tvp5146",
 235                .grp_id = 0,
 236                .num_inputs = ARRAY_SIZE(dm644xevm_tvp5146_inputs),
 237                .inputs = dm644xevm_tvp5146_inputs,
 238                .routes = dm644xevm_tvp5146_routes,
 239                .can_route = 1,
 240                .ccdc_if_params = {
 241                        .if_type = VPFE_BT656,
 242                        .hdpol = VPFE_PINPOL_POSITIVE,
 243                        .vdpol = VPFE_PINPOL_POSITIVE,
 244                },
 245                .board_info = {
 246                        I2C_BOARD_INFO("tvp5146", 0x5d),
 247                        .platform_data = &dm644xevm_tvp5146_pdata,
 248                },
 249        },
 250};
 251
 252static struct vpfe_config dm644xevm_capture_cfg = {
 253        .num_subdevs = ARRAY_SIZE(dm644xevm_vpfe_sub_devs),
 254        .i2c_adapter_id = 1,
 255        .sub_devs = dm644xevm_vpfe_sub_devs,
 256        .card_name = "DM6446 EVM",
 257        .ccdc = "DM6446 CCDC",
 258};
 259
 260static struct platform_device rtc_dev = {
 261        .name           = "rtc_davinci_evm",
 262        .id             = -1,
 263};
 264
 265static struct snd_platform_data dm644x_evm_snd_data;
 266
 267/*----------------------------------------------------------------------*/
 268
 269/*
 270 * I2C GPIO expanders
 271 */
 272
 273#define PCF_Uxx_BASE(x) (DAVINCI_N_GPIO + ((x) * 8))
 274
 275
 276/* U2 -- LEDs */
 277
 278static struct gpio_led evm_leds[] = {
 279        { .name = "DS8", .active_low = 1,
 280                .default_trigger = "heartbeat", },
 281        { .name = "DS7", .active_low = 1, },
 282        { .name = "DS6", .active_low = 1, },
 283        { .name = "DS5", .active_low = 1, },
 284        { .name = "DS4", .active_low = 1, },
 285        { .name = "DS3", .active_low = 1, },
 286        { .name = "DS2", .active_low = 1,
 287                .default_trigger = "mmc0", },
 288        { .name = "DS1", .active_low = 1,
 289                .default_trigger = "ide-disk", },
 290};
 291
 292static const struct gpio_led_platform_data evm_led_data = {
 293        .num_leds       = ARRAY_SIZE(evm_leds),
 294        .leds           = evm_leds,
 295};
 296
 297static struct platform_device *evm_led_dev;
 298
 299static int
 300evm_led_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
 301{
 302        struct gpio_led *leds = evm_leds;
 303        int status;
 304
 305        while (ngpio--) {
 306                leds->gpio = gpio++;
 307                leds++;
 308        }
 309
 310        /* what an extremely annoying way to be forced to handle
 311         * device unregistration ...
 312         */
 313        evm_led_dev = platform_device_alloc("leds-gpio", 0);
 314        platform_device_add_data(evm_led_dev,
 315                        &evm_led_data, sizeof evm_led_data);
 316
 317        evm_led_dev->dev.parent = &client->dev;
 318        status = platform_device_add(evm_led_dev);
 319        if (status < 0) {
 320                platform_device_put(evm_led_dev);
 321                evm_led_dev = NULL;
 322        }
 323        return status;
 324}
 325
 326static int
 327evm_led_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
 328{
 329        if (evm_led_dev) {
 330                platform_device_unregister(evm_led_dev);
 331                evm_led_dev = NULL;
 332        }
 333        return 0;
 334}
 335
 336static struct pcf857x_platform_data pcf_data_u2 = {
 337        .gpio_base      = PCF_Uxx_BASE(0),
 338        .setup          = evm_led_setup,
 339        .teardown       = evm_led_teardown,
 340};
 341
 342
 343/* U18 - A/V clock generator and user switch */
 344
 345static int sw_gpio;
 346
 347static ssize_t
 348sw_show(struct device *d, struct device_attribute *a, char *buf)
 349{
 350        char *s = gpio_get_value_cansleep(sw_gpio) ? "on\n" : "off\n";
 351
 352        strcpy(buf, s);
 353        return strlen(s);
 354}
 355
 356static DEVICE_ATTR(user_sw, S_IRUGO, sw_show, NULL);
 357
 358static int
 359evm_u18_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
 360{
 361        int     status;
 362
 363        /* export dip switch option */
 364        sw_gpio = gpio + 7;
 365        status = gpio_request(sw_gpio, "user_sw");
 366        if (status == 0)
 367                status = gpio_direction_input(sw_gpio);
 368        if (status == 0)
 369                status = device_create_file(&client->dev, &dev_attr_user_sw);
 370        else
 371                gpio_free(sw_gpio);
 372        if (status != 0)
 373                sw_gpio = -EINVAL;
 374
 375        /* audio PLL:  48 kHz (vs 44.1 or 32), single rate (vs double) */
 376        gpio_request(gpio + 3, "pll_fs2");
 377        gpio_direction_output(gpio + 3, 0);
 378
 379        gpio_request(gpio + 2, "pll_fs1");
 380        gpio_direction_output(gpio + 2, 0);
 381
 382        gpio_request(gpio + 1, "pll_sr");
 383        gpio_direction_output(gpio + 1, 0);
 384
 385        return 0;
 386}
 387
 388static int
 389evm_u18_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
 390{
 391        gpio_free(gpio + 1);
 392        gpio_free(gpio + 2);
 393        gpio_free(gpio + 3);
 394
 395        if (sw_gpio > 0) {
 396                device_remove_file(&client->dev, &dev_attr_user_sw);
 397                gpio_free(sw_gpio);
 398        }
 399        return 0;
 400}
 401
 402static struct pcf857x_platform_data pcf_data_u18 = {
 403        .gpio_base      = PCF_Uxx_BASE(1),
 404        .n_latch        = (1 << 3) | (1 << 2) | (1 << 1),
 405        .setup          = evm_u18_setup,
 406        .teardown       = evm_u18_teardown,
 407};
 408
 409
 410/* U35 - various I/O signals used to manage USB, CF, ATA, etc */
 411
 412static int
 413evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
 414{
 415        /* p0 = nDRV_VBUS (initial:  don't supply it) */
 416        gpio_request(gpio + 0, "nDRV_VBUS");
 417        gpio_direction_output(gpio + 0, 1);
 418
 419        /* p1 = VDDIMX_EN */
 420        gpio_request(gpio + 1, "VDDIMX_EN");
 421        gpio_direction_output(gpio + 1, 1);
 422
 423        /* p2 = VLYNQ_EN */
 424        gpio_request(gpio + 2, "VLYNQ_EN");
 425        gpio_direction_output(gpio + 2, 1);
 426
 427        /* p3 = n3V3_CF_RESET (initial: stay in reset) */
 428        gpio_request(gpio + 3, "nCF_RESET");
 429        gpio_direction_output(gpio + 3, 0);
 430
 431        /* (p4 unused) */
 432
 433        /* p5 = 1V8_WLAN_RESET (initial: stay in reset) */
 434        gpio_request(gpio + 5, "WLAN_RESET");
 435        gpio_direction_output(gpio + 5, 1);
 436
 437        /* p6 = nATA_SEL (initial: select) */
 438        gpio_request(gpio + 6, "nATA_SEL");
 439        gpio_direction_output(gpio + 6, 0);
 440
 441        /* p7 = nCF_SEL (initial: deselect) */
 442        gpio_request(gpio + 7, "nCF_SEL");
 443        gpio_direction_output(gpio + 7, 1);
 444
 445        return 0;
 446}
 447
 448static int
 449evm_u35_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
 450{
 451        gpio_free(gpio + 7);
 452        gpio_free(gpio + 6);
 453        gpio_free(gpio + 5);
 454        gpio_free(gpio + 3);
 455        gpio_free(gpio + 2);
 456        gpio_free(gpio + 1);
 457        gpio_free(gpio + 0);
 458        return 0;
 459}
 460
 461static struct pcf857x_platform_data pcf_data_u35 = {
 462        .gpio_base      = PCF_Uxx_BASE(2),
 463        .setup          = evm_u35_setup,
 464        .teardown       = evm_u35_teardown,
 465};
 466
 467/*----------------------------------------------------------------------*/
 468
 469/* Most of this EEPROM is unused, but U-Boot uses some data:
 470 *  - 0x7f00, 6 bytes Ethernet Address
 471 *  - 0x0039, 1 byte NTSC vs PAL (bit 0x80 == PAL)
 472 *  - ... newer boards may have more
 473 */
 474
 475static struct at24_platform_data eeprom_info = {
 476        .byte_len       = (256*1024) / 8,
 477        .page_size      = 64,
 478        .flags          = AT24_FLAG_ADDR16,
 479        .setup          = davinci_get_mac_addr,
 480        .context        = (void *)0x7f00,
 481};
 482
 483/*
 484 * MSP430 supports RTC, card detection, input from IR remote, and
 485 * a bit more.  It triggers interrupts on GPIO(7) from pressing
 486 * buttons on the IR remote, and for card detect switches.
 487 */
 488static struct i2c_client *dm6446evm_msp;
 489
 490static int dm6446evm_msp_probe(struct i2c_client *client,
 491                const struct i2c_device_id *id)
 492{
 493        dm6446evm_msp = client;
 494        return 0;
 495}
 496
 497static int dm6446evm_msp_remove(struct i2c_client *client)
 498{
 499        dm6446evm_msp = NULL;
 500        return 0;
 501}
 502
 503static const struct i2c_device_id dm6446evm_msp_ids[] = {
 504        { "dm6446evm_msp", 0, },
 505        { /* end of list */ },
 506};
 507
 508static struct i2c_driver dm6446evm_msp_driver = {
 509        .driver.name    = "dm6446evm_msp",
 510        .id_table       = dm6446evm_msp_ids,
 511        .probe          = dm6446evm_msp_probe,
 512        .remove         = dm6446evm_msp_remove,
 513};
 514
 515static int dm6444evm_msp430_get_pins(void)
 516{
 517        static const char txbuf[2] = { 2, 4, };
 518        char buf[4];
 519        struct i2c_msg msg[2] = {
 520                {
 521                        .addr = dm6446evm_msp->addr,
 522                        .flags = 0,
 523                        .len = 2,
 524                        .buf = (void __force *)txbuf,
 525                },
 526                {
 527                        .addr = dm6446evm_msp->addr,
 528                        .flags = I2C_M_RD,
 529                        .len = 4,
 530                        .buf = buf,
 531                },
 532        };
 533        int status;
 534
 535        if (!dm6446evm_msp)
 536                return -ENXIO;
 537
 538        /* Command 4 == get input state, returns port 2 and port3 data
 539         *   S Addr W [A] len=2 [A] cmd=4 [A]
 540         *   RS Addr R [A] [len=4] A [cmd=4] A [port2] A [port3] N P
 541         */
 542        status = i2c_transfer(dm6446evm_msp->adapter, msg, 2);
 543        if (status < 0)
 544                return status;
 545
 546        dev_dbg(&dm6446evm_msp->dev,
 547                "PINS: %02x %02x %02x %02x\n",
 548                buf[0], buf[1], buf[2], buf[3]);
 549
 550        return (buf[3] << 8) | buf[2];
 551}
 552
 553static int dm6444evm_mmc_get_cd(int module)
 554{
 555        int status = dm6444evm_msp430_get_pins();
 556
 557        return (status < 0) ? status : !(status & BIT(1));
 558}
 559
 560static int dm6444evm_mmc_get_ro(int module)
 561{
 562        int status = dm6444evm_msp430_get_pins();
 563
 564        return (status < 0) ? status : status & BIT(6 + 8);
 565}
 566
 567static struct davinci_mmc_config dm6446evm_mmc_config = {
 568        .get_cd         = dm6444evm_mmc_get_cd,
 569        .get_ro         = dm6444evm_mmc_get_ro,
 570        .wires          = 4,
 571        .version        = MMC_CTLR_VERSION_1
 572};
 573
 574static struct i2c_board_info __initdata i2c_info[] =  {
 575        {
 576                I2C_BOARD_INFO("dm6446evm_msp", 0x23),
 577        },
 578        {
 579                I2C_BOARD_INFO("pcf8574", 0x38),
 580                .platform_data  = &pcf_data_u2,
 581        },
 582        {
 583                I2C_BOARD_INFO("pcf8574", 0x39),
 584                .platform_data  = &pcf_data_u18,
 585        },
 586        {
 587                I2C_BOARD_INFO("pcf8574", 0x3a),
 588                .platform_data  = &pcf_data_u35,
 589        },
 590        {
 591                I2C_BOARD_INFO("24c256", 0x50),
 592                .platform_data  = &eeprom_info,
 593        },
 594        {
 595                I2C_BOARD_INFO("tlv320aic33", 0x1b),
 596        },
 597};
 598
 599/* The msp430 uses a slow bitbanged I2C implementation (ergo 20 KHz),
 600 * which requires 100 usec of idle bus after i2c writes sent to it.
 601 */
 602static struct davinci_i2c_platform_data i2c_pdata = {
 603        .bus_freq       = 20 /* kHz */,
 604        .bus_delay      = 100 /* usec */,
 605        .sda_pin        = 44,
 606        .scl_pin        = 43,
 607};
 608
 609static void __init evm_init_i2c(void)
 610{
 611        davinci_init_i2c(&i2c_pdata);
 612        i2c_add_driver(&dm6446evm_msp_driver);
 613        i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
 614}
 615
 616#define VENC_STD_ALL    (V4L2_STD_NTSC | V4L2_STD_PAL)
 617
 618/* venc standard timings */
 619static struct vpbe_enc_mode_info dm644xevm_enc_std_timing[] = {
 620        {
 621                .name           = "ntsc",
 622                .timings_type   = VPBE_ENC_STD,
 623                .timings        = {V4L2_STD_525_60},
 624                .interlaced     = 1,
 625                .xres           = 720,
 626                .yres           = 480,
 627                .aspect         = {11, 10},
 628                .fps            = {30000, 1001},
 629                .left_margin    = 0x79,
 630                .upper_margin   = 0x10,
 631        },
 632        {
 633                .name           = "pal",
 634                .timings_type   = VPBE_ENC_STD,
 635                .timings        = {V4L2_STD_625_50},
 636                .interlaced     = 1,
 637                .xres           = 720,
 638                .yres           = 576,
 639                .aspect         = {54, 59},
 640                .fps            = {25, 1},
 641                .left_margin    = 0x7e,
 642                .upper_margin   = 0x16,
 643        },
 644};
 645
 646/* venc dv preset timings */
 647static struct vpbe_enc_mode_info dm644xevm_enc_preset_timing[] = {
 648        {
 649                .name           = "480p59_94",
 650                .timings_type   = VPBE_ENC_DV_PRESET,
 651                .timings        = {V4L2_DV_480P59_94},
 652                .interlaced     = 0,
 653                .xres           = 720,
 654                .yres           = 480,
 655                .aspect         = {1, 1},
 656                .fps            = {5994, 100},
 657                .left_margin    = 0x80,
 658                .upper_margin   = 0x20,
 659        },
 660        {
 661                .name           = "576p50",
 662                .timings_type   = VPBE_ENC_DV_PRESET,
 663                .timings        = {V4L2_DV_576P50},
 664                .interlaced     = 0,
 665                .xres           = 720,
 666                .yres           = 576,
 667                .aspect         = {1, 1},
 668                .fps            = {50, 1},
 669                .left_margin    = 0x7e,
 670                .upper_margin   = 0x30,
 671        },
 672};
 673
 674/*
 675 * The outputs available from VPBE + encoders. Keep the order same
 676 * as that of encoders. First those from venc followed by that from
 677 * encoders. Index in the output refers to index on a particular encoder.
 678 * Driver uses this index to pass it to encoder when it supports more
 679 * than one output. Userspace applications use index of the array to
 680 * set an output.
 681 */
 682static struct vpbe_output dm644xevm_vpbe_outputs[] = {
 683        {
 684                .output         = {
 685                        .index          = 0,
 686                        .name           = "Composite",
 687                        .type           = V4L2_OUTPUT_TYPE_ANALOG,
 688                        .std            = VENC_STD_ALL,
 689                        .capabilities   = V4L2_OUT_CAP_STD,
 690                },
 691                .subdev_name    = VPBE_VENC_SUBDEV_NAME,
 692                .default_mode   = "ntsc",
 693                .num_modes      = ARRAY_SIZE(dm644xevm_enc_std_timing),
 694                .modes          = dm644xevm_enc_std_timing,
 695        },
 696        {
 697                .output         = {
 698                        .index          = 1,
 699                        .name           = "Component",
 700                        .type           = V4L2_OUTPUT_TYPE_ANALOG,
 701                        .capabilities   = V4L2_OUT_CAP_PRESETS,
 702                },
 703                .subdev_name    = VPBE_VENC_SUBDEV_NAME,
 704                .default_mode   = "480p59_94",
 705                .num_modes      = ARRAY_SIZE(dm644xevm_enc_preset_timing),
 706                .modes          = dm644xevm_enc_preset_timing,
 707        },
 708};
 709
 710static struct vpbe_config dm644xevm_display_cfg = {
 711        .module_name    = "dm644x-vpbe-display",
 712        .i2c_adapter_id = 1,
 713        .osd            = {
 714                .module_name    = VPBE_OSD_SUBDEV_NAME,
 715        },
 716        .venc           = {
 717                .module_name    = VPBE_VENC_SUBDEV_NAME,
 718        },
 719        .num_outputs    = ARRAY_SIZE(dm644xevm_vpbe_outputs),
 720        .outputs        = dm644xevm_vpbe_outputs,
 721};
 722
 723static struct platform_device *davinci_evm_devices[] __initdata = {
 724        &davinci_fb_device,
 725        &rtc_dev,
 726};
 727
 728static struct davinci_uart_config uart_config __initdata = {
 729        .enabled_uarts = (1 << 0),
 730};
 731
 732static void __init
 733davinci_evm_map_io(void)
 734{
 735        dm644x_init();
 736}
 737
 738static int davinci_phy_fixup(struct phy_device *phydev)
 739{
 740        unsigned int control;
 741        /* CRITICAL: Fix for increasing PHY signal drive strength for
 742         * TX lockup issue. On DaVinci EVM, the Intel LXT971 PHY
 743         * signal strength was low causing  TX to fail randomly. The
 744         * fix is to Set bit 11 (Increased MII drive strength) of PHY
 745         * register 26 (Digital Config register) on this phy. */
 746        control = phy_read(phydev, 26);
 747        phy_write(phydev, 26, (control | 0x800));
 748        return 0;
 749}
 750
 751#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
 752    defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
 753#define HAS_ATA 1
 754#else
 755#define HAS_ATA 0
 756#endif
 757
 758#if defined(CONFIG_MTD_PHYSMAP) || \
 759    defined(CONFIG_MTD_PHYSMAP_MODULE)
 760#define HAS_NOR 1
 761#else
 762#define HAS_NOR 0
 763#endif
 764
 765#if defined(CONFIG_MTD_NAND_DAVINCI) || \
 766    defined(CONFIG_MTD_NAND_DAVINCI_MODULE)
 767#define HAS_NAND 1
 768#else
 769#define HAS_NAND 0
 770#endif
 771
 772static __init void davinci_evm_init(void)
 773{
 774        struct clk *aemif_clk;
 775        struct davinci_soc_info *soc_info = &davinci_soc_info;
 776
 777        aemif_clk = clk_get(NULL, "aemif");
 778        clk_enable(aemif_clk);
 779
 780        if (HAS_ATA) {
 781                if (HAS_NAND || HAS_NOR)
 782                        pr_warning("WARNING: both IDE and Flash are "
 783                                "enabled, but they share AEMIF pins.\n"
 784                                "\tDisable IDE for NAND/NOR support.\n");
 785                davinci_init_ide();
 786        } else if (HAS_NAND || HAS_NOR) {
 787                davinci_cfg_reg(DM644X_HPIEN_DISABLE);
 788                davinci_cfg_reg(DM644X_ATAEN_DISABLE);
 789
 790                /* only one device will be jumpered and detected */
 791                if (HAS_NAND) {
 792                        platform_device_register(&davinci_evm_nandflash_device);
 793                        evm_leds[7].default_trigger = "nand-disk";
 794                        if (HAS_NOR)
 795                                pr_warning("WARNING: both NAND and NOR flash "
 796                                        "are enabled; disable one of them.\n");
 797                } else if (HAS_NOR)
 798                        platform_device_register(&davinci_evm_norflash_device);
 799        }
 800
 801        platform_add_devices(davinci_evm_devices,
 802                             ARRAY_SIZE(davinci_evm_devices));
 803        evm_init_i2c();
 804
 805        davinci_setup_mmc(0, &dm6446evm_mmc_config);
 806        dm644x_init_video(&dm644xevm_capture_cfg, &dm644xevm_display_cfg);
 807
 808        davinci_serial_init(&uart_config);
 809        dm644x_init_asp(&dm644x_evm_snd_data);
 810
 811        /* irlml6401 switches over 1A, in under 8 msec */
 812        davinci_setup_usb(1000, 8);
 813
 814        soc_info->emac_pdata->phy_id = DM644X_EVM_PHY_ID;
 815        /* Register the fixup for PHY on DaVinci */
 816        phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK,
 817                                        davinci_phy_fixup);
 818
 819}
 820
 821MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
 822        /* Maintainer: MontaVista Software <source@mvista.com> */
 823        .atag_offset  = 0x100,
 824        .map_io       = davinci_evm_map_io,
 825        .init_irq     = davinci_irq_init,
 826        .timer        = &davinci_timer,
 827        .init_machine = davinci_evm_init,
 828        .init_late      = davinci_init_late,
 829        .dma_zone_size  = SZ_128M,
 830        .restart        = davinci_restart,
 831MACHINE_END
 832