LXR qemu/kqemu.h

   1/*
   2 * KQEMU header
   3 * 
   4 * Copyright (c) 2004-2008 Fabrice Bellard
   5 * 
   6 * Permission is hereby granted, free of charge, to any person obtaining a copy
   7 * of this software and associated documentation files (the "Software"), to deal
   8 * in the Software without restriction, including without limitation the rights
   9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10 * copies of the Software, and to permit persons to whom the Software is
  11 * furnished to do so, subject to the following conditions:
  12 *
  13 * The above copyright notice and this permission notice shall be included in
  14 * all copies or substantial portions of the Software.
  15 *
  16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22 * THE SOFTWARE.
  23 */
  24#ifndef KQEMU_H
  25#define KQEMU_H
  26
  27#if defined(__i386__)
  28#define KQEMU_PAD32(x) x
  29#else
  30#define KQEMU_PAD32(x)
  31#endif
  32
  33#define KQEMU_VERSION 0x010400
  34
  35struct kqemu_segment_cache {
  36    uint16_t selector;
  37    uint16_t padding1;
  38    uint32_t flags;
  39    uint64_t base;
  40    uint32_t limit;
  41    uint32_t padding2;
  42};
  43
  44struct kqemu_cpu_state {
  45    uint64_t regs[16];
  46    uint64_t eip;
  47    uint64_t eflags;
  48
  49    struct kqemu_segment_cache segs[6]; /* selector values */
  50    struct kqemu_segment_cache ldt;
  51    struct kqemu_segment_cache tr;
  52    struct kqemu_segment_cache gdt; /* only base and limit are used */
  53    struct kqemu_segment_cache idt; /* only base and limit are used */
  54
  55    uint64_t cr0;
  56    uint64_t cr2;
  57    uint64_t cr3;
  58    uint64_t cr4;
  59    uint64_t a20_mask;
  60
  61    /* sysenter registers */
  62    uint64_t sysenter_cs;
  63    uint64_t sysenter_esp;
  64    uint64_t sysenter_eip;
  65    uint64_t efer;
  66    uint64_t star;
  67    
  68    uint64_t lstar;
  69    uint64_t cstar;
  70    uint64_t fmask;
  71    uint64_t kernelgsbase;
  72
  73    uint64_t tsc_offset;
  74
  75    uint64_t dr0;
  76    uint64_t dr1;
  77    uint64_t dr2;
  78    uint64_t dr3;
  79    uint64_t dr6;
  80    uint64_t dr7;
  81
  82    uint8_t cpl;
  83    uint8_t user_only;
  84    uint16_t padding1;
  85
  86    uint32_t error_code; /* error_code when exiting with an exception */
  87    uint64_t next_eip; /* next eip value when exiting with an interrupt */
  88    uint32_t nb_pages_to_flush; /* number of pages to flush,
  89                                       KQEMU_FLUSH_ALL means full flush */
  90#define KQEMU_MAX_PAGES_TO_FLUSH 512
  91#define KQEMU_FLUSH_ALL (KQEMU_MAX_PAGES_TO_FLUSH + 1)
  92
  93    int32_t retval;
  94
  95    /* number of ram_dirty entries to update */
  96    uint32_t nb_ram_pages_to_update; 
  97#define KQEMU_MAX_RAM_PAGES_TO_UPDATE 512
  98#define KQEMU_RAM_PAGES_UPDATE_ALL (KQEMU_MAX_RAM_PAGES_TO_UPDATE + 1)
  99
 100#define KQEMU_MAX_MODIFIED_RAM_PAGES 512
 101    uint32_t nb_modified_ram_pages;
 102};
 103
 104struct kqemu_init {
 105    uint8_t *ram_base; /* must be page aligned */
 106    KQEMU_PAD32(uint32_t padding1;)
 107    uint64_t ram_size; /* must be multiple of 4 KB */
 108    uint8_t *ram_dirty; /* must be page aligned */
 109    KQEMU_PAD32(uint32_t padding2;)
 110    uint64_t *pages_to_flush; /* must be page aligned */
 111    KQEMU_PAD32(uint32_t padding4;)
 112    uint64_t *ram_pages_to_update; /* must be page aligned */
 113    KQEMU_PAD32(uint32_t padding5;)
 114    uint64_t *modified_ram_pages; /* must be page aligned */
 115    KQEMU_PAD32(uint32_t padding6;)
 116};
 117
 118#define KQEMU_IO_MEM_RAM        0
 119#define KQEMU_IO_MEM_ROM        1
 120#define KQEMU_IO_MEM_COMM       2 /* kqemu communication page */
 121#define KQEMU_IO_MEM_UNASSIGNED 3 /* any device: return to application */
 122
 123struct kqemu_phys_mem {
 124    uint64_t phys_addr; /* physical address range: phys_addr,
 125                           phys_addr + size */
 126    uint64_t size;        
 127    uint64_t ram_addr;  /* corresponding ram address */
 128    uint32_t io_index;  /* memory type: see KQEMU_IO_MEM_xxx */
 129    uint32_t padding1;
 130};
 131
 132#define KQEMU_RET_ABORT    (-1)
 133#define KQEMU_RET_EXCEPTION 0x0000 /* 8 low order bit are the exception */
 134#define KQEMU_RET_INT       0x0100 /* 8 low order bit are the interrupt */
 135#define KQEMU_RET_SOFTMMU   0x0200 /* emulation needed (I/O or
 136                                      unsupported INSN) */
 137#define KQEMU_RET_INTR      0x0201 /* interrupted by a signal */
 138#define KQEMU_RET_SYSCALL   0x0300 /* syscall insn */
 139
 140#ifdef _WIN32
 141#define KQEMU_EXEC             CTL_CODE(FILE_DEVICE_UNKNOWN, 1, METHOD_BUFFERED, FILE_READ_ACCESS | FILE_WRITE_ACCESS)
 142#define KQEMU_INIT             CTL_CODE(FILE_DEVICE_UNKNOWN, 2, METHOD_BUFFERED, FILE_WRITE_ACCESS)
 143#define KQEMU_GET_VERSION      CTL_CODE(FILE_DEVICE_UNKNOWN, 3, METHOD_BUFFERED, FILE_READ_ACCESS)
 144#define KQEMU_MODIFY_RAM_PAGES CTL_CODE(FILE_DEVICE_UNKNOWN, 4, METHOD_BUFFERED, FILE_WRITE_ACCESS)
 145#define KQEMU_SET_PHYS_MEM     CTL_CODE(FILE_DEVICE_UNKNOWN, 5, METHOD_BUFFERED, FILE_WRITE_ACCESS)
 146#else
 147#define KQEMU_EXEC             _IOWR('q', 1, struct kqemu_cpu_state)
 148#define KQEMU_INIT             _IOW('q', 2, struct kqemu_init)
 149#define KQEMU_GET_VERSION      _IOR('q', 3, int)
 150#define KQEMU_MODIFY_RAM_PAGES _IOW('q', 4, int)
 151#define KQEMU_SET_PHYS_MEM     _IOW('q', 5, struct kqemu_phys_mem)
 152#endif
 153
 154#endif /* KQEMU_H */
 155