1
2#include "qemu/osdep.h"
3#include "qemu-common.h"
4#include "disas/bfd.h"
5#include "elf.h"
6
7#include "cpu.h"
8#include "disas/disas.h"
9
10typedef struct CPUDebug {
11 struct disassemble_info info;
12 CPUState *cpu;
13} CPUDebug;
14
15
16struct syminfo *syminfos = NULL;
17
18
19
20int
21buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
22 struct disassemble_info *info)
23{
24 if (memaddr < info->buffer_vma
25 || memaddr + length > info->buffer_vma + info->buffer_length)
26
27 return EIO;
28 memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
29 return 0;
30}
31
32
33
34static int
35target_read_memory (bfd_vma memaddr,
36 bfd_byte *myaddr,
37 int length,
38 struct disassemble_info *info)
39{
40 CPUDebug *s = container_of(info, CPUDebug, info);
41
42 cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
43 return 0;
44}
45
46
47
48void
49perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
50{
51 if (status != EIO)
52
53 (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
54 else
55
56
57 (*info->fprintf_func) (info->stream,
58 "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
59}
60
61
62
63
64
65
66
67
68void
69generic_print_address (bfd_vma addr, struct disassemble_info *info)
70{
71 (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
72}
73
74
75static void
76generic_print_host_address(bfd_vma addr, struct disassemble_info *info)
77{
78 uint64_t mask = ~0ULL >> (64 - (sizeof(void *) * 8));
79 generic_print_address(addr & mask, info);
80}
81
82
83
84int
85generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
86{
87 return 1;
88}
89
90bfd_vma bfd_getl64 (const bfd_byte *addr)
91{
92 unsigned long long v;
93
94 v = (unsigned long long) addr[0];
95 v |= (unsigned long long) addr[1] << 8;
96 v |= (unsigned long long) addr[2] << 16;
97 v |= (unsigned long long) addr[3] << 24;
98 v |= (unsigned long long) addr[4] << 32;
99 v |= (unsigned long long) addr[5] << 40;
100 v |= (unsigned long long) addr[6] << 48;
101 v |= (unsigned long long) addr[7] << 56;
102 return (bfd_vma) v;
103}
104
105bfd_vma bfd_getl32 (const bfd_byte *addr)
106{
107 unsigned long v;
108
109 v = (unsigned long) addr[0];
110 v |= (unsigned long) addr[1] << 8;
111 v |= (unsigned long) addr[2] << 16;
112 v |= (unsigned long) addr[3] << 24;
113 return (bfd_vma) v;
114}
115
116bfd_vma bfd_getb32 (const bfd_byte *addr)
117{
118 unsigned long v;
119
120 v = (unsigned long) addr[0] << 24;
121 v |= (unsigned long) addr[1] << 16;
122 v |= (unsigned long) addr[2] << 8;
123 v |= (unsigned long) addr[3];
124 return (bfd_vma) v;
125}
126
127bfd_vma bfd_getl16 (const bfd_byte *addr)
128{
129 unsigned long v;
130
131 v = (unsigned long) addr[0];
132 v |= (unsigned long) addr[1] << 8;
133 return (bfd_vma) v;
134}
135
136bfd_vma bfd_getb16 (const bfd_byte *addr)
137{
138 unsigned long v;
139
140 v = (unsigned long) addr[0] << 24;
141 v |= (unsigned long) addr[1] << 16;
142 return (bfd_vma) v;
143}
144
145static int print_insn_objdump(bfd_vma pc, disassemble_info *info,
146 const char *prefix)
147{
148 int i, n = info->buffer_length;
149 uint8_t *buf = g_malloc(n);
150
151 info->read_memory_func(pc, buf, n, info);
152
153 for (i = 0; i < n; ++i) {
154 if (i % 32 == 0) {
155 info->fprintf_func(info->stream, "\n%s: ", prefix);
156 }
157 info->fprintf_func(info->stream, "%02x", buf[i]);
158 }
159
160 g_free(buf);
161 return n;
162}
163
164static int print_insn_od_host(bfd_vma pc, disassemble_info *info)
165{
166 return print_insn_objdump(pc, info, "OBJD-H");
167}
168
169static int print_insn_od_target(bfd_vma pc, disassemble_info *info)
170{
171 return print_insn_objdump(pc, info, "OBJD-T");
172}
173
174
175
176
177
178
179
180
181void target_disas(FILE *out, CPUState *cpu, target_ulong code,
182 target_ulong size, int flags)
183{
184 CPUClass *cc = CPU_GET_CLASS(cpu);
185 target_ulong pc;
186 int count;
187 CPUDebug s;
188
189 INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
190
191 s.cpu = cpu;
192 s.info.read_memory_func = target_read_memory;
193 s.info.buffer_vma = code;
194 s.info.buffer_length = size;
195 s.info.print_address_func = generic_print_address;
196
197#ifdef TARGET_WORDS_BIGENDIAN
198 s.info.endian = BFD_ENDIAN_BIG;
199#else
200 s.info.endian = BFD_ENDIAN_LITTLE;
201#endif
202
203 if (cc->disas_set_info) {
204 cc->disas_set_info(cpu, &s.info);
205 }
206
207#if defined(TARGET_I386)
208 if (flags == 2) {
209 s.info.mach = bfd_mach_x86_64;
210 } else if (flags == 1) {
211 s.info.mach = bfd_mach_i386_i8086;
212 } else {
213 s.info.mach = bfd_mach_i386_i386;
214 }
215 s.info.print_insn = print_insn_i386;
216#elif defined(TARGET_PPC)
217 if ((flags >> 16) & 1) {
218 s.info.endian = BFD_ENDIAN_LITTLE;
219 }
220 if (flags & 0xFFFF) {
221
222 s.info.mach = flags & 0xFFFF;
223 } else {
224#ifdef TARGET_PPC64
225 s.info.mach = bfd_mach_ppc64;
226#else
227 s.info.mach = bfd_mach_ppc;
228#endif
229 }
230 s.info.disassembler_options = (char *)"any";
231 s.info.print_insn = print_insn_ppc;
232#endif
233 if (s.info.print_insn == NULL) {
234 s.info.print_insn = print_insn_od_target;
235 }
236
237 for (pc = code; size > 0; pc += count, size -= count) {
238 fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
239 count = s.info.print_insn(pc, &s.info);
240#if 0
241 {
242 int i;
243 uint8_t b;
244 fprintf(out, " {");
245 for(i = 0; i < count; i++) {
246 target_read_memory(pc + i, &b, 1, &s.info);
247 fprintf(out, " %02x", b);
248 }
249 fprintf(out, " }");
250 }
251#endif
252 fprintf(out, "\n");
253 if (count < 0)
254 break;
255 if (size < count) {
256 fprintf(out,
257 "Disassembler disagrees with translator over instruction "
258 "decoding\n"
259 "Please report this to qemu-devel@nongnu.org\n");
260 break;
261 }
262 }
263}
264
265
266void disas(FILE *out, void *code, unsigned long size)
267{
268 uintptr_t pc;
269 int count;
270 CPUDebug s;
271 int (*print_insn)(bfd_vma pc, disassemble_info *info) = NULL;
272
273 INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
274 s.info.print_address_func = generic_print_host_address;
275
276 s.info.buffer = code;
277 s.info.buffer_vma = (uintptr_t)code;
278 s.info.buffer_length = size;
279
280#ifdef HOST_WORDS_BIGENDIAN
281 s.info.endian = BFD_ENDIAN_BIG;
282#else
283 s.info.endian = BFD_ENDIAN_LITTLE;
284#endif
285#if defined(CONFIG_TCG_INTERPRETER)
286 print_insn = print_insn_tci;
287#elif defined(__i386__)
288 s.info.mach = bfd_mach_i386_i386;
289 print_insn = print_insn_i386;
290#elif defined(__x86_64__)
291 s.info.mach = bfd_mach_x86_64;
292 print_insn = print_insn_i386;
293#elif defined(_ARCH_PPC)
294 s.info.disassembler_options = (char *)"any";
295 print_insn = print_insn_ppc;
296#elif defined(__aarch64__) && defined(CONFIG_ARM_A64_DIS)
297 print_insn = print_insn_arm_a64;
298#elif defined(__alpha__)
299 print_insn = print_insn_alpha;
300#elif defined(__sparc__)
301 print_insn = print_insn_sparc;
302 s.info.mach = bfd_mach_sparc_v9b;
303#elif defined(__arm__)
304 print_insn = print_insn_arm;
305#elif defined(__MIPSEB__)
306 print_insn = print_insn_big_mips;
307#elif defined(__MIPSEL__)
308 print_insn = print_insn_little_mips;
309#elif defined(__m68k__)
310 print_insn = print_insn_m68k;
311#elif defined(__s390__)
312 print_insn = print_insn_s390;
313#elif defined(__ia64__)
314 print_insn = print_insn_ia64;
315#endif
316 if (print_insn == NULL) {
317 print_insn = print_insn_od_host;
318 }
319 for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
320 fprintf(out, "0x%08" PRIxPTR ": ", pc);
321 count = print_insn(pc, &s.info);
322 fprintf(out, "\n");
323 if (count < 0)
324 break;
325 }
326}
327
328
329const char *lookup_symbol(target_ulong orig_addr)
330{
331 const char *symbol = "";
332 struct syminfo *s;
333
334 for (s = syminfos; s; s = s->next) {
335 symbol = s->lookup_symbol(s, orig_addr);
336 if (symbol[0] != '\0') {
337 break;
338 }
339 }
340
341 return symbol;
342}
343
344#if !defined(CONFIG_USER_ONLY)
345
346#include "monitor/monitor.h"
347
348static int monitor_disas_is_physical;
349
350static int
351monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
352 struct disassemble_info *info)
353{
354 CPUDebug *s = container_of(info, CPUDebug, info);
355
356 if (monitor_disas_is_physical) {
357 cpu_physical_memory_read(memaddr, myaddr, length);
358 } else {
359 cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
360 }
361 return 0;
362}
363
364
365
366void monitor_disas(Monitor *mon, CPUState *cpu,
367 target_ulong pc, int nb_insn, int is_physical, int flags)
368{
369 CPUClass *cc = CPU_GET_CLASS(cpu);
370 int count, i;
371 CPUDebug s;
372
373 INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf);
374
375 s.cpu = cpu;
376 monitor_disas_is_physical = is_physical;
377 s.info.read_memory_func = monitor_read_memory;
378 s.info.print_address_func = generic_print_address;
379
380 s.info.buffer_vma = pc;
381
382#ifdef TARGET_WORDS_BIGENDIAN
383 s.info.endian = BFD_ENDIAN_BIG;
384#else
385 s.info.endian = BFD_ENDIAN_LITTLE;
386#endif
387
388 if (cc->disas_set_info) {
389 cc->disas_set_info(cpu, &s.info);
390 }
391
392#if defined(TARGET_I386)
393 if (flags == 2) {
394 s.info.mach = bfd_mach_x86_64;
395 } else if (flags == 1) {
396 s.info.mach = bfd_mach_i386_i8086;
397 } else {
398 s.info.mach = bfd_mach_i386_i386;
399 }
400 s.info.print_insn = print_insn_i386;
401#elif defined(TARGET_PPC)
402 if (flags & 0xFFFF) {
403
404 s.info.mach = flags & 0xFFFF;
405 } else {
406#ifdef TARGET_PPC64
407 s.info.mach = bfd_mach_ppc64;
408#else
409 s.info.mach = bfd_mach_ppc;
410#endif
411 }
412 if ((flags >> 16) & 1) {
413 s.info.endian = BFD_ENDIAN_LITTLE;
414 }
415 s.info.print_insn = print_insn_ppc;
416#endif
417 if (!s.info.print_insn) {
418 monitor_printf(mon, "0x" TARGET_FMT_lx
419 ": Asm output not supported on this arch\n", pc);
420 return;
421 }
422
423 for(i = 0; i < nb_insn; i++) {
424 monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc);
425 count = s.info.print_insn(pc, &s.info);
426 monitor_printf(mon, "\n");
427 if (count < 0)
428 break;
429 pc += count;
430 }
431}
432#endif
433