qemu/memory.c
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   1/*
   2 * Physical memory management
   3 *
   4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
   5 *
   6 * Authors:
   7 *  Avi Kivity <avi@redhat.com>
   8 *
   9 * This work is licensed under the terms of the GNU GPL, version 2.  See
  10 * the COPYING file in the top-level directory.
  11 *
  12 * Contributions after 2012-01-13 are licensed under the terms of the
  13 * GNU GPL, version 2 or (at your option) any later version.
  14 */
  15
  16#include "qemu/osdep.h"
  17#include "qapi/error.h"
  18#include "qemu-common.h"
  19#include "cpu.h"
  20#include "exec/memory.h"
  21#include "exec/address-spaces.h"
  22#include "exec/ioport.h"
  23#include "qapi/visitor.h"
  24#include "qemu/bitops.h"
  25#include "qemu/error-report.h"
  26#include "qom/object.h"
  27#include "trace.h"
  28
  29#include "exec/memory-internal.h"
  30#include "exec/ram_addr.h"
  31#include "sysemu/kvm.h"
  32#include "sysemu/sysemu.h"
  33
  34//#define DEBUG_UNASSIGNED
  35
  36static unsigned memory_region_transaction_depth;
  37static bool memory_region_update_pending;
  38static bool ioeventfd_update_pending;
  39static bool global_dirty_log = false;
  40
  41static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
  42    = QTAILQ_HEAD_INITIALIZER(memory_listeners);
  43
  44static QTAILQ_HEAD(, AddressSpace) address_spaces
  45    = QTAILQ_HEAD_INITIALIZER(address_spaces);
  46
  47typedef struct AddrRange AddrRange;
  48
  49/*
  50 * Note that signed integers are needed for negative offsetting in aliases
  51 * (large MemoryRegion::alias_offset).
  52 */
  53struct AddrRange {
  54    Int128 start;
  55    Int128 size;
  56};
  57
  58static AddrRange addrrange_make(Int128 start, Int128 size)
  59{
  60    return (AddrRange) { start, size };
  61}
  62
  63static bool addrrange_equal(AddrRange r1, AddrRange r2)
  64{
  65    return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
  66}
  67
  68static Int128 addrrange_end(AddrRange r)
  69{
  70    return int128_add(r.start, r.size);
  71}
  72
  73static AddrRange addrrange_shift(AddrRange range, Int128 delta)
  74{
  75    int128_addto(&range.start, delta);
  76    return range;
  77}
  78
  79static bool addrrange_contains(AddrRange range, Int128 addr)
  80{
  81    return int128_ge(addr, range.start)
  82        && int128_lt(addr, addrrange_end(range));
  83}
  84
  85static bool addrrange_intersects(AddrRange r1, AddrRange r2)
  86{
  87    return addrrange_contains(r1, r2.start)
  88        || addrrange_contains(r2, r1.start);
  89}
  90
  91static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
  92{
  93    Int128 start = int128_max(r1.start, r2.start);
  94    Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
  95    return addrrange_make(start, int128_sub(end, start));
  96}
  97
  98enum ListenerDirection { Forward, Reverse };
  99
 100#define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...)    \
 101    do {                                                                \
 102        MemoryListener *_listener;                                      \
 103                                                                        \
 104        switch (_direction) {                                           \
 105        case Forward:                                                   \
 106            QTAILQ_FOREACH(_listener, &memory_listeners, link) {        \
 107                if (_listener->_callback) {                             \
 108                    _listener->_callback(_listener, ##_args);           \
 109                }                                                       \
 110            }                                                           \
 111            break;                                                      \
 112        case Reverse:                                                   \
 113            QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners,        \
 114                                   memory_listeners, link) {            \
 115                if (_listener->_callback) {                             \
 116                    _listener->_callback(_listener, ##_args);           \
 117                }                                                       \
 118            }                                                           \
 119            break;                                                      \
 120        default:                                                        \
 121            abort();                                                    \
 122        }                                                               \
 123    } while (0)
 124
 125#define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
 126    do {                                                                \
 127        MemoryListener *_listener;                                      \
 128        struct memory_listeners_as *list = &(_as)->listeners;           \
 129                                                                        \
 130        switch (_direction) {                                           \
 131        case Forward:                                                   \
 132            QTAILQ_FOREACH(_listener, list, link_as) {                  \
 133                if (_listener->_callback) {                             \
 134                    _listener->_callback(_listener, _section, ##_args); \
 135                }                                                       \
 136            }                                                           \
 137            break;                                                      \
 138        case Reverse:                                                   \
 139            QTAILQ_FOREACH_REVERSE(_listener, list, memory_listeners_as, \
 140                                   link_as) {                           \
 141                if (_listener->_callback) {                             \
 142                    _listener->_callback(_listener, _section, ##_args); \
 143                }                                                       \
 144            }                                                           \
 145            break;                                                      \
 146        default:                                                        \
 147            abort();                                                    \
 148        }                                                               \
 149    } while (0)
 150
 151/* No need to ref/unref .mr, the FlatRange keeps it alive.  */
 152#define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...)  \
 153    do {                                                                \
 154        MemoryRegionSection mrs = section_from_flat_range(fr, as);      \
 155        MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args);         \
 156    } while(0)
 157
 158struct CoalescedMemoryRange {
 159    AddrRange addr;
 160    QTAILQ_ENTRY(CoalescedMemoryRange) link;
 161};
 162
 163struct MemoryRegionIoeventfd {
 164    AddrRange addr;
 165    bool match_data;
 166    uint64_t data;
 167    EventNotifier *e;
 168};
 169
 170static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
 171                                           MemoryRegionIoeventfd b)
 172{
 173    if (int128_lt(a.addr.start, b.addr.start)) {
 174        return true;
 175    } else if (int128_gt(a.addr.start, b.addr.start)) {
 176        return false;
 177    } else if (int128_lt(a.addr.size, b.addr.size)) {
 178        return true;
 179    } else if (int128_gt(a.addr.size, b.addr.size)) {
 180        return false;
 181    } else if (a.match_data < b.match_data) {
 182        return true;
 183    } else  if (a.match_data > b.match_data) {
 184        return false;
 185    } else if (a.match_data) {
 186        if (a.data < b.data) {
 187            return true;
 188        } else if (a.data > b.data) {
 189            return false;
 190        }
 191    }
 192    if (a.e < b.e) {
 193        return true;
 194    } else if (a.e > b.e) {
 195        return false;
 196    }
 197    return false;
 198}
 199
 200static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
 201                                          MemoryRegionIoeventfd b)
 202{
 203    return !memory_region_ioeventfd_before(a, b)
 204        && !memory_region_ioeventfd_before(b, a);
 205}
 206
 207typedef struct FlatRange FlatRange;
 208typedef struct FlatView FlatView;
 209
 210/* Range of memory in the global map.  Addresses are absolute. */
 211struct FlatRange {
 212    MemoryRegion *mr;
 213    hwaddr offset_in_region;
 214    AddrRange addr;
 215    uint8_t dirty_log_mask;
 216    bool romd_mode;
 217    bool readonly;
 218};
 219
 220/* Flattened global view of current active memory hierarchy.  Kept in sorted
 221 * order.
 222 */
 223struct FlatView {
 224    struct rcu_head rcu;
 225    unsigned ref;
 226    FlatRange *ranges;
 227    unsigned nr;
 228    unsigned nr_allocated;
 229};
 230
 231typedef struct AddressSpaceOps AddressSpaceOps;
 232
 233#define FOR_EACH_FLAT_RANGE(var, view)          \
 234    for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
 235
 236static inline MemoryRegionSection
 237section_from_flat_range(FlatRange *fr, AddressSpace *as)
 238{
 239    return (MemoryRegionSection) {
 240        .mr = fr->mr,
 241        .address_space = as,
 242        .offset_within_region = fr->offset_in_region,
 243        .size = fr->addr.size,
 244        .offset_within_address_space = int128_get64(fr->addr.start),
 245        .readonly = fr->readonly,
 246    };
 247}
 248
 249static bool flatrange_equal(FlatRange *a, FlatRange *b)
 250{
 251    return a->mr == b->mr
 252        && addrrange_equal(a->addr, b->addr)
 253        && a->offset_in_region == b->offset_in_region
 254        && a->romd_mode == b->romd_mode
 255        && a->readonly == b->readonly;
 256}
 257
 258static void flatview_init(FlatView *view)
 259{
 260    view->ref = 1;
 261    view->ranges = NULL;
 262    view->nr = 0;
 263    view->nr_allocated = 0;
 264}
 265
 266/* Insert a range into a given position.  Caller is responsible for maintaining
 267 * sorting order.
 268 */
 269static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
 270{
 271    if (view->nr == view->nr_allocated) {
 272        view->nr_allocated = MAX(2 * view->nr, 10);
 273        view->ranges = g_realloc(view->ranges,
 274                                    view->nr_allocated * sizeof(*view->ranges));
 275    }
 276    memmove(view->ranges + pos + 1, view->ranges + pos,
 277            (view->nr - pos) * sizeof(FlatRange));
 278    view->ranges[pos] = *range;
 279    memory_region_ref(range->mr);
 280    ++view->nr;
 281}
 282
 283static void flatview_destroy(FlatView *view)
 284{
 285    int i;
 286
 287    for (i = 0; i < view->nr; i++) {
 288        memory_region_unref(view->ranges[i].mr);
 289    }
 290    g_free(view->ranges);
 291    g_free(view);
 292}
 293
 294static void flatview_ref(FlatView *view)
 295{
 296    atomic_inc(&view->ref);
 297}
 298
 299static void flatview_unref(FlatView *view)
 300{
 301    if (atomic_fetch_dec(&view->ref) == 1) {
 302        flatview_destroy(view);
 303    }
 304}
 305
 306static bool can_merge(FlatRange *r1, FlatRange *r2)
 307{
 308    return int128_eq(addrrange_end(r1->addr), r2->addr.start)
 309        && r1->mr == r2->mr
 310        && int128_eq(int128_add(int128_make64(r1->offset_in_region),
 311                                r1->addr.size),
 312                     int128_make64(r2->offset_in_region))
 313        && r1->dirty_log_mask == r2->dirty_log_mask
 314        && r1->romd_mode == r2->romd_mode
 315        && r1->readonly == r2->readonly;
 316}
 317
 318/* Attempt to simplify a view by merging adjacent ranges */
 319static void flatview_simplify(FlatView *view)
 320{
 321    unsigned i, j;
 322
 323    i = 0;
 324    while (i < view->nr) {
 325        j = i + 1;
 326        while (j < view->nr
 327               && can_merge(&view->ranges[j-1], &view->ranges[j])) {
 328            int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
 329            ++j;
 330        }
 331        ++i;
 332        memmove(&view->ranges[i], &view->ranges[j],
 333                (view->nr - j) * sizeof(view->ranges[j]));
 334        view->nr -= j - i;
 335    }
 336}
 337
 338static bool memory_region_big_endian(MemoryRegion *mr)
 339{
 340#ifdef TARGET_WORDS_BIGENDIAN
 341    return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
 342#else
 343    return mr->ops->endianness == DEVICE_BIG_ENDIAN;
 344#endif
 345}
 346
 347static bool memory_region_wrong_endianness(MemoryRegion *mr)
 348{
 349#ifdef TARGET_WORDS_BIGENDIAN
 350    return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
 351#else
 352    return mr->ops->endianness == DEVICE_BIG_ENDIAN;
 353#endif
 354}
 355
 356static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
 357{
 358    if (memory_region_wrong_endianness(mr)) {
 359        switch (size) {
 360        case 1:
 361            break;
 362        case 2:
 363            *data = bswap16(*data);
 364            break;
 365        case 4:
 366            *data = bswap32(*data);
 367            break;
 368        case 8:
 369            *data = bswap64(*data);
 370            break;
 371        default:
 372            abort();
 373        }
 374    }
 375}
 376
 377static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
 378{
 379    MemoryRegion *root;
 380    hwaddr abs_addr = offset;
 381
 382    abs_addr += mr->addr;
 383    for (root = mr; root->container; ) {
 384        root = root->container;
 385        abs_addr += root->addr;
 386    }
 387
 388    return abs_addr;
 389}
 390
 391static int get_cpu_index(void)
 392{
 393    if (current_cpu) {
 394        return current_cpu->cpu_index;
 395    }
 396    return -1;
 397}
 398
 399static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
 400                                                       hwaddr addr,
 401                                                       uint64_t *value,
 402                                                       unsigned size,
 403                                                       unsigned shift,
 404                                                       uint64_t mask,
 405                                                       MemTxAttrs attrs)
 406{
 407    uint64_t tmp;
 408
 409    tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
 410    if (mr->subpage) {
 411        trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
 412    } else if (mr == &io_mem_notdirty) {
 413        /* Accesses to code which has previously been translated into a TB show
 414         * up in the MMIO path, as accesses to the io_mem_notdirty
 415         * MemoryRegion. */
 416        trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
 417    } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
 418        hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
 419        trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
 420    }
 421    *value |= (tmp & mask) << shift;
 422    return MEMTX_OK;
 423}
 424
 425static MemTxResult  memory_region_read_accessor(MemoryRegion *mr,
 426                                                hwaddr addr,
 427                                                uint64_t *value,
 428                                                unsigned size,
 429                                                unsigned shift,
 430                                                uint64_t mask,
 431                                                MemTxAttrs attrs)
 432{
 433    uint64_t tmp;
 434
 435    tmp = mr->ops->read(mr->opaque, addr, size);
 436    if (mr->subpage) {
 437        trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
 438    } else if (mr == &io_mem_notdirty) {
 439        /* Accesses to code which has previously been translated into a TB show
 440         * up in the MMIO path, as accesses to the io_mem_notdirty
 441         * MemoryRegion. */
 442        trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
 443    } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
 444        hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
 445        trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
 446    }
 447    *value |= (tmp & mask) << shift;
 448    return MEMTX_OK;
 449}
 450
 451static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
 452                                                          hwaddr addr,
 453                                                          uint64_t *value,
 454                                                          unsigned size,
 455                                                          unsigned shift,
 456                                                          uint64_t mask,
 457                                                          MemTxAttrs attrs)
 458{
 459    uint64_t tmp = 0;
 460    MemTxResult r;
 461
 462    r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
 463    if (mr->subpage) {
 464        trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
 465    } else if (mr == &io_mem_notdirty) {
 466        /* Accesses to code which has previously been translated into a TB show
 467         * up in the MMIO path, as accesses to the io_mem_notdirty
 468         * MemoryRegion. */
 469        trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
 470    } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
 471        hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
 472        trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
 473    }
 474    *value |= (tmp & mask) << shift;
 475    return r;
 476}
 477
 478static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
 479                                                        hwaddr addr,
 480                                                        uint64_t *value,
 481                                                        unsigned size,
 482                                                        unsigned shift,
 483                                                        uint64_t mask,
 484                                                        MemTxAttrs attrs)
 485{
 486    uint64_t tmp;
 487
 488    tmp = (*value >> shift) & mask;
 489    if (mr->subpage) {
 490        trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
 491    } else if (mr == &io_mem_notdirty) {
 492        /* Accesses to code which has previously been translated into a TB show
 493         * up in the MMIO path, as accesses to the io_mem_notdirty
 494         * MemoryRegion. */
 495        trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
 496    } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
 497        hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
 498        trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
 499    }
 500    mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
 501    return MEMTX_OK;
 502}
 503
 504static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
 505                                                hwaddr addr,
 506                                                uint64_t *value,
 507                                                unsigned size,
 508                                                unsigned shift,
 509                                                uint64_t mask,
 510                                                MemTxAttrs attrs)
 511{
 512    uint64_t tmp;
 513
 514    tmp = (*value >> shift) & mask;
 515    if (mr->subpage) {
 516        trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
 517    } else if (mr == &io_mem_notdirty) {
 518        /* Accesses to code which has previously been translated into a TB show
 519         * up in the MMIO path, as accesses to the io_mem_notdirty
 520         * MemoryRegion. */
 521        trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
 522    } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
 523        hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
 524        trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
 525    }
 526    mr->ops->write(mr->opaque, addr, tmp, size);
 527    return MEMTX_OK;
 528}
 529
 530static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
 531                                                           hwaddr addr,
 532                                                           uint64_t *value,
 533                                                           unsigned size,
 534                                                           unsigned shift,
 535                                                           uint64_t mask,
 536                                                           MemTxAttrs attrs)
 537{
 538    uint64_t tmp;
 539
 540    tmp = (*value >> shift) & mask;
 541    if (mr->subpage) {
 542        trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
 543    } else if (mr == &io_mem_notdirty) {
 544        /* Accesses to code which has previously been translated into a TB show
 545         * up in the MMIO path, as accesses to the io_mem_notdirty
 546         * MemoryRegion. */
 547        trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
 548    } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
 549        hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
 550        trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
 551    }
 552    return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
 553}
 554
 555static MemTxResult access_with_adjusted_size(hwaddr addr,
 556                                      uint64_t *value,
 557                                      unsigned size,
 558                                      unsigned access_size_min,
 559                                      unsigned access_size_max,
 560                                      MemTxResult (*access)(MemoryRegion *mr,
 561                                                            hwaddr addr,
 562                                                            uint64_t *value,
 563                                                            unsigned size,
 564                                                            unsigned shift,
 565                                                            uint64_t mask,
 566                                                            MemTxAttrs attrs),
 567                                      MemoryRegion *mr,
 568                                      MemTxAttrs attrs)
 569{
 570    uint64_t access_mask;
 571    unsigned access_size;
 572    unsigned i;
 573    MemTxResult r = MEMTX_OK;
 574
 575    if (!access_size_min) {
 576        access_size_min = 1;
 577    }
 578    if (!access_size_max) {
 579        access_size_max = 4;
 580    }
 581
 582    /* FIXME: support unaligned access? */
 583    access_size = MAX(MIN(size, access_size_max), access_size_min);
 584    access_mask = -1ULL >> (64 - access_size * 8);
 585    if (memory_region_big_endian(mr)) {
 586        for (i = 0; i < size; i += access_size) {
 587            r |= access(mr, addr + i, value, access_size,
 588                        (size - access_size - i) * 8, access_mask, attrs);
 589        }
 590    } else {
 591        for (i = 0; i < size; i += access_size) {
 592            r |= access(mr, addr + i, value, access_size, i * 8,
 593                        access_mask, attrs);
 594        }
 595    }
 596    return r;
 597}
 598
 599static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
 600{
 601    AddressSpace *as;
 602
 603    while (mr->container) {
 604        mr = mr->container;
 605    }
 606    QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
 607        if (mr == as->root) {
 608            return as;
 609        }
 610    }
 611    return NULL;
 612}
 613
 614/* Render a memory region into the global view.  Ranges in @view obscure
 615 * ranges in @mr.
 616 */
 617static void render_memory_region(FlatView *view,
 618                                 MemoryRegion *mr,
 619                                 Int128 base,
 620                                 AddrRange clip,
 621                                 bool readonly)
 622{
 623    MemoryRegion *subregion;
 624    unsigned i;
 625    hwaddr offset_in_region;
 626    Int128 remain;
 627    Int128 now;
 628    FlatRange fr;
 629    AddrRange tmp;
 630
 631    if (!mr->enabled) {
 632        return;
 633    }
 634
 635    int128_addto(&base, int128_make64(mr->addr));
 636    readonly |= mr->readonly;
 637
 638    tmp = addrrange_make(base, mr->size);
 639
 640    if (!addrrange_intersects(tmp, clip)) {
 641        return;
 642    }
 643
 644    clip = addrrange_intersection(tmp, clip);
 645
 646    if (mr->alias) {
 647        int128_subfrom(&base, int128_make64(mr->alias->addr));
 648        int128_subfrom(&base, int128_make64(mr->alias_offset));
 649        render_memory_region(view, mr->alias, base, clip, readonly);
 650        return;
 651    }
 652
 653    /* Render subregions in priority order. */
 654    QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
 655        render_memory_region(view, subregion, base, clip, readonly);
 656    }
 657
 658    if (!mr->terminates) {
 659        return;
 660    }
 661
 662    offset_in_region = int128_get64(int128_sub(clip.start, base));
 663    base = clip.start;
 664    remain = clip.size;
 665
 666    fr.mr = mr;
 667    fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
 668    fr.romd_mode = mr->romd_mode;
 669    fr.readonly = readonly;
 670
 671    /* Render the region itself into any gaps left by the current view. */
 672    for (i = 0; i < view->nr && int128_nz(remain); ++i) {
 673        if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
 674            continue;
 675        }
 676        if (int128_lt(base, view->ranges[i].addr.start)) {
 677            now = int128_min(remain,
 678                             int128_sub(view->ranges[i].addr.start, base));
 679            fr.offset_in_region = offset_in_region;
 680            fr.addr = addrrange_make(base, now);
 681            flatview_insert(view, i, &fr);
 682            ++i;
 683            int128_addto(&base, now);
 684            offset_in_region += int128_get64(now);
 685            int128_subfrom(&remain, now);
 686        }
 687        now = int128_sub(int128_min(int128_add(base, remain),
 688                                    addrrange_end(view->ranges[i].addr)),
 689                         base);
 690        int128_addto(&base, now);
 691        offset_in_region += int128_get64(now);
 692        int128_subfrom(&remain, now);
 693    }
 694    if (int128_nz(remain)) {
 695        fr.offset_in_region = offset_in_region;
 696        fr.addr = addrrange_make(base, remain);
 697        flatview_insert(view, i, &fr);
 698    }
 699}
 700
 701/* Render a memory topology into a list of disjoint absolute ranges. */
 702static FlatView *generate_memory_topology(MemoryRegion *mr)
 703{
 704    FlatView *view;
 705
 706    view = g_new(FlatView, 1);
 707    flatview_init(view);
 708
 709    if (mr) {
 710        render_memory_region(view, mr, int128_zero(),
 711                             addrrange_make(int128_zero(), int128_2_64()), false);
 712    }
 713    flatview_simplify(view);
 714
 715    return view;
 716}
 717
 718static void address_space_add_del_ioeventfds(AddressSpace *as,
 719                                             MemoryRegionIoeventfd *fds_new,
 720                                             unsigned fds_new_nb,
 721                                             MemoryRegionIoeventfd *fds_old,
 722                                             unsigned fds_old_nb)
 723{
 724    unsigned iold, inew;
 725    MemoryRegionIoeventfd *fd;
 726    MemoryRegionSection section;
 727
 728    /* Generate a symmetric difference of the old and new fd sets, adding
 729     * and deleting as necessary.
 730     */
 731
 732    iold = inew = 0;
 733    while (iold < fds_old_nb || inew < fds_new_nb) {
 734        if (iold < fds_old_nb
 735            && (inew == fds_new_nb
 736                || memory_region_ioeventfd_before(fds_old[iold],
 737                                                  fds_new[inew]))) {
 738            fd = &fds_old[iold];
 739            section = (MemoryRegionSection) {
 740                .address_space = as,
 741                .offset_within_address_space = int128_get64(fd->addr.start),
 742                .size = fd->addr.size,
 743            };
 744            MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
 745                                 fd->match_data, fd->data, fd->e);
 746            ++iold;
 747        } else if (inew < fds_new_nb
 748                   && (iold == fds_old_nb
 749                       || memory_region_ioeventfd_before(fds_new[inew],
 750                                                         fds_old[iold]))) {
 751            fd = &fds_new[inew];
 752            section = (MemoryRegionSection) {
 753                .address_space = as,
 754                .offset_within_address_space = int128_get64(fd->addr.start),
 755                .size = fd->addr.size,
 756            };
 757            MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
 758                                 fd->match_data, fd->data, fd->e);
 759            ++inew;
 760        } else {
 761            ++iold;
 762            ++inew;
 763        }
 764    }
 765}
 766
 767static FlatView *address_space_get_flatview(AddressSpace *as)
 768{
 769    FlatView *view;
 770
 771    rcu_read_lock();
 772    view = atomic_rcu_read(&as->current_map);
 773    flatview_ref(view);
 774    rcu_read_unlock();
 775    return view;
 776}
 777
 778static void address_space_update_ioeventfds(AddressSpace *as)
 779{
 780    FlatView *view;
 781    FlatRange *fr;
 782    unsigned ioeventfd_nb = 0;
 783    MemoryRegionIoeventfd *ioeventfds = NULL;
 784    AddrRange tmp;
 785    unsigned i;
 786
 787    view = address_space_get_flatview(as);
 788    FOR_EACH_FLAT_RANGE(fr, view) {
 789        for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
 790            tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
 791                                  int128_sub(fr->addr.start,
 792                                             int128_make64(fr->offset_in_region)));
 793            if (addrrange_intersects(fr->addr, tmp)) {
 794                ++ioeventfd_nb;
 795                ioeventfds = g_realloc(ioeventfds,
 796                                          ioeventfd_nb * sizeof(*ioeventfds));
 797                ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
 798                ioeventfds[ioeventfd_nb-1].addr = tmp;
 799            }
 800        }
 801    }
 802
 803    address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
 804                                     as->ioeventfds, as->ioeventfd_nb);
 805
 806    g_free(as->ioeventfds);
 807    as->ioeventfds = ioeventfds;
 808    as->ioeventfd_nb = ioeventfd_nb;
 809    flatview_unref(view);
 810}
 811
 812static void address_space_update_topology_pass(AddressSpace *as,
 813                                               const FlatView *old_view,
 814                                               const FlatView *new_view,
 815                                               bool adding)
 816{
 817    unsigned iold, inew;
 818    FlatRange *frold, *frnew;
 819
 820    /* Generate a symmetric difference of the old and new memory maps.
 821     * Kill ranges in the old map, and instantiate ranges in the new map.
 822     */
 823    iold = inew = 0;
 824    while (iold < old_view->nr || inew < new_view->nr) {
 825        if (iold < old_view->nr) {
 826            frold = &old_view->ranges[iold];
 827        } else {
 828            frold = NULL;
 829        }
 830        if (inew < new_view->nr) {
 831            frnew = &new_view->ranges[inew];
 832        } else {
 833            frnew = NULL;
 834        }
 835
 836        if (frold
 837            && (!frnew
 838                || int128_lt(frold->addr.start, frnew->addr.start)
 839                || (int128_eq(frold->addr.start, frnew->addr.start)
 840                    && !flatrange_equal(frold, frnew)))) {
 841            /* In old but not in new, or in both but attributes changed. */
 842
 843            if (!adding) {
 844                MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
 845            }
 846
 847            ++iold;
 848        } else if (frold && frnew && flatrange_equal(frold, frnew)) {
 849            /* In both and unchanged (except logging may have changed) */
 850
 851            if (adding) {
 852                MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
 853                if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
 854                    MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
 855                                                  frold->dirty_log_mask,
 856                                                  frnew->dirty_log_mask);
 857                }
 858                if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
 859                    MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
 860                                                  frold->dirty_log_mask,
 861                                                  frnew->dirty_log_mask);
 862                }
 863            }
 864
 865            ++iold;
 866            ++inew;
 867        } else {
 868            /* In new */
 869
 870            if (adding) {
 871                MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
 872            }
 873
 874            ++inew;
 875        }
 876    }
 877}
 878
 879
 880static void address_space_update_topology(AddressSpace *as)
 881{
 882    FlatView *old_view = address_space_get_flatview(as);
 883    FlatView *new_view = generate_memory_topology(as->root);
 884
 885    address_space_update_topology_pass(as, old_view, new_view, false);
 886    address_space_update_topology_pass(as, old_view, new_view, true);
 887
 888    /* Writes are protected by the BQL.  */
 889    atomic_rcu_set(&as->current_map, new_view);
 890    call_rcu(old_view, flatview_unref, rcu);
 891
 892    /* Note that all the old MemoryRegions are still alive up to this
 893     * point.  This relieves most MemoryListeners from the need to
 894     * ref/unref the MemoryRegions they get---unless they use them
 895     * outside the iothread mutex, in which case precise reference
 896     * counting is necessary.
 897     */
 898    flatview_unref(old_view);
 899
 900    address_space_update_ioeventfds(as);
 901}
 902
 903void memory_region_transaction_begin(void)
 904{
 905    qemu_flush_coalesced_mmio_buffer();
 906    ++memory_region_transaction_depth;
 907}
 908
 909static void memory_region_clear_pending(void)
 910{
 911    memory_region_update_pending = false;
 912    ioeventfd_update_pending = false;
 913}
 914
 915void memory_region_transaction_commit(void)
 916{
 917    AddressSpace *as;
 918
 919    assert(memory_region_transaction_depth);
 920    --memory_region_transaction_depth;
 921    if (!memory_region_transaction_depth) {
 922        if (memory_region_update_pending) {
 923            MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
 924
 925            QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
 926                address_space_update_topology(as);
 927            }
 928
 929            MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
 930        } else if (ioeventfd_update_pending) {
 931            QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
 932                address_space_update_ioeventfds(as);
 933            }
 934        }
 935        memory_region_clear_pending();
 936   }
 937}
 938
 939static void memory_region_destructor_none(MemoryRegion *mr)
 940{
 941}
 942
 943static void memory_region_destructor_ram(MemoryRegion *mr)
 944{
 945    qemu_ram_free(mr->ram_block);
 946}
 947
 948static bool memory_region_need_escape(char c)
 949{
 950    return c == '/' || c == '[' || c == '\\' || c == ']';
 951}
 952
 953static char *memory_region_escape_name(const char *name)
 954{
 955    const char *p;
 956    char *escaped, *q;
 957    uint8_t c;
 958    size_t bytes = 0;
 959
 960    for (p = name; *p; p++) {
 961        bytes += memory_region_need_escape(*p) ? 4 : 1;
 962    }
 963    if (bytes == p - name) {
 964       return g_memdup(name, bytes + 1);
 965    }
 966
 967    escaped = g_malloc(bytes + 1);
 968    for (p = name, q = escaped; *p; p++) {
 969        c = *p;
 970        if (unlikely(memory_region_need_escape(c))) {
 971            *q++ = '\\';
 972            *q++ = 'x';
 973            *q++ = "0123456789abcdef"[c >> 4];
 974            c = "0123456789abcdef"[c & 15];
 975        }
 976        *q++ = c;
 977    }
 978    *q = 0;
 979    return escaped;
 980}
 981
 982void memory_region_init(MemoryRegion *mr,
 983                        Object *owner,
 984                        const char *name,
 985                        uint64_t size)
 986{
 987    object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
 988    mr->size = int128_make64(size);
 989    if (size == UINT64_MAX) {
 990        mr->size = int128_2_64();
 991    }
 992    mr->name = g_strdup(name);
 993    mr->owner = owner;
 994    mr->ram_block = NULL;
 995
 996    if (name) {
 997        char *escaped_name = memory_region_escape_name(name);
 998        char *name_array = g_strdup_printf("%s[*]", escaped_name);
 999
1000        if (!owner) {
1001            owner = container_get(qdev_get_machine(), "/unattached");
1002        }
1003
1004        object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
1005        object_unref(OBJECT(mr));
1006        g_free(name_array);
1007        g_free(escaped_name);
1008    }
1009}
1010
1011static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
1012                                   void *opaque, Error **errp)
1013{
1014    MemoryRegion *mr = MEMORY_REGION(obj);
1015    uint64_t value = mr->addr;
1016
1017    visit_type_uint64(v, name, &value, errp);
1018}
1019
1020static void memory_region_get_container(Object *obj, Visitor *v,
1021                                        const char *name, void *opaque,
1022                                        Error **errp)
1023{
1024    MemoryRegion *mr = MEMORY_REGION(obj);
1025    gchar *path = (gchar *)"";
1026
1027    if (mr->container) {
1028        path = object_get_canonical_path(OBJECT(mr->container));
1029    }
1030    visit_type_str(v, name, &path, errp);
1031    if (mr->container) {
1032        g_free(path);
1033    }
1034}
1035
1036static Object *memory_region_resolve_container(Object *obj, void *opaque,
1037                                               const char *part)
1038{
1039    MemoryRegion *mr = MEMORY_REGION(obj);
1040
1041    return OBJECT(mr->container);
1042}
1043
1044static void memory_region_get_priority(Object *obj, Visitor *v,
1045                                       const char *name, void *opaque,
1046                                       Error **errp)
1047{
1048    MemoryRegion *mr = MEMORY_REGION(obj);
1049    int32_t value = mr->priority;
1050
1051    visit_type_int32(v, name, &value, errp);
1052}
1053
1054static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1055                                   void *opaque, Error **errp)
1056{
1057    MemoryRegion *mr = MEMORY_REGION(obj);
1058    uint64_t value = memory_region_size(mr);
1059
1060    visit_type_uint64(v, name, &value, errp);
1061}
1062
1063static void memory_region_initfn(Object *obj)
1064{
1065    MemoryRegion *mr = MEMORY_REGION(obj);
1066    ObjectProperty *op;
1067
1068    mr->ops = &unassigned_mem_ops;
1069    mr->enabled = true;
1070    mr->romd_mode = true;
1071    mr->global_locking = true;
1072    mr->destructor = memory_region_destructor_none;
1073    QTAILQ_INIT(&mr->subregions);
1074    QTAILQ_INIT(&mr->coalesced);
1075
1076    op = object_property_add(OBJECT(mr), "container",
1077                             "link<" TYPE_MEMORY_REGION ">",
1078                             memory_region_get_container,
1079                             NULL, /* memory_region_set_container */
1080                             NULL, NULL, &error_abort);
1081    op->resolve = memory_region_resolve_container;
1082
1083    object_property_add(OBJECT(mr), "addr", "uint64",
1084                        memory_region_get_addr,
1085                        NULL, /* memory_region_set_addr */
1086                        NULL, NULL, &error_abort);
1087    object_property_add(OBJECT(mr), "priority", "uint32",
1088                        memory_region_get_priority,
1089                        NULL, /* memory_region_set_priority */
1090                        NULL, NULL, &error_abort);
1091    object_property_add(OBJECT(mr), "size", "uint64",
1092                        memory_region_get_size,
1093                        NULL, /* memory_region_set_size, */
1094                        NULL, NULL, &error_abort);
1095}
1096
1097static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1098                                    unsigned size)
1099{
1100#ifdef DEBUG_UNASSIGNED
1101    printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1102#endif
1103    if (current_cpu != NULL) {
1104        cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
1105    }
1106    return 0;
1107}
1108
1109static void unassigned_mem_write(void *opaque, hwaddr addr,
1110                                 uint64_t val, unsigned size)
1111{
1112#ifdef DEBUG_UNASSIGNED
1113    printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1114#endif
1115    if (current_cpu != NULL) {
1116        cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1117    }
1118}
1119
1120static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1121                                   unsigned size, bool is_write)
1122{
1123    return false;
1124}
1125
1126const MemoryRegionOps unassigned_mem_ops = {
1127    .valid.accepts = unassigned_mem_accepts,
1128    .endianness = DEVICE_NATIVE_ENDIAN,
1129};
1130
1131static uint64_t memory_region_ram_device_read(void *opaque,
1132                                              hwaddr addr, unsigned size)
1133{
1134    MemoryRegion *mr = opaque;
1135    uint64_t data = (uint64_t)~0;
1136
1137    switch (size) {
1138    case 1:
1139        data = *(uint8_t *)(mr->ram_block->host + addr);
1140        break;
1141    case 2:
1142        data = *(uint16_t *)(mr->ram_block->host + addr);
1143        break;
1144    case 4:
1145        data = *(uint32_t *)(mr->ram_block->host + addr);
1146        break;
1147    case 8:
1148        data = *(uint64_t *)(mr->ram_block->host + addr);
1149        break;
1150    }
1151
1152    trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1153
1154    return data;
1155}
1156
1157static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1158                                           uint64_t data, unsigned size)
1159{
1160    MemoryRegion *mr = opaque;
1161
1162    trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1163
1164    switch (size) {
1165    case 1:
1166        *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
1167        break;
1168    case 2:
1169        *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
1170        break;
1171    case 4:
1172        *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
1173        break;
1174    case 8:
1175        *(uint64_t *)(mr->ram_block->host + addr) = data;
1176        break;
1177    }
1178}
1179
1180static const MemoryRegionOps ram_device_mem_ops = {
1181    .read = memory_region_ram_device_read,
1182    .write = memory_region_ram_device_write,
1183    .endianness = DEVICE_NATIVE_ENDIAN,
1184    .valid = {
1185        .min_access_size = 1,
1186        .max_access_size = 8,
1187        .unaligned = true,
1188    },
1189    .impl = {
1190        .min_access_size = 1,
1191        .max_access_size = 8,
1192        .unaligned = true,
1193    },
1194};
1195
1196bool memory_region_access_valid(MemoryRegion *mr,
1197                                hwaddr addr,
1198                                unsigned size,
1199                                bool is_write)
1200{
1201    int access_size_min, access_size_max;
1202    int access_size, i;
1203
1204    if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1205        return false;
1206    }
1207
1208    if (!mr->ops->valid.accepts) {
1209        return true;
1210    }
1211
1212    access_size_min = mr->ops->valid.min_access_size;
1213    if (!mr->ops->valid.min_access_size) {
1214        access_size_min = 1;
1215    }
1216
1217    access_size_max = mr->ops->valid.max_access_size;
1218    if (!mr->ops->valid.max_access_size) {
1219        access_size_max = 4;
1220    }
1221
1222    access_size = MAX(MIN(size, access_size_max), access_size_min);
1223    for (i = 0; i < size; i += access_size) {
1224        if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1225                                    is_write)) {
1226            return false;
1227        }
1228    }
1229
1230    return true;
1231}
1232
1233static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1234                                                hwaddr addr,
1235                                                uint64_t *pval,
1236                                                unsigned size,
1237                                                MemTxAttrs attrs)
1238{
1239    *pval = 0;
1240
1241    if (mr->ops->read) {
1242        return access_with_adjusted_size(addr, pval, size,
1243                                         mr->ops->impl.min_access_size,
1244                                         mr->ops->impl.max_access_size,
1245                                         memory_region_read_accessor,
1246                                         mr, attrs);
1247    } else if (mr->ops->read_with_attrs) {
1248        return access_with_adjusted_size(addr, pval, size,
1249                                         mr->ops->impl.min_access_size,
1250                                         mr->ops->impl.max_access_size,
1251                                         memory_region_read_with_attrs_accessor,
1252                                         mr, attrs);
1253    } else {
1254        return access_with_adjusted_size(addr, pval, size, 1, 4,
1255                                         memory_region_oldmmio_read_accessor,
1256                                         mr, attrs);
1257    }
1258}
1259
1260MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1261                                        hwaddr addr,
1262                                        uint64_t *pval,
1263                                        unsigned size,
1264                                        MemTxAttrs attrs)
1265{
1266    MemTxResult r;
1267
1268    if (!memory_region_access_valid(mr, addr, size, false)) {
1269        *pval = unassigned_mem_read(mr, addr, size);
1270        return MEMTX_DECODE_ERROR;
1271    }
1272
1273    r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1274    adjust_endianness(mr, pval, size);
1275    return r;
1276}
1277
1278/* Return true if an eventfd was signalled */
1279static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1280                                                    hwaddr addr,
1281                                                    uint64_t data,
1282                                                    unsigned size,
1283                                                    MemTxAttrs attrs)
1284{
1285    MemoryRegionIoeventfd ioeventfd = {
1286        .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1287        .data = data,
1288    };
1289    unsigned i;
1290
1291    for (i = 0; i < mr->ioeventfd_nb; i++) {
1292        ioeventfd.match_data = mr->ioeventfds[i].match_data;
1293        ioeventfd.e = mr->ioeventfds[i].e;
1294
1295        if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) {
1296            event_notifier_set(ioeventfd.e);
1297            return true;
1298        }
1299    }
1300
1301    return false;
1302}
1303
1304MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1305                                         hwaddr addr,
1306                                         uint64_t data,
1307                                         unsigned size,
1308                                         MemTxAttrs attrs)
1309{
1310    if (!memory_region_access_valid(mr, addr, size, true)) {
1311        unassigned_mem_write(mr, addr, data, size);
1312        return MEMTX_DECODE_ERROR;
1313    }
1314
1315    adjust_endianness(mr, &data, size);
1316
1317    if ((!kvm_eventfds_enabled()) &&
1318        memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1319        return MEMTX_OK;
1320    }
1321
1322    if (mr->ops->write) {
1323        return access_with_adjusted_size(addr, &data, size,
1324                                         mr->ops->impl.min_access_size,
1325                                         mr->ops->impl.max_access_size,
1326                                         memory_region_write_accessor, mr,
1327                                         attrs);
1328    } else if (mr->ops->write_with_attrs) {
1329        return
1330            access_with_adjusted_size(addr, &data, size,
1331                                      mr->ops->impl.min_access_size,
1332                                      mr->ops->impl.max_access_size,
1333                                      memory_region_write_with_attrs_accessor,
1334                                      mr, attrs);
1335    } else {
1336        return access_with_adjusted_size(addr, &data, size, 1, 4,
1337                                         memory_region_oldmmio_write_accessor,
1338                                         mr, attrs);
1339    }
1340}
1341
1342void memory_region_init_io(MemoryRegion *mr,
1343                           Object *owner,
1344                           const MemoryRegionOps *ops,
1345                           void *opaque,
1346                           const char *name,
1347                           uint64_t size)
1348{
1349    memory_region_init(mr, owner, name, size);
1350    mr->ops = ops ? ops : &unassigned_mem_ops;
1351    mr->opaque = opaque;
1352    mr->terminates = true;
1353}
1354
1355void memory_region_init_ram(MemoryRegion *mr,
1356                            Object *owner,
1357                            const char *name,
1358                            uint64_t size,
1359                            Error **errp)
1360{
1361    memory_region_init(mr, owner, name, size);
1362    mr->ram = true;
1363    mr->terminates = true;
1364    mr->destructor = memory_region_destructor_ram;
1365    mr->ram_block = qemu_ram_alloc(size, mr, errp);
1366    mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1367}
1368
1369void memory_region_init_resizeable_ram(MemoryRegion *mr,
1370                                       Object *owner,
1371                                       const char *name,
1372                                       uint64_t size,
1373                                       uint64_t max_size,
1374                                       void (*resized)(const char*,
1375                                                       uint64_t length,
1376                                                       void *host),
1377                                       Error **errp)
1378{
1379    memory_region_init(mr, owner, name, size);
1380    mr->ram = true;
1381    mr->terminates = true;
1382    mr->destructor = memory_region_destructor_ram;
1383    mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1384                                              mr, errp);
1385    mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1386}
1387
1388#ifdef __linux__
1389void memory_region_init_ram_from_file(MemoryRegion *mr,
1390                                      struct Object *owner,
1391                                      const char *name,
1392                                      uint64_t size,
1393                                      bool share,
1394                                      const char *path,
1395                                      Error **errp)
1396{
1397    memory_region_init(mr, owner, name, size);
1398    mr->ram = true;
1399    mr->terminates = true;
1400    mr->destructor = memory_region_destructor_ram;
1401    mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1402    mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1403}
1404#endif
1405
1406void memory_region_init_ram_ptr(MemoryRegion *mr,
1407                                Object *owner,
1408                                const char *name,
1409                                uint64_t size,
1410                                void *ptr)
1411{
1412    memory_region_init(mr, owner, name, size);
1413    mr->ram = true;
1414    mr->terminates = true;
1415    mr->destructor = memory_region_destructor_ram;
1416    mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1417
1418    /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL.  */
1419    assert(ptr != NULL);
1420    mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1421}
1422
1423void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1424                                       Object *owner,
1425                                       const char *name,
1426                                       uint64_t size,
1427                                       void *ptr)
1428{
1429    memory_region_init_ram_ptr(mr, owner, name, size, ptr);
1430    mr->ram_device = true;
1431    mr->ops = &ram_device_mem_ops;
1432    mr->opaque = mr;
1433}
1434
1435void memory_region_init_alias(MemoryRegion *mr,
1436                              Object *owner,
1437                              const char *name,
1438                              MemoryRegion *orig,
1439                              hwaddr offset,
1440                              uint64_t size)
1441{
1442    memory_region_init(mr, owner, name, size);
1443    mr->alias = orig;
1444    mr->alias_offset = offset;
1445}
1446
1447void memory_region_init_rom(MemoryRegion *mr,
1448                            struct Object *owner,
1449                            const char *name,
1450                            uint64_t size,
1451                            Error **errp)
1452{
1453    memory_region_init(mr, owner, name, size);
1454    mr->ram = true;
1455    mr->readonly = true;
1456    mr->terminates = true;
1457    mr->destructor = memory_region_destructor_ram;
1458    mr->ram_block = qemu_ram_alloc(size, mr, errp);
1459    mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1460}
1461
1462void memory_region_init_rom_device(MemoryRegion *mr,
1463                                   Object *owner,
1464                                   const MemoryRegionOps *ops,
1465                                   void *opaque,
1466                                   const char *name,
1467                                   uint64_t size,
1468                                   Error **errp)
1469{
1470    assert(ops);
1471    memory_region_init(mr, owner, name, size);
1472    mr->ops = ops;
1473    mr->opaque = opaque;
1474    mr->terminates = true;
1475    mr->rom_device = true;
1476    mr->destructor = memory_region_destructor_ram;
1477    mr->ram_block = qemu_ram_alloc(size, mr, errp);
1478}
1479
1480void memory_region_init_iommu(MemoryRegion *mr,
1481                              Object *owner,
1482                              const MemoryRegionIOMMUOps *ops,
1483                              const char *name,
1484                              uint64_t size)
1485{
1486    memory_region_init(mr, owner, name, size);
1487    mr->iommu_ops = ops,
1488    mr->terminates = true;  /* then re-forwards */
1489    QLIST_INIT(&mr->iommu_notify);
1490    mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
1491}
1492
1493static void memory_region_finalize(Object *obj)
1494{
1495    MemoryRegion *mr = MEMORY_REGION(obj);
1496
1497    assert(!mr->container);
1498
1499    /* We know the region is not visible in any address space (it
1500     * does not have a container and cannot be a root either because
1501     * it has no references, so we can blindly clear mr->enabled.
1502     * memory_region_set_enabled instead could trigger a transaction
1503     * and cause an infinite loop.
1504     */
1505    mr->enabled = false;
1506    memory_region_transaction_begin();
1507    while (!QTAILQ_EMPTY(&mr->subregions)) {
1508        MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1509        memory_region_del_subregion(mr, subregion);
1510    }
1511    memory_region_transaction_commit();
1512
1513    mr->destructor(mr);
1514    memory_region_clear_coalescing(mr);
1515    g_free((char *)mr->name);
1516    g_free(mr->ioeventfds);
1517}
1518
1519Object *memory_region_owner(MemoryRegion *mr)
1520{
1521    Object *obj = OBJECT(mr);
1522    return obj->parent;
1523}
1524
1525void memory_region_ref(MemoryRegion *mr)
1526{
1527    /* MMIO callbacks most likely will access data that belongs
1528     * to the owner, hence the need to ref/unref the owner whenever
1529     * the memory region is in use.
1530     *
1531     * The memory region is a child of its owner.  As long as the
1532     * owner doesn't call unparent itself on the memory region,
1533     * ref-ing the owner will also keep the memory region alive.
1534     * Memory regions without an owner are supposed to never go away;
1535     * we do not ref/unref them because it slows down DMA sensibly.
1536     */
1537    if (mr && mr->owner) {
1538        object_ref(mr->owner);
1539    }
1540}
1541
1542void memory_region_unref(MemoryRegion *mr)
1543{
1544    if (mr && mr->owner) {
1545        object_unref(mr->owner);
1546    }
1547}
1548
1549uint64_t memory_region_size(MemoryRegion *mr)
1550{
1551    if (int128_eq(mr->size, int128_2_64())) {
1552        return UINT64_MAX;
1553    }
1554    return int128_get64(mr->size);
1555}
1556
1557const char *memory_region_name(const MemoryRegion *mr)
1558{
1559    if (!mr->name) {
1560        ((MemoryRegion *)mr)->name =
1561            object_get_canonical_path_component(OBJECT(mr));
1562    }
1563    return mr->name;
1564}
1565
1566bool memory_region_is_ram_device(MemoryRegion *mr)
1567{
1568    return mr->ram_device;
1569}
1570
1571uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1572{
1573    uint8_t mask = mr->dirty_log_mask;
1574    if (global_dirty_log && mr->ram_block) {
1575        mask |= (1 << DIRTY_MEMORY_MIGRATION);
1576    }
1577    return mask;
1578}
1579
1580bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1581{
1582    return memory_region_get_dirty_log_mask(mr) & (1 << client);
1583}
1584
1585static void memory_region_update_iommu_notify_flags(MemoryRegion *mr)
1586{
1587    IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1588    IOMMUNotifier *iommu_notifier;
1589
1590    QLIST_FOREACH(iommu_notifier, &mr->iommu_notify, node) {
1591        flags |= iommu_notifier->notifier_flags;
1592    }
1593
1594    if (flags != mr->iommu_notify_flags &&
1595        mr->iommu_ops->notify_flag_changed) {
1596        mr->iommu_ops->notify_flag_changed(mr, mr->iommu_notify_flags,
1597                                           flags);
1598    }
1599
1600    mr->iommu_notify_flags = flags;
1601}
1602
1603void memory_region_register_iommu_notifier(MemoryRegion *mr,
1604                                           IOMMUNotifier *n)
1605{
1606    /* We need to register for at least one bitfield */
1607    assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
1608    QLIST_INSERT_HEAD(&mr->iommu_notify, n, node);
1609    memory_region_update_iommu_notify_flags(mr);
1610}
1611
1612uint64_t memory_region_iommu_get_min_page_size(MemoryRegion *mr)
1613{
1614    assert(memory_region_is_iommu(mr));
1615    if (mr->iommu_ops && mr->iommu_ops->get_min_page_size) {
1616        return mr->iommu_ops->get_min_page_size(mr);
1617    }
1618    return TARGET_PAGE_SIZE;
1619}
1620
1621void memory_region_iommu_replay(MemoryRegion *mr, IOMMUNotifier *n,
1622                                bool is_write)
1623{
1624    hwaddr addr, granularity;
1625    IOMMUTLBEntry iotlb;
1626
1627    granularity = memory_region_iommu_get_min_page_size(mr);
1628
1629    for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1630        iotlb = mr->iommu_ops->translate(mr, addr, is_write);
1631        if (iotlb.perm != IOMMU_NONE) {
1632            n->notify(n, &iotlb);
1633        }
1634
1635        /* if (2^64 - MR size) < granularity, it's possible to get an
1636         * infinite loop here.  This should catch such a wraparound */
1637        if ((addr + granularity) < addr) {
1638            break;
1639        }
1640    }
1641}
1642
1643void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1644                                             IOMMUNotifier *n)
1645{
1646    QLIST_REMOVE(n, node);
1647    memory_region_update_iommu_notify_flags(mr);
1648}
1649
1650void memory_region_notify_iommu(MemoryRegion *mr,
1651                                IOMMUTLBEntry entry)
1652{
1653    IOMMUNotifier *iommu_notifier;
1654    IOMMUNotifierFlag request_flags;
1655
1656    assert(memory_region_is_iommu(mr));
1657
1658    if (entry.perm & IOMMU_RW) {
1659        request_flags = IOMMU_NOTIFIER_MAP;
1660    } else {
1661        request_flags = IOMMU_NOTIFIER_UNMAP;
1662    }
1663
1664    QLIST_FOREACH(iommu_notifier, &mr->iommu_notify, node) {
1665        if (iommu_notifier->notifier_flags & request_flags) {
1666            iommu_notifier->notify(iommu_notifier, &entry);
1667        }
1668    }
1669}
1670
1671void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1672{
1673    uint8_t mask = 1 << client;
1674    uint8_t old_logging;
1675
1676    assert(client == DIRTY_MEMORY_VGA);
1677    old_logging = mr->vga_logging_count;
1678    mr->vga_logging_count += log ? 1 : -1;
1679    if (!!old_logging == !!mr->vga_logging_count) {
1680        return;
1681    }
1682
1683    memory_region_transaction_begin();
1684    mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1685    memory_region_update_pending |= mr->enabled;
1686    memory_region_transaction_commit();
1687}
1688
1689bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1690                             hwaddr size, unsigned client)
1691{
1692    assert(mr->ram_block);
1693    return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr,
1694                                         size, client);
1695}
1696
1697void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1698                             hwaddr size)
1699{
1700    assert(mr->ram_block);
1701    cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
1702                                        size,
1703                                        memory_region_get_dirty_log_mask(mr));
1704}
1705
1706bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1707                                        hwaddr size, unsigned client)
1708{
1709    assert(mr->ram_block);
1710    return cpu_physical_memory_test_and_clear_dirty(
1711                memory_region_get_ram_addr(mr) + addr, size, client);
1712}
1713
1714
1715void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1716{
1717    MemoryListener *listener;
1718    AddressSpace *as;
1719    FlatView *view;
1720    FlatRange *fr;
1721
1722    /* If the same address space has multiple log_sync listeners, we
1723     * visit that address space's FlatView multiple times.  But because
1724     * log_sync listeners are rare, it's still cheaper than walking each
1725     * address space once.
1726     */
1727    QTAILQ_FOREACH(listener, &memory_listeners, link) {
1728        if (!listener->log_sync) {
1729            continue;
1730        }
1731        as = listener->address_space;
1732        view = address_space_get_flatview(as);
1733        FOR_EACH_FLAT_RANGE(fr, view) {
1734            if (fr->mr == mr) {
1735                MemoryRegionSection mrs = section_from_flat_range(fr, as);
1736                listener->log_sync(listener, &mrs);
1737            }
1738        }
1739        flatview_unref(view);
1740    }
1741}
1742
1743void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1744{
1745    if (mr->readonly != readonly) {
1746        memory_region_transaction_begin();
1747        mr->readonly = readonly;
1748        memory_region_update_pending |= mr->enabled;
1749        memory_region_transaction_commit();
1750    }
1751}
1752
1753void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1754{
1755    if (mr->romd_mode != romd_mode) {
1756        memory_region_transaction_begin();
1757        mr->romd_mode = romd_mode;
1758        memory_region_update_pending |= mr->enabled;
1759        memory_region_transaction_commit();
1760    }
1761}
1762
1763void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1764                               hwaddr size, unsigned client)
1765{
1766    assert(mr->ram_block);
1767    cpu_physical_memory_test_and_clear_dirty(
1768        memory_region_get_ram_addr(mr) + addr, size, client);
1769}
1770
1771int memory_region_get_fd(MemoryRegion *mr)
1772{
1773    int fd;
1774
1775    rcu_read_lock();
1776    while (mr->alias) {
1777        mr = mr->alias;
1778    }
1779    fd = mr->ram_block->fd;
1780    rcu_read_unlock();
1781
1782    return fd;
1783}
1784
1785void memory_region_set_fd(MemoryRegion *mr, int fd)
1786{
1787    rcu_read_lock();
1788    while (mr->alias) {
1789        mr = mr->alias;
1790    }
1791    mr->ram_block->fd = fd;
1792    rcu_read_unlock();
1793}
1794
1795void *memory_region_get_ram_ptr(MemoryRegion *mr)
1796{
1797    void *ptr;
1798    uint64_t offset = 0;
1799
1800    rcu_read_lock();
1801    while (mr->alias) {
1802        offset += mr->alias_offset;
1803        mr = mr->alias;
1804    }
1805    assert(mr->ram_block);
1806    ptr = qemu_map_ram_ptr(mr->ram_block, offset);
1807    rcu_read_unlock();
1808
1809    return ptr;
1810}
1811
1812MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
1813{
1814    RAMBlock *block;
1815
1816    block = qemu_ram_block_from_host(ptr, false, offset);
1817    if (!block) {
1818        return NULL;
1819    }
1820
1821    return block->mr;
1822}
1823
1824ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1825{
1826    return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
1827}
1828
1829void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
1830{
1831    assert(mr->ram_block);
1832
1833    qemu_ram_resize(mr->ram_block, newsize, errp);
1834}
1835
1836static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1837{
1838    FlatView *view;
1839    FlatRange *fr;
1840    CoalescedMemoryRange *cmr;
1841    AddrRange tmp;
1842    MemoryRegionSection section;
1843
1844    view = address_space_get_flatview(as);
1845    FOR_EACH_FLAT_RANGE(fr, view) {
1846        if (fr->mr == mr) {
1847            section = (MemoryRegionSection) {
1848                .address_space = as,
1849                .offset_within_address_space = int128_get64(fr->addr.start),
1850                .size = fr->addr.size,
1851            };
1852
1853            MEMORY_LISTENER_CALL(as, coalesced_mmio_del, Reverse, &section,
1854                                 int128_get64(fr->addr.start),
1855                                 int128_get64(fr->addr.size));
1856            QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1857                tmp = addrrange_shift(cmr->addr,
1858                                      int128_sub(fr->addr.start,
1859                                                 int128_make64(fr->offset_in_region)));
1860                if (!addrrange_intersects(tmp, fr->addr)) {
1861                    continue;
1862                }
1863                tmp = addrrange_intersection(tmp, fr->addr);
1864                MEMORY_LISTENER_CALL(as, coalesced_mmio_add, Forward, &section,
1865                                     int128_get64(tmp.start),
1866                                     int128_get64(tmp.size));
1867            }
1868        }
1869    }
1870    flatview_unref(view);
1871}
1872
1873static void memory_region_update_coalesced_range(MemoryRegion *mr)
1874{
1875    AddressSpace *as;
1876
1877    QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1878        memory_region_update_coalesced_range_as(mr, as);
1879    }
1880}
1881
1882void memory_region_set_coalescing(MemoryRegion *mr)
1883{
1884    memory_region_clear_coalescing(mr);
1885    memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1886}
1887
1888void memory_region_add_coalescing(MemoryRegion *mr,
1889                                  hwaddr offset,
1890                                  uint64_t size)
1891{
1892    CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1893
1894    cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1895    QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1896    memory_region_update_coalesced_range(mr);
1897    memory_region_set_flush_coalesced(mr);
1898}
1899
1900void memory_region_clear_coalescing(MemoryRegion *mr)
1901{
1902    CoalescedMemoryRange *cmr;
1903    bool updated = false;
1904
1905    qemu_flush_coalesced_mmio_buffer();
1906    mr->flush_coalesced_mmio = false;
1907
1908    while (!QTAILQ_EMPTY(&mr->coalesced)) {
1909        cmr = QTAILQ_FIRST(&mr->coalesced);
1910        QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1911        g_free(cmr);
1912        updated = true;
1913    }
1914
1915    if (updated) {
1916        memory_region_update_coalesced_range(mr);
1917    }
1918}
1919
1920void memory_region_set_flush_coalesced(MemoryRegion *mr)
1921{
1922    mr->flush_coalesced_mmio = true;
1923}
1924
1925void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1926{
1927    qemu_flush_coalesced_mmio_buffer();
1928    if (QTAILQ_EMPTY(&mr->coalesced)) {
1929        mr->flush_coalesced_mmio = false;
1930    }
1931}
1932
1933void memory_region_set_global_locking(MemoryRegion *mr)
1934{
1935    mr->global_locking = true;
1936}
1937
1938void memory_region_clear_global_locking(MemoryRegion *mr)
1939{
1940    mr->global_locking = false;
1941}
1942
1943static bool userspace_eventfd_warning;
1944
1945void memory_region_add_eventfd(MemoryRegion *mr,
1946                               hwaddr addr,
1947                               unsigned size,
1948                               bool match_data,
1949                               uint64_t data,
1950                               EventNotifier *e)
1951{
1952    MemoryRegionIoeventfd mrfd = {
1953        .addr.start = int128_make64(addr),
1954        .addr.size = int128_make64(size),
1955        .match_data = match_data,
1956        .data = data,
1957        .e = e,
1958    };
1959    unsigned i;
1960
1961    if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
1962                            userspace_eventfd_warning))) {
1963        userspace_eventfd_warning = true;
1964        error_report("Using eventfd without MMIO binding in KVM. "
1965                     "Suboptimal performance expected");
1966    }
1967
1968    if (size) {
1969        adjust_endianness(mr, &mrfd.data, size);
1970    }
1971    memory_region_transaction_begin();
1972    for (i = 0; i < mr->ioeventfd_nb; ++i) {
1973        if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1974            break;
1975        }
1976    }
1977    ++mr->ioeventfd_nb;
1978    mr->ioeventfds = g_realloc(mr->ioeventfds,
1979                                  sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1980    memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1981            sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1982    mr->ioeventfds[i] = mrfd;
1983    ioeventfd_update_pending |= mr->enabled;
1984    memory_region_transaction_commit();
1985}
1986
1987void memory_region_del_eventfd(MemoryRegion *mr,
1988                               hwaddr addr,
1989                               unsigned size,
1990                               bool match_data,
1991                               uint64_t data,
1992                               EventNotifier *e)
1993{
1994    MemoryRegionIoeventfd mrfd = {
1995        .addr.start = int128_make64(addr),
1996        .addr.size = int128_make64(size),
1997        .match_data = match_data,
1998        .data = data,
1999        .e = e,
2000    };
2001    unsigned i;
2002
2003    if (size) {
2004        adjust_endianness(mr, &mrfd.data, size);
2005    }
2006    memory_region_transaction_begin();
2007    for (i = 0; i < mr->ioeventfd_nb; ++i) {
2008        if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
2009            break;
2010        }
2011    }
2012    assert(i != mr->ioeventfd_nb);
2013    memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2014            sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2015    --mr->ioeventfd_nb;
2016    mr->ioeventfds = g_realloc(mr->ioeventfds,
2017                                  sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
2018    ioeventfd_update_pending |= mr->enabled;
2019    memory_region_transaction_commit();
2020}
2021
2022static void memory_region_update_container_subregions(MemoryRegion *subregion)
2023{
2024    MemoryRegion *mr = subregion->container;
2025    MemoryRegion *other;
2026
2027    memory_region_transaction_begin();
2028
2029    memory_region_ref(subregion);
2030    QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2031        if (subregion->priority >= other->priority) {
2032            QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2033            goto done;
2034        }
2035    }
2036    QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2037done:
2038    memory_region_update_pending |= mr->enabled && subregion->enabled;
2039    memory_region_transaction_commit();
2040}
2041
2042static void memory_region_add_subregion_common(MemoryRegion *mr,
2043                                               hwaddr offset,
2044                                               MemoryRegion *subregion)
2045{
2046    assert(!subregion->container);
2047    subregion->container = mr;
2048    subregion->addr = offset;
2049    memory_region_update_container_subregions(subregion);
2050}
2051
2052void memory_region_add_subregion(MemoryRegion *mr,
2053                                 hwaddr offset,
2054                                 MemoryRegion *subregion)
2055{
2056    subregion->priority = 0;
2057    memory_region_add_subregion_common(mr, offset, subregion);
2058}
2059
2060void memory_region_add_subregion_overlap(MemoryRegion *mr,
2061                                         hwaddr offset,
2062                                         MemoryRegion *subregion,
2063                                         int priority)
2064{
2065    subregion->priority = priority;
2066    memory_region_add_subregion_common(mr, offset, subregion);
2067}
2068
2069void memory_region_del_subregion(MemoryRegion *mr,
2070                                 MemoryRegion *subregion)
2071{
2072    memory_region_transaction_begin();
2073    assert(subregion->container == mr);
2074    subregion->container = NULL;
2075    QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2076    memory_region_unref(subregion);
2077    memory_region_update_pending |= mr->enabled && subregion->enabled;
2078    memory_region_transaction_commit();
2079}
2080
2081void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2082{
2083    if (enabled == mr->enabled) {
2084        return;
2085    }
2086    memory_region_transaction_begin();
2087    mr->enabled = enabled;
2088    memory_region_update_pending = true;
2089    memory_region_transaction_commit();
2090}
2091
2092void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2093{
2094    Int128 s = int128_make64(size);
2095
2096    if (size == UINT64_MAX) {
2097        s = int128_2_64();
2098    }
2099    if (int128_eq(s, mr->size)) {
2100        return;
2101    }
2102    memory_region_transaction_begin();
2103    mr->size = s;
2104    memory_region_update_pending = true;
2105    memory_region_transaction_commit();
2106}
2107
2108static void memory_region_readd_subregion(MemoryRegion *mr)
2109{
2110    MemoryRegion *container = mr->container;
2111
2112    if (container) {
2113        memory_region_transaction_begin();
2114        memory_region_ref(mr);
2115        memory_region_del_subregion(container, mr);
2116        mr->container = container;
2117        memory_region_update_container_subregions(mr);
2118        memory_region_unref(mr);
2119        memory_region_transaction_commit();
2120    }
2121}
2122
2123void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2124{
2125    if (addr != mr->addr) {
2126        mr->addr = addr;
2127        memory_region_readd_subregion(mr);
2128    }
2129}
2130
2131void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2132{
2133    assert(mr->alias);
2134
2135    if (offset == mr->alias_offset) {
2136        return;
2137    }
2138
2139    memory_region_transaction_begin();
2140    mr->alias_offset = offset;
2141    memory_region_update_pending |= mr->enabled;
2142    memory_region_transaction_commit();
2143}
2144
2145uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2146{
2147    return mr->align;
2148}
2149
2150static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2151{
2152    const AddrRange *addr = addr_;
2153    const FlatRange *fr = fr_;
2154
2155    if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2156        return -1;
2157    } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2158        return 1;
2159    }
2160    return 0;
2161}
2162
2163static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2164{
2165    return bsearch(&addr, view->ranges, view->nr,
2166                   sizeof(FlatRange), cmp_flatrange_addr);
2167}
2168
2169bool memory_region_is_mapped(MemoryRegion *mr)
2170{
2171    return mr->container ? true : false;
2172}
2173
2174/* Same as memory_region_find, but it does not add a reference to the
2175 * returned region.  It must be called from an RCU critical section.
2176 */
2177static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2178                                                  hwaddr addr, uint64_t size)
2179{
2180    MemoryRegionSection ret = { .mr = NULL };
2181    MemoryRegion *root;
2182    AddressSpace *as;
2183    AddrRange range;
2184    FlatView *view;
2185    FlatRange *fr;
2186
2187    addr += mr->addr;
2188    for (root = mr; root->container; ) {
2189        root = root->container;
2190        addr += root->addr;
2191    }
2192
2193    as = memory_region_to_address_space(root);
2194    if (!as) {
2195        return ret;
2196    }
2197    range = addrrange_make(int128_make64(addr), int128_make64(size));
2198
2199    view = atomic_rcu_read(&as->current_map);
2200    fr = flatview_lookup(view, range);
2201    if (!fr) {
2202        return ret;
2203    }
2204
2205    while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2206        --fr;
2207    }
2208
2209    ret.mr = fr->mr;
2210    ret.address_space = as;
2211    range = addrrange_intersection(range, fr->addr);
2212    ret.offset_within_region = fr->offset_in_region;
2213    ret.offset_within_region += int128_get64(int128_sub(range.start,
2214                                                        fr->addr.start));
2215    ret.size = range.size;
2216    ret.offset_within_address_space = int128_get64(range.start);
2217    ret.readonly = fr->readonly;
2218    return ret;
2219}
2220
2221MemoryRegionSection memory_region_find(MemoryRegion *mr,
2222                                       hwaddr addr, uint64_t size)
2223{
2224    MemoryRegionSection ret;
2225    rcu_read_lock();
2226    ret = memory_region_find_rcu(mr, addr, size);
2227    if (ret.mr) {
2228        memory_region_ref(ret.mr);
2229    }
2230    rcu_read_unlock();
2231    return ret;
2232}
2233
2234bool memory_region_present(MemoryRegion *container, hwaddr addr)
2235{
2236    MemoryRegion *mr;
2237
2238    rcu_read_lock();
2239    mr = memory_region_find_rcu(container, addr, 1).mr;
2240    rcu_read_unlock();
2241    return mr && mr != container;
2242}
2243
2244void memory_global_dirty_log_sync(void)
2245{
2246    MemoryListener *listener;
2247    AddressSpace *as;
2248    FlatView *view;
2249    FlatRange *fr;
2250
2251    QTAILQ_FOREACH(listener, &memory_listeners, link) {
2252        if (!listener->log_sync) {
2253            continue;
2254        }
2255        as = listener->address_space;
2256        view = address_space_get_flatview(as);
2257        FOR_EACH_FLAT_RANGE(fr, view) {
2258            if (fr->dirty_log_mask) {
2259                MemoryRegionSection mrs = section_from_flat_range(fr, as);
2260                listener->log_sync(listener, &mrs);
2261            }
2262        }
2263        flatview_unref(view);
2264    }
2265}
2266
2267void memory_global_dirty_log_start(void)
2268{
2269    global_dirty_log = true;
2270
2271    MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2272
2273    /* Refresh DIRTY_LOG_MIGRATION bit.  */
2274    memory_region_transaction_begin();
2275    memory_region_update_pending = true;
2276    memory_region_transaction_commit();
2277}
2278
2279void memory_global_dirty_log_stop(void)
2280{
2281    global_dirty_log = false;
2282
2283    /* Refresh DIRTY_LOG_MIGRATION bit.  */
2284    memory_region_transaction_begin();
2285    memory_region_update_pending = true;
2286    memory_region_transaction_commit();
2287
2288    MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2289}
2290
2291static void listener_add_address_space(MemoryListener *listener,
2292                                       AddressSpace *as)
2293{
2294    FlatView *view;
2295    FlatRange *fr;
2296
2297    if (listener->begin) {
2298        listener->begin(listener);
2299    }
2300    if (global_dirty_log) {
2301        if (listener->log_global_start) {
2302            listener->log_global_start(listener);
2303        }
2304    }
2305
2306    view = address_space_get_flatview(as);
2307    FOR_EACH_FLAT_RANGE(fr, view) {
2308        MemoryRegionSection section = {
2309            .mr = fr->mr,
2310            .address_space = as,
2311            .offset_within_region = fr->offset_in_region,
2312            .size = fr->addr.size,
2313            .offset_within_address_space = int128_get64(fr->addr.start),
2314            .readonly = fr->readonly,
2315        };
2316        if (fr->dirty_log_mask && listener->log_start) {
2317            listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2318        }
2319        if (listener->region_add) {
2320            listener->region_add(listener, &section);
2321        }
2322    }
2323    if (listener->commit) {
2324        listener->commit(listener);
2325    }
2326    flatview_unref(view);
2327}
2328
2329void memory_listener_register(MemoryListener *listener, AddressSpace *as)
2330{
2331    MemoryListener *other = NULL;
2332
2333    listener->address_space = as;
2334    if (QTAILQ_EMPTY(&memory_listeners)
2335        || listener->priority >= QTAILQ_LAST(&memory_listeners,
2336                                             memory_listeners)->priority) {
2337        QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2338    } else {
2339        QTAILQ_FOREACH(other, &memory_listeners, link) {
2340            if (listener->priority < other->priority) {
2341                break;
2342            }
2343        }
2344        QTAILQ_INSERT_BEFORE(other, listener, link);
2345    }
2346
2347    if (QTAILQ_EMPTY(&as->listeners)
2348        || listener->priority >= QTAILQ_LAST(&as->listeners,
2349                                             memory_listeners)->priority) {
2350        QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
2351    } else {
2352        QTAILQ_FOREACH(other, &as->listeners, link_as) {
2353            if (listener->priority < other->priority) {
2354                break;
2355            }
2356        }
2357        QTAILQ_INSERT_BEFORE(other, listener, link_as);
2358    }
2359
2360    listener_add_address_space(listener, as);
2361}
2362
2363void memory_listener_unregister(MemoryListener *listener)
2364{
2365    QTAILQ_REMOVE(&memory_listeners, listener, link);
2366    QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
2367}
2368
2369void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2370{
2371    memory_region_ref(root);
2372    memory_region_transaction_begin();
2373    as->ref_count = 1;
2374    as->root = root;
2375    as->malloced = false;
2376    as->current_map = g_new(FlatView, 1);
2377    flatview_init(as->current_map);
2378    as->ioeventfd_nb = 0;
2379    as->ioeventfds = NULL;
2380    QTAILQ_INIT(&as->listeners);
2381    QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2382    as->name = g_strdup(name ? name : "anonymous");
2383    address_space_init_dispatch(as);
2384    memory_region_update_pending |= root->enabled;
2385    memory_region_transaction_commit();
2386}
2387
2388static void do_address_space_destroy(AddressSpace *as)
2389{
2390    bool do_free = as->malloced;
2391
2392    address_space_destroy_dispatch(as);
2393    assert(QTAILQ_EMPTY(&as->listeners));
2394
2395    flatview_unref(as->current_map);
2396    g_free(as->name);
2397    g_free(as->ioeventfds);
2398    memory_region_unref(as->root);
2399    if (do_free) {
2400        g_free(as);
2401    }
2402}
2403
2404AddressSpace *address_space_init_shareable(MemoryRegion *root, const char *name)
2405{
2406    AddressSpace *as;
2407
2408    QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2409        if (root == as->root && as->malloced) {
2410            as->ref_count++;
2411            return as;
2412        }
2413    }
2414
2415    as = g_malloc0(sizeof *as);
2416    address_space_init(as, root, name);
2417    as->malloced = true;
2418    return as;
2419}
2420
2421void address_space_destroy(AddressSpace *as)
2422{
2423    MemoryRegion *root = as->root;
2424
2425    as->ref_count--;
2426    if (as->ref_count) {
2427        return;
2428    }
2429    /* Flush out anything from MemoryListeners listening in on this */
2430    memory_region_transaction_begin();
2431    as->root = NULL;
2432    memory_region_transaction_commit();
2433    QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2434    address_space_unregister(as);
2435
2436    /* At this point, as->dispatch and as->current_map are dummy
2437     * entries that the guest should never use.  Wait for the old
2438     * values to expire before freeing the data.
2439     */
2440    as->root = root;
2441    call_rcu(as, do_address_space_destroy, rcu);
2442}
2443
2444typedef struct MemoryRegionList MemoryRegionList;
2445
2446struct MemoryRegionList {
2447    const MemoryRegion *mr;
2448    QTAILQ_ENTRY(MemoryRegionList) queue;
2449};
2450
2451typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
2452
2453static void mtree_print_mr(fprintf_function mon_printf, void *f,
2454                           const MemoryRegion *mr, unsigned int level,
2455                           hwaddr base,
2456                           MemoryRegionListHead *alias_print_queue)
2457{
2458    MemoryRegionList *new_ml, *ml, *next_ml;
2459    MemoryRegionListHead submr_print_queue;
2460    const MemoryRegion *submr;
2461    unsigned int i;
2462
2463    if (!mr) {
2464        return;
2465    }
2466
2467    for (i = 0; i < level; i++) {
2468        mon_printf(f, "  ");
2469    }
2470
2471    if (mr->alias) {
2472        MemoryRegionList *ml;
2473        bool found = false;
2474
2475        /* check if the alias is already in the queue */
2476        QTAILQ_FOREACH(ml, alias_print_queue, queue) {
2477            if (ml->mr == mr->alias) {
2478                found = true;
2479            }
2480        }
2481
2482        if (!found) {
2483            ml = g_new(MemoryRegionList, 1);
2484            ml->mr = mr->alias;
2485            QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
2486        }
2487        mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2488                   " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
2489                   "-" TARGET_FMT_plx "%s\n",
2490                   base + mr->addr,
2491                   base + mr->addr
2492                   + (int128_nz(mr->size) ?
2493                      (hwaddr)int128_get64(int128_sub(mr->size,
2494                                                      int128_one())) : 0),
2495                   mr->priority,
2496                   mr->romd_mode ? 'R' : '-',
2497                   !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2498                                                                       : '-',
2499                   memory_region_name(mr),
2500                   memory_region_name(mr->alias),
2501                   mr->alias_offset,
2502                   mr->alias_offset
2503                   + (int128_nz(mr->size) ?
2504                      (hwaddr)int128_get64(int128_sub(mr->size,
2505                                                      int128_one())) : 0),
2506                   mr->enabled ? "" : " [disabled]");
2507    } else {
2508        mon_printf(f,
2509                   TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s%s\n",
2510                   base + mr->addr,
2511                   base + mr->addr
2512                   + (int128_nz(mr->size) ?
2513                      (hwaddr)int128_get64(int128_sub(mr->size,
2514                                                      int128_one())) : 0),
2515                   mr->priority,
2516                   mr->romd_mode ? 'R' : '-',
2517                   !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2518                                                                       : '-',
2519                   memory_region_name(mr),
2520                   mr->enabled ? "" : " [disabled]");
2521    }
2522
2523    QTAILQ_INIT(&submr_print_queue);
2524
2525    QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2526        new_ml = g_new(MemoryRegionList, 1);
2527        new_ml->mr = submr;
2528        QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2529            if (new_ml->mr->addr < ml->mr->addr ||
2530                (new_ml->mr->addr == ml->mr->addr &&
2531                 new_ml->mr->priority > ml->mr->priority)) {
2532                QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2533                new_ml = NULL;
2534                break;
2535            }
2536        }
2537        if (new_ml) {
2538            QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2539        }
2540    }
2541
2542    QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2543        mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2544                       alias_print_queue);
2545    }
2546
2547    QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
2548        g_free(ml);
2549    }
2550}
2551
2552void mtree_info(fprintf_function mon_printf, void *f)
2553{
2554    MemoryRegionListHead ml_head;
2555    MemoryRegionList *ml, *ml2;
2556    AddressSpace *as;
2557
2558    QTAILQ_INIT(&ml_head);
2559
2560    QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2561        mon_printf(f, "address-space: %s\n", as->name);
2562        mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
2563        mon_printf(f, "\n");
2564    }
2565
2566    /* print aliased regions */
2567    QTAILQ_FOREACH(ml, &ml_head, queue) {
2568        mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
2569        mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
2570        mon_printf(f, "\n");
2571    }
2572
2573    QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
2574        g_free(ml);
2575    }
2576}
2577
2578static const TypeInfo memory_region_info = {
2579    .parent             = TYPE_OBJECT,
2580    .name               = TYPE_MEMORY_REGION,
2581    .instance_size      = sizeof(MemoryRegion),
2582    .instance_init      = memory_region_initfn,
2583    .instance_finalize  = memory_region_finalize,
2584};
2585
2586static void memory_register_types(void)
2587{
2588    type_register_static(&memory_region_info);
2589}
2590
2591type_init(memory_register_types)
2592