qemu/memory.c
<<
>>
Prefs
   1/*
   2 * Physical memory management
   3 *
   4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
   5 *
   6 * Authors:
   7 *  Avi Kivity <avi@redhat.com>
   8 *
   9 * This work is licensed under the terms of the GNU GPL, version 2.  See
  10 * the COPYING file in the top-level directory.
  11 *
  12 * Contributions after 2012-01-13 are licensed under the terms of the
  13 * GNU GPL, version 2 or (at your option) any later version.
  14 */
  15
  16#include "qemu/osdep.h"
  17#include "qapi/error.h"
  18#include "qemu-common.h"
  19#include "cpu.h"
  20#include "exec/memory.h"
  21#include "exec/address-spaces.h"
  22#include "exec/ioport.h"
  23#include "qapi/visitor.h"
  24#include "qemu/bitops.h"
  25#include "qemu/error-report.h"
  26#include "qom/object.h"
  27#include "trace-root.h"
  28
  29#include "exec/memory-internal.h"
  30#include "exec/ram_addr.h"
  31#include "sysemu/kvm.h"
  32#include "sysemu/sysemu.h"
  33
  34//#define DEBUG_UNASSIGNED
  35
  36static unsigned memory_region_transaction_depth;
  37static bool memory_region_update_pending;
  38static bool ioeventfd_update_pending;
  39static bool global_dirty_log = false;
  40
  41static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
  42    = QTAILQ_HEAD_INITIALIZER(memory_listeners);
  43
  44static QTAILQ_HEAD(, AddressSpace) address_spaces
  45    = QTAILQ_HEAD_INITIALIZER(address_spaces);
  46
  47typedef struct AddrRange AddrRange;
  48
  49/*
  50 * Note that signed integers are needed for negative offsetting in aliases
  51 * (large MemoryRegion::alias_offset).
  52 */
  53struct AddrRange {
  54    Int128 start;
  55    Int128 size;
  56};
  57
  58static AddrRange addrrange_make(Int128 start, Int128 size)
  59{
  60    return (AddrRange) { start, size };
  61}
  62
  63static bool addrrange_equal(AddrRange r1, AddrRange r2)
  64{
  65    return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
  66}
  67
  68static Int128 addrrange_end(AddrRange r)
  69{
  70    return int128_add(r.start, r.size);
  71}
  72
  73static AddrRange addrrange_shift(AddrRange range, Int128 delta)
  74{
  75    int128_addto(&range.start, delta);
  76    return range;
  77}
  78
  79static bool addrrange_contains(AddrRange range, Int128 addr)
  80{
  81    return int128_ge(addr, range.start)
  82        && int128_lt(addr, addrrange_end(range));
  83}
  84
  85static bool addrrange_intersects(AddrRange r1, AddrRange r2)
  86{
  87    return addrrange_contains(r1, r2.start)
  88        || addrrange_contains(r2, r1.start);
  89}
  90
  91static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
  92{
  93    Int128 start = int128_max(r1.start, r2.start);
  94    Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
  95    return addrrange_make(start, int128_sub(end, start));
  96}
  97
  98enum ListenerDirection { Forward, Reverse };
  99
 100#define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...)    \
 101    do {                                                                \
 102        MemoryListener *_listener;                                      \
 103                                                                        \
 104        switch (_direction) {                                           \
 105        case Forward:                                                   \
 106            QTAILQ_FOREACH(_listener, &memory_listeners, link) {        \
 107                if (_listener->_callback) {                             \
 108                    _listener->_callback(_listener, ##_args);           \
 109                }                                                       \
 110            }                                                           \
 111            break;                                                      \
 112        case Reverse:                                                   \
 113            QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners,        \
 114                                   memory_listeners, link) {            \
 115                if (_listener->_callback) {                             \
 116                    _listener->_callback(_listener, ##_args);           \
 117                }                                                       \
 118            }                                                           \
 119            break;                                                      \
 120        default:                                                        \
 121            abort();                                                    \
 122        }                                                               \
 123    } while (0)
 124
 125#define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
 126    do {                                                                \
 127        MemoryListener *_listener;                                      \
 128        struct memory_listeners_as *list = &(_as)->listeners;           \
 129                                                                        \
 130        switch (_direction) {                                           \
 131        case Forward:                                                   \
 132            QTAILQ_FOREACH(_listener, list, link_as) {                  \
 133                if (_listener->_callback) {                             \
 134                    _listener->_callback(_listener, _section, ##_args); \
 135                }                                                       \
 136            }                                                           \
 137            break;                                                      \
 138        case Reverse:                                                   \
 139            QTAILQ_FOREACH_REVERSE(_listener, list, memory_listeners_as, \
 140                                   link_as) {                           \
 141                if (_listener->_callback) {                             \
 142                    _listener->_callback(_listener, _section, ##_args); \
 143                }                                                       \
 144            }                                                           \
 145            break;                                                      \
 146        default:                                                        \
 147            abort();                                                    \
 148        }                                                               \
 149    } while (0)
 150
 151/* No need to ref/unref .mr, the FlatRange keeps it alive.  */
 152#define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...)  \
 153    do {                                                                \
 154        MemoryRegionSection mrs = section_from_flat_range(fr, as);      \
 155        MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args);         \
 156    } while(0)
 157
 158struct CoalescedMemoryRange {
 159    AddrRange addr;
 160    QTAILQ_ENTRY(CoalescedMemoryRange) link;
 161};
 162
 163struct MemoryRegionIoeventfd {
 164    AddrRange addr;
 165    bool match_data;
 166    uint64_t data;
 167    EventNotifier *e;
 168};
 169
 170static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
 171                                           MemoryRegionIoeventfd b)
 172{
 173    if (int128_lt(a.addr.start, b.addr.start)) {
 174        return true;
 175    } else if (int128_gt(a.addr.start, b.addr.start)) {
 176        return false;
 177    } else if (int128_lt(a.addr.size, b.addr.size)) {
 178        return true;
 179    } else if (int128_gt(a.addr.size, b.addr.size)) {
 180        return false;
 181    } else if (a.match_data < b.match_data) {
 182        return true;
 183    } else  if (a.match_data > b.match_data) {
 184        return false;
 185    } else if (a.match_data) {
 186        if (a.data < b.data) {
 187            return true;
 188        } else if (a.data > b.data) {
 189            return false;
 190        }
 191    }
 192    if (a.e < b.e) {
 193        return true;
 194    } else if (a.e > b.e) {
 195        return false;
 196    }
 197    return false;
 198}
 199
 200static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
 201                                          MemoryRegionIoeventfd b)
 202{
 203    return !memory_region_ioeventfd_before(a, b)
 204        && !memory_region_ioeventfd_before(b, a);
 205}
 206
 207typedef struct FlatRange FlatRange;
 208typedef struct FlatView FlatView;
 209
 210/* Range of memory in the global map.  Addresses are absolute. */
 211struct FlatRange {
 212    MemoryRegion *mr;
 213    hwaddr offset_in_region;
 214    AddrRange addr;
 215    uint8_t dirty_log_mask;
 216    bool romd_mode;
 217    bool readonly;
 218};
 219
 220/* Flattened global view of current active memory hierarchy.  Kept in sorted
 221 * order.
 222 */
 223struct FlatView {
 224    struct rcu_head rcu;
 225    unsigned ref;
 226    FlatRange *ranges;
 227    unsigned nr;
 228    unsigned nr_allocated;
 229};
 230
 231typedef struct AddressSpaceOps AddressSpaceOps;
 232
 233#define FOR_EACH_FLAT_RANGE(var, view)          \
 234    for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
 235
 236static inline MemoryRegionSection
 237section_from_flat_range(FlatRange *fr, AddressSpace *as)
 238{
 239    return (MemoryRegionSection) {
 240        .mr = fr->mr,
 241        .address_space = as,
 242        .offset_within_region = fr->offset_in_region,
 243        .size = fr->addr.size,
 244        .offset_within_address_space = int128_get64(fr->addr.start),
 245        .readonly = fr->readonly,
 246    };
 247}
 248
 249static bool flatrange_equal(FlatRange *a, FlatRange *b)
 250{
 251    return a->mr == b->mr
 252        && addrrange_equal(a->addr, b->addr)
 253        && a->offset_in_region == b->offset_in_region
 254        && a->romd_mode == b->romd_mode
 255        && a->readonly == b->readonly;
 256}
 257
 258static void flatview_init(FlatView *view)
 259{
 260    view->ref = 1;
 261    view->ranges = NULL;
 262    view->nr = 0;
 263    view->nr_allocated = 0;
 264}
 265
 266/* Insert a range into a given position.  Caller is responsible for maintaining
 267 * sorting order.
 268 */
 269static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
 270{
 271    if (view->nr == view->nr_allocated) {
 272        view->nr_allocated = MAX(2 * view->nr, 10);
 273        view->ranges = g_realloc(view->ranges,
 274                                    view->nr_allocated * sizeof(*view->ranges));
 275    }
 276    memmove(view->ranges + pos + 1, view->ranges + pos,
 277            (view->nr - pos) * sizeof(FlatRange));
 278    view->ranges[pos] = *range;
 279    memory_region_ref(range->mr);
 280    ++view->nr;
 281}
 282
 283static void flatview_destroy(FlatView *view)
 284{
 285    int i;
 286
 287    for (i = 0; i < view->nr; i++) {
 288        memory_region_unref(view->ranges[i].mr);
 289    }
 290    g_free(view->ranges);
 291    g_free(view);
 292}
 293
 294static void flatview_ref(FlatView *view)
 295{
 296    atomic_inc(&view->ref);
 297}
 298
 299static void flatview_unref(FlatView *view)
 300{
 301    if (atomic_fetch_dec(&view->ref) == 1) {
 302        flatview_destroy(view);
 303    }
 304}
 305
 306static bool can_merge(FlatRange *r1, FlatRange *r2)
 307{
 308    return int128_eq(addrrange_end(r1->addr), r2->addr.start)
 309        && r1->mr == r2->mr
 310        && int128_eq(int128_add(int128_make64(r1->offset_in_region),
 311                                r1->addr.size),
 312                     int128_make64(r2->offset_in_region))
 313        && r1->dirty_log_mask == r2->dirty_log_mask
 314        && r1->romd_mode == r2->romd_mode
 315        && r1->readonly == r2->readonly;
 316}
 317
 318/* Attempt to simplify a view by merging adjacent ranges */
 319static void flatview_simplify(FlatView *view)
 320{
 321    unsigned i, j;
 322
 323    i = 0;
 324    while (i < view->nr) {
 325        j = i + 1;
 326        while (j < view->nr
 327               && can_merge(&view->ranges[j-1], &view->ranges[j])) {
 328            int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
 329            ++j;
 330        }
 331        ++i;
 332        memmove(&view->ranges[i], &view->ranges[j],
 333                (view->nr - j) * sizeof(view->ranges[j]));
 334        view->nr -= j - i;
 335    }
 336}
 337
 338static bool memory_region_big_endian(MemoryRegion *mr)
 339{
 340#ifdef TARGET_WORDS_BIGENDIAN
 341    return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
 342#else
 343    return mr->ops->endianness == DEVICE_BIG_ENDIAN;
 344#endif
 345}
 346
 347static bool memory_region_wrong_endianness(MemoryRegion *mr)
 348{
 349#ifdef TARGET_WORDS_BIGENDIAN
 350    return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
 351#else
 352    return mr->ops->endianness == DEVICE_BIG_ENDIAN;
 353#endif
 354}
 355
 356static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
 357{
 358    if (memory_region_wrong_endianness(mr)) {
 359        switch (size) {
 360        case 1:
 361            break;
 362        case 2:
 363            *data = bswap16(*data);
 364            break;
 365        case 4:
 366            *data = bswap32(*data);
 367            break;
 368        case 8:
 369            *data = bswap64(*data);
 370            break;
 371        default:
 372            abort();
 373        }
 374    }
 375}
 376
 377static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
 378{
 379    MemoryRegion *root;
 380    hwaddr abs_addr = offset;
 381
 382    abs_addr += mr->addr;
 383    for (root = mr; root->container; ) {
 384        root = root->container;
 385        abs_addr += root->addr;
 386    }
 387
 388    return abs_addr;
 389}
 390
 391static int get_cpu_index(void)
 392{
 393    if (current_cpu) {
 394        return current_cpu->cpu_index;
 395    }
 396    return -1;
 397}
 398
 399static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
 400                                                       hwaddr addr,
 401                                                       uint64_t *value,
 402                                                       unsigned size,
 403                                                       unsigned shift,
 404                                                       uint64_t mask,
 405                                                       MemTxAttrs attrs)
 406{
 407    uint64_t tmp;
 408
 409    tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
 410    if (mr->subpage) {
 411        trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
 412    } else if (mr == &io_mem_notdirty) {
 413        /* Accesses to code which has previously been translated into a TB show
 414         * up in the MMIO path, as accesses to the io_mem_notdirty
 415         * MemoryRegion. */
 416        trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
 417    } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
 418        hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
 419        trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
 420    }
 421    *value |= (tmp & mask) << shift;
 422    return MEMTX_OK;
 423}
 424
 425static MemTxResult  memory_region_read_accessor(MemoryRegion *mr,
 426                                                hwaddr addr,
 427                                                uint64_t *value,
 428                                                unsigned size,
 429                                                unsigned shift,
 430                                                uint64_t mask,
 431                                                MemTxAttrs attrs)
 432{
 433    uint64_t tmp;
 434
 435    tmp = mr->ops->read(mr->opaque, addr, size);
 436    if (mr->subpage) {
 437        trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
 438    } else if (mr == &io_mem_notdirty) {
 439        /* Accesses to code which has previously been translated into a TB show
 440         * up in the MMIO path, as accesses to the io_mem_notdirty
 441         * MemoryRegion. */
 442        trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
 443    } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
 444        hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
 445        trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
 446    }
 447    *value |= (tmp & mask) << shift;
 448    return MEMTX_OK;
 449}
 450
 451static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
 452                                                          hwaddr addr,
 453                                                          uint64_t *value,
 454                                                          unsigned size,
 455                                                          unsigned shift,
 456                                                          uint64_t mask,
 457                                                          MemTxAttrs attrs)
 458{
 459    uint64_t tmp = 0;
 460    MemTxResult r;
 461
 462    r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
 463    if (mr->subpage) {
 464        trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
 465    } else if (mr == &io_mem_notdirty) {
 466        /* Accesses to code which has previously been translated into a TB show
 467         * up in the MMIO path, as accesses to the io_mem_notdirty
 468         * MemoryRegion. */
 469        trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
 470    } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
 471        hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
 472        trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
 473    }
 474    *value |= (tmp & mask) << shift;
 475    return r;
 476}
 477
 478static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
 479                                                        hwaddr addr,
 480                                                        uint64_t *value,
 481                                                        unsigned size,
 482                                                        unsigned shift,
 483                                                        uint64_t mask,
 484                                                        MemTxAttrs attrs)
 485{
 486    uint64_t tmp;
 487
 488    tmp = (*value >> shift) & mask;
 489    if (mr->subpage) {
 490        trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
 491    } else if (mr == &io_mem_notdirty) {
 492        /* Accesses to code which has previously been translated into a TB show
 493         * up in the MMIO path, as accesses to the io_mem_notdirty
 494         * MemoryRegion. */
 495        trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
 496    } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
 497        hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
 498        trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
 499    }
 500    mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
 501    return MEMTX_OK;
 502}
 503
 504static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
 505                                                hwaddr addr,
 506                                                uint64_t *value,
 507                                                unsigned size,
 508                                                unsigned shift,
 509                                                uint64_t mask,
 510                                                MemTxAttrs attrs)
 511{
 512    uint64_t tmp;
 513
 514    tmp = (*value >> shift) & mask;
 515    if (mr->subpage) {
 516        trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
 517    } else if (mr == &io_mem_notdirty) {
 518        /* Accesses to code which has previously been translated into a TB show
 519         * up in the MMIO path, as accesses to the io_mem_notdirty
 520         * MemoryRegion. */
 521        trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
 522    } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
 523        hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
 524        trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
 525    }
 526    mr->ops->write(mr->opaque, addr, tmp, size);
 527    return MEMTX_OK;
 528}
 529
 530static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
 531                                                           hwaddr addr,
 532                                                           uint64_t *value,
 533                                                           unsigned size,
 534                                                           unsigned shift,
 535                                                           uint64_t mask,
 536                                                           MemTxAttrs attrs)
 537{
 538    uint64_t tmp;
 539
 540    tmp = (*value >> shift) & mask;
 541    if (mr->subpage) {
 542        trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
 543    } else if (mr == &io_mem_notdirty) {
 544        /* Accesses to code which has previously been translated into a TB show
 545         * up in the MMIO path, as accesses to the io_mem_notdirty
 546         * MemoryRegion. */
 547        trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
 548    } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
 549        hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
 550        trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
 551    }
 552    return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
 553}
 554
 555static MemTxResult access_with_adjusted_size(hwaddr addr,
 556                                      uint64_t *value,
 557                                      unsigned size,
 558                                      unsigned access_size_min,
 559                                      unsigned access_size_max,
 560                                      MemTxResult (*access)(MemoryRegion *mr,
 561                                                            hwaddr addr,
 562                                                            uint64_t *value,
 563                                                            unsigned size,
 564                                                            unsigned shift,
 565                                                            uint64_t mask,
 566                                                            MemTxAttrs attrs),
 567                                      MemoryRegion *mr,
 568                                      MemTxAttrs attrs)
 569{
 570    uint64_t access_mask;
 571    unsigned access_size;
 572    unsigned i;
 573    MemTxResult r = MEMTX_OK;
 574
 575    if (!access_size_min) {
 576        access_size_min = 1;
 577    }
 578    if (!access_size_max) {
 579        access_size_max = 4;
 580    }
 581
 582    /* FIXME: support unaligned access? */
 583    access_size = MAX(MIN(size, access_size_max), access_size_min);
 584    access_mask = -1ULL >> (64 - access_size * 8);
 585    if (memory_region_big_endian(mr)) {
 586        for (i = 0; i < size; i += access_size) {
 587            r |= access(mr, addr + i, value, access_size,
 588                        (size - access_size - i) * 8, access_mask, attrs);
 589        }
 590    } else {
 591        for (i = 0; i < size; i += access_size) {
 592            r |= access(mr, addr + i, value, access_size, i * 8,
 593                        access_mask, attrs);
 594        }
 595    }
 596    return r;
 597}
 598
 599static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
 600{
 601    AddressSpace *as;
 602
 603    while (mr->container) {
 604        mr = mr->container;
 605    }
 606    QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
 607        if (mr == as->root) {
 608            return as;
 609        }
 610    }
 611    return NULL;
 612}
 613
 614/* Render a memory region into the global view.  Ranges in @view obscure
 615 * ranges in @mr.
 616 */
 617static void render_memory_region(FlatView *view,
 618                                 MemoryRegion *mr,
 619                                 Int128 base,
 620                                 AddrRange clip,
 621                                 bool readonly)
 622{
 623    MemoryRegion *subregion;
 624    unsigned i;
 625    hwaddr offset_in_region;
 626    Int128 remain;
 627    Int128 now;
 628    FlatRange fr;
 629    AddrRange tmp;
 630
 631    if (!mr->enabled) {
 632        return;
 633    }
 634
 635    int128_addto(&base, int128_make64(mr->addr));
 636    readonly |= mr->readonly;
 637
 638    tmp = addrrange_make(base, mr->size);
 639
 640    if (!addrrange_intersects(tmp, clip)) {
 641        return;
 642    }
 643
 644    clip = addrrange_intersection(tmp, clip);
 645
 646    if (mr->alias) {
 647        int128_subfrom(&base, int128_make64(mr->alias->addr));
 648        int128_subfrom(&base, int128_make64(mr->alias_offset));
 649        render_memory_region(view, mr->alias, base, clip, readonly);
 650        return;
 651    }
 652
 653    /* Render subregions in priority order. */
 654    QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
 655        render_memory_region(view, subregion, base, clip, readonly);
 656    }
 657
 658    if (!mr->terminates) {
 659        return;
 660    }
 661
 662    offset_in_region = int128_get64(int128_sub(clip.start, base));
 663    base = clip.start;
 664    remain = clip.size;
 665
 666    fr.mr = mr;
 667    fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
 668    fr.romd_mode = mr->romd_mode;
 669    fr.readonly = readonly;
 670
 671    /* Render the region itself into any gaps left by the current view. */
 672    for (i = 0; i < view->nr && int128_nz(remain); ++i) {
 673        if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
 674            continue;
 675        }
 676        if (int128_lt(base, view->ranges[i].addr.start)) {
 677            now = int128_min(remain,
 678                             int128_sub(view->ranges[i].addr.start, base));
 679            fr.offset_in_region = offset_in_region;
 680            fr.addr = addrrange_make(base, now);
 681            flatview_insert(view, i, &fr);
 682            ++i;
 683            int128_addto(&base, now);
 684            offset_in_region += int128_get64(now);
 685            int128_subfrom(&remain, now);
 686        }
 687        now = int128_sub(int128_min(int128_add(base, remain),
 688                                    addrrange_end(view->ranges[i].addr)),
 689                         base);
 690        int128_addto(&base, now);
 691        offset_in_region += int128_get64(now);
 692        int128_subfrom(&remain, now);
 693    }
 694    if (int128_nz(remain)) {
 695        fr.offset_in_region = offset_in_region;
 696        fr.addr = addrrange_make(base, remain);
 697        flatview_insert(view, i, &fr);
 698    }
 699}
 700
 701/* Render a memory topology into a list of disjoint absolute ranges. */
 702static FlatView *generate_memory_topology(MemoryRegion *mr)
 703{
 704    FlatView *view;
 705
 706    view = g_new(FlatView, 1);
 707    flatview_init(view);
 708
 709    if (mr) {
 710        render_memory_region(view, mr, int128_zero(),
 711                             addrrange_make(int128_zero(), int128_2_64()), false);
 712    }
 713    flatview_simplify(view);
 714
 715    return view;
 716}
 717
 718static void address_space_add_del_ioeventfds(AddressSpace *as,
 719                                             MemoryRegionIoeventfd *fds_new,
 720                                             unsigned fds_new_nb,
 721                                             MemoryRegionIoeventfd *fds_old,
 722                                             unsigned fds_old_nb)
 723{
 724    unsigned iold, inew;
 725    MemoryRegionIoeventfd *fd;
 726    MemoryRegionSection section;
 727
 728    /* Generate a symmetric difference of the old and new fd sets, adding
 729     * and deleting as necessary.
 730     */
 731
 732    iold = inew = 0;
 733    while (iold < fds_old_nb || inew < fds_new_nb) {
 734        if (iold < fds_old_nb
 735            && (inew == fds_new_nb
 736                || memory_region_ioeventfd_before(fds_old[iold],
 737                                                  fds_new[inew]))) {
 738            fd = &fds_old[iold];
 739            section = (MemoryRegionSection) {
 740                .address_space = as,
 741                .offset_within_address_space = int128_get64(fd->addr.start),
 742                .size = fd->addr.size,
 743            };
 744            MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
 745                                 fd->match_data, fd->data, fd->e);
 746            ++iold;
 747        } else if (inew < fds_new_nb
 748                   && (iold == fds_old_nb
 749                       || memory_region_ioeventfd_before(fds_new[inew],
 750                                                         fds_old[iold]))) {
 751            fd = &fds_new[inew];
 752            section = (MemoryRegionSection) {
 753                .address_space = as,
 754                .offset_within_address_space = int128_get64(fd->addr.start),
 755                .size = fd->addr.size,
 756            };
 757            MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
 758                                 fd->match_data, fd->data, fd->e);
 759            ++inew;
 760        } else {
 761            ++iold;
 762            ++inew;
 763        }
 764    }
 765}
 766
 767static FlatView *address_space_get_flatview(AddressSpace *as)
 768{
 769    FlatView *view;
 770
 771    rcu_read_lock();
 772    view = atomic_rcu_read(&as->current_map);
 773    flatview_ref(view);
 774    rcu_read_unlock();
 775    return view;
 776}
 777
 778static void address_space_update_ioeventfds(AddressSpace *as)
 779{
 780    FlatView *view;
 781    FlatRange *fr;
 782    unsigned ioeventfd_nb = 0;
 783    MemoryRegionIoeventfd *ioeventfds = NULL;
 784    AddrRange tmp;
 785    unsigned i;
 786
 787    view = address_space_get_flatview(as);
 788    FOR_EACH_FLAT_RANGE(fr, view) {
 789        for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
 790            tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
 791                                  int128_sub(fr->addr.start,
 792                                             int128_make64(fr->offset_in_region)));
 793            if (addrrange_intersects(fr->addr, tmp)) {
 794                ++ioeventfd_nb;
 795                ioeventfds = g_realloc(ioeventfds,
 796                                          ioeventfd_nb * sizeof(*ioeventfds));
 797                ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
 798                ioeventfds[ioeventfd_nb-1].addr = tmp;
 799            }
 800        }
 801    }
 802
 803    address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
 804                                     as->ioeventfds, as->ioeventfd_nb);
 805
 806    g_free(as->ioeventfds);
 807    as->ioeventfds = ioeventfds;
 808    as->ioeventfd_nb = ioeventfd_nb;
 809    flatview_unref(view);
 810}
 811
 812static void address_space_update_topology_pass(AddressSpace *as,
 813                                               const FlatView *old_view,
 814                                               const FlatView *new_view,
 815                                               bool adding)
 816{
 817    unsigned iold, inew;
 818    FlatRange *frold, *frnew;
 819
 820    /* Generate a symmetric difference of the old and new memory maps.
 821     * Kill ranges in the old map, and instantiate ranges in the new map.
 822     */
 823    iold = inew = 0;
 824    while (iold < old_view->nr || inew < new_view->nr) {
 825        if (iold < old_view->nr) {
 826            frold = &old_view->ranges[iold];
 827        } else {
 828            frold = NULL;
 829        }
 830        if (inew < new_view->nr) {
 831            frnew = &new_view->ranges[inew];
 832        } else {
 833            frnew = NULL;
 834        }
 835
 836        if (frold
 837            && (!frnew
 838                || int128_lt(frold->addr.start, frnew->addr.start)
 839                || (int128_eq(frold->addr.start, frnew->addr.start)
 840                    && !flatrange_equal(frold, frnew)))) {
 841            /* In old but not in new, or in both but attributes changed. */
 842
 843            if (!adding) {
 844                MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
 845            }
 846
 847            ++iold;
 848        } else if (frold && frnew && flatrange_equal(frold, frnew)) {
 849            /* In both and unchanged (except logging may have changed) */
 850
 851            if (adding) {
 852                MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
 853                if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
 854                    MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
 855                                                  frold->dirty_log_mask,
 856                                                  frnew->dirty_log_mask);
 857                }
 858                if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
 859                    MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
 860                                                  frold->dirty_log_mask,
 861                                                  frnew->dirty_log_mask);
 862                }
 863            }
 864
 865            ++iold;
 866            ++inew;
 867        } else {
 868            /* In new */
 869
 870            if (adding) {
 871                MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
 872            }
 873
 874            ++inew;
 875        }
 876    }
 877}
 878
 879
 880static void address_space_update_topology(AddressSpace *as)
 881{
 882    FlatView *old_view = address_space_get_flatview(as);
 883    FlatView *new_view = generate_memory_topology(as->root);
 884
 885    address_space_update_topology_pass(as, old_view, new_view, false);
 886    address_space_update_topology_pass(as, old_view, new_view, true);
 887
 888    /* Writes are protected by the BQL.  */
 889    atomic_rcu_set(&as->current_map, new_view);
 890    call_rcu(old_view, flatview_unref, rcu);
 891
 892    /* Note that all the old MemoryRegions are still alive up to this
 893     * point.  This relieves most MemoryListeners from the need to
 894     * ref/unref the MemoryRegions they get---unless they use them
 895     * outside the iothread mutex, in which case precise reference
 896     * counting is necessary.
 897     */
 898    flatview_unref(old_view);
 899
 900    address_space_update_ioeventfds(as);
 901}
 902
 903void memory_region_transaction_begin(void)
 904{
 905    qemu_flush_coalesced_mmio_buffer();
 906    ++memory_region_transaction_depth;
 907}
 908
 909void memory_region_transaction_commit(void)
 910{
 911    AddressSpace *as;
 912
 913    assert(memory_region_transaction_depth);
 914    assert(qemu_mutex_iothread_locked());
 915
 916    --memory_region_transaction_depth;
 917    if (!memory_region_transaction_depth) {
 918        if (memory_region_update_pending) {
 919            MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
 920
 921            QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
 922                address_space_update_topology(as);
 923            }
 924            memory_region_update_pending = false;
 925            MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
 926        } else if (ioeventfd_update_pending) {
 927            QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
 928                address_space_update_ioeventfds(as);
 929            }
 930            ioeventfd_update_pending = false;
 931        }
 932   }
 933}
 934
 935static void memory_region_destructor_none(MemoryRegion *mr)
 936{
 937}
 938
 939static void memory_region_destructor_ram(MemoryRegion *mr)
 940{
 941    qemu_ram_free(mr->ram_block);
 942}
 943
 944static bool memory_region_need_escape(char c)
 945{
 946    return c == '/' || c == '[' || c == '\\' || c == ']';
 947}
 948
 949static char *memory_region_escape_name(const char *name)
 950{
 951    const char *p;
 952    char *escaped, *q;
 953    uint8_t c;
 954    size_t bytes = 0;
 955
 956    for (p = name; *p; p++) {
 957        bytes += memory_region_need_escape(*p) ? 4 : 1;
 958    }
 959    if (bytes == p - name) {
 960       return g_memdup(name, bytes + 1);
 961    }
 962
 963    escaped = g_malloc(bytes + 1);
 964    for (p = name, q = escaped; *p; p++) {
 965        c = *p;
 966        if (unlikely(memory_region_need_escape(c))) {
 967            *q++ = '\\';
 968            *q++ = 'x';
 969            *q++ = "0123456789abcdef"[c >> 4];
 970            c = "0123456789abcdef"[c & 15];
 971        }
 972        *q++ = c;
 973    }
 974    *q = 0;
 975    return escaped;
 976}
 977
 978void memory_region_init(MemoryRegion *mr,
 979                        Object *owner,
 980                        const char *name,
 981                        uint64_t size)
 982{
 983    object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
 984    mr->size = int128_make64(size);
 985    if (size == UINT64_MAX) {
 986        mr->size = int128_2_64();
 987    }
 988    mr->name = g_strdup(name);
 989    mr->owner = owner;
 990    mr->ram_block = NULL;
 991
 992    if (name) {
 993        char *escaped_name = memory_region_escape_name(name);
 994        char *name_array = g_strdup_printf("%s[*]", escaped_name);
 995
 996        if (!owner) {
 997            owner = container_get(qdev_get_machine(), "/unattached");
 998        }
 999
1000        object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
1001        object_unref(OBJECT(mr));
1002        g_free(name_array);
1003        g_free(escaped_name);
1004    }
1005}
1006
1007static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
1008                                   void *opaque, Error **errp)
1009{
1010    MemoryRegion *mr = MEMORY_REGION(obj);
1011    uint64_t value = mr->addr;
1012
1013    visit_type_uint64(v, name, &value, errp);
1014}
1015
1016static void memory_region_get_container(Object *obj, Visitor *v,
1017                                        const char *name, void *opaque,
1018                                        Error **errp)
1019{
1020    MemoryRegion *mr = MEMORY_REGION(obj);
1021    gchar *path = (gchar *)"";
1022
1023    if (mr->container) {
1024        path = object_get_canonical_path(OBJECT(mr->container));
1025    }
1026    visit_type_str(v, name, &path, errp);
1027    if (mr->container) {
1028        g_free(path);
1029    }
1030}
1031
1032static Object *memory_region_resolve_container(Object *obj, void *opaque,
1033                                               const char *part)
1034{
1035    MemoryRegion *mr = MEMORY_REGION(obj);
1036
1037    return OBJECT(mr->container);
1038}
1039
1040static void memory_region_get_priority(Object *obj, Visitor *v,
1041                                       const char *name, void *opaque,
1042                                       Error **errp)
1043{
1044    MemoryRegion *mr = MEMORY_REGION(obj);
1045    int32_t value = mr->priority;
1046
1047    visit_type_int32(v, name, &value, errp);
1048}
1049
1050static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1051                                   void *opaque, Error **errp)
1052{
1053    MemoryRegion *mr = MEMORY_REGION(obj);
1054    uint64_t value = memory_region_size(mr);
1055
1056    visit_type_uint64(v, name, &value, errp);
1057}
1058
1059static void memory_region_initfn(Object *obj)
1060{
1061    MemoryRegion *mr = MEMORY_REGION(obj);
1062    ObjectProperty *op;
1063
1064    mr->ops = &unassigned_mem_ops;
1065    mr->enabled = true;
1066    mr->romd_mode = true;
1067    mr->global_locking = true;
1068    mr->destructor = memory_region_destructor_none;
1069    QTAILQ_INIT(&mr->subregions);
1070    QTAILQ_INIT(&mr->coalesced);
1071
1072    op = object_property_add(OBJECT(mr), "container",
1073                             "link<" TYPE_MEMORY_REGION ">",
1074                             memory_region_get_container,
1075                             NULL, /* memory_region_set_container */
1076                             NULL, NULL, &error_abort);
1077    op->resolve = memory_region_resolve_container;
1078
1079    object_property_add(OBJECT(mr), "addr", "uint64",
1080                        memory_region_get_addr,
1081                        NULL, /* memory_region_set_addr */
1082                        NULL, NULL, &error_abort);
1083    object_property_add(OBJECT(mr), "priority", "uint32",
1084                        memory_region_get_priority,
1085                        NULL, /* memory_region_set_priority */
1086                        NULL, NULL, &error_abort);
1087    object_property_add(OBJECT(mr), "size", "uint64",
1088                        memory_region_get_size,
1089                        NULL, /* memory_region_set_size, */
1090                        NULL, NULL, &error_abort);
1091}
1092
1093static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1094                                    unsigned size)
1095{
1096#ifdef DEBUG_UNASSIGNED
1097    printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1098#endif
1099    if (current_cpu != NULL) {
1100        cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
1101    }
1102    return 0;
1103}
1104
1105static void unassigned_mem_write(void *opaque, hwaddr addr,
1106                                 uint64_t val, unsigned size)
1107{
1108#ifdef DEBUG_UNASSIGNED
1109    printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1110#endif
1111    if (current_cpu != NULL) {
1112        cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1113    }
1114}
1115
1116static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1117                                   unsigned size, bool is_write)
1118{
1119    return false;
1120}
1121
1122const MemoryRegionOps unassigned_mem_ops = {
1123    .valid.accepts = unassigned_mem_accepts,
1124    .endianness = DEVICE_NATIVE_ENDIAN,
1125};
1126
1127static uint64_t memory_region_ram_device_read(void *opaque,
1128                                              hwaddr addr, unsigned size)
1129{
1130    MemoryRegion *mr = opaque;
1131    uint64_t data = (uint64_t)~0;
1132
1133    switch (size) {
1134    case 1:
1135        data = *(uint8_t *)(mr->ram_block->host + addr);
1136        break;
1137    case 2:
1138        data = *(uint16_t *)(mr->ram_block->host + addr);
1139        break;
1140    case 4:
1141        data = *(uint32_t *)(mr->ram_block->host + addr);
1142        break;
1143    case 8:
1144        data = *(uint64_t *)(mr->ram_block->host + addr);
1145        break;
1146    }
1147
1148    trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1149
1150    return data;
1151}
1152
1153static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1154                                           uint64_t data, unsigned size)
1155{
1156    MemoryRegion *mr = opaque;
1157
1158    trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1159
1160    switch (size) {
1161    case 1:
1162        *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
1163        break;
1164    case 2:
1165        *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
1166        break;
1167    case 4:
1168        *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
1169        break;
1170    case 8:
1171        *(uint64_t *)(mr->ram_block->host + addr) = data;
1172        break;
1173    }
1174}
1175
1176static const MemoryRegionOps ram_device_mem_ops = {
1177    .read = memory_region_ram_device_read,
1178    .write = memory_region_ram_device_write,
1179    .endianness = DEVICE_HOST_ENDIAN,
1180    .valid = {
1181        .min_access_size = 1,
1182        .max_access_size = 8,
1183        .unaligned = true,
1184    },
1185    .impl = {
1186        .min_access_size = 1,
1187        .max_access_size = 8,
1188        .unaligned = true,
1189    },
1190};
1191
1192bool memory_region_access_valid(MemoryRegion *mr,
1193                                hwaddr addr,
1194                                unsigned size,
1195                                bool is_write)
1196{
1197    int access_size_min, access_size_max;
1198    int access_size, i;
1199
1200    if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1201        return false;
1202    }
1203
1204    if (!mr->ops->valid.accepts) {
1205        return true;
1206    }
1207
1208    access_size_min = mr->ops->valid.min_access_size;
1209    if (!mr->ops->valid.min_access_size) {
1210        access_size_min = 1;
1211    }
1212
1213    access_size_max = mr->ops->valid.max_access_size;
1214    if (!mr->ops->valid.max_access_size) {
1215        access_size_max = 4;
1216    }
1217
1218    access_size = MAX(MIN(size, access_size_max), access_size_min);
1219    for (i = 0; i < size; i += access_size) {
1220        if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1221                                    is_write)) {
1222            return false;
1223        }
1224    }
1225
1226    return true;
1227}
1228
1229static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1230                                                hwaddr addr,
1231                                                uint64_t *pval,
1232                                                unsigned size,
1233                                                MemTxAttrs attrs)
1234{
1235    *pval = 0;
1236
1237    if (mr->ops->read) {
1238        return access_with_adjusted_size(addr, pval, size,
1239                                         mr->ops->impl.min_access_size,
1240                                         mr->ops->impl.max_access_size,
1241                                         memory_region_read_accessor,
1242                                         mr, attrs);
1243    } else if (mr->ops->read_with_attrs) {
1244        return access_with_adjusted_size(addr, pval, size,
1245                                         mr->ops->impl.min_access_size,
1246                                         mr->ops->impl.max_access_size,
1247                                         memory_region_read_with_attrs_accessor,
1248                                         mr, attrs);
1249    } else {
1250        return access_with_adjusted_size(addr, pval, size, 1, 4,
1251                                         memory_region_oldmmio_read_accessor,
1252                                         mr, attrs);
1253    }
1254}
1255
1256MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1257                                        hwaddr addr,
1258                                        uint64_t *pval,
1259                                        unsigned size,
1260                                        MemTxAttrs attrs)
1261{
1262    MemTxResult r;
1263
1264    if (!memory_region_access_valid(mr, addr, size, false)) {
1265        *pval = unassigned_mem_read(mr, addr, size);
1266        return MEMTX_DECODE_ERROR;
1267    }
1268
1269    r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1270    adjust_endianness(mr, pval, size);
1271    return r;
1272}
1273
1274/* Return true if an eventfd was signalled */
1275static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1276                                                    hwaddr addr,
1277                                                    uint64_t data,
1278                                                    unsigned size,
1279                                                    MemTxAttrs attrs)
1280{
1281    MemoryRegionIoeventfd ioeventfd = {
1282        .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1283        .data = data,
1284    };
1285    unsigned i;
1286
1287    for (i = 0; i < mr->ioeventfd_nb; i++) {
1288        ioeventfd.match_data = mr->ioeventfds[i].match_data;
1289        ioeventfd.e = mr->ioeventfds[i].e;
1290
1291        if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) {
1292            event_notifier_set(ioeventfd.e);
1293            return true;
1294        }
1295    }
1296
1297    return false;
1298}
1299
1300MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1301                                         hwaddr addr,
1302                                         uint64_t data,
1303                                         unsigned size,
1304                                         MemTxAttrs attrs)
1305{
1306    if (!memory_region_access_valid(mr, addr, size, true)) {
1307        unassigned_mem_write(mr, addr, data, size);
1308        return MEMTX_DECODE_ERROR;
1309    }
1310
1311    adjust_endianness(mr, &data, size);
1312
1313    if ((!kvm_eventfds_enabled()) &&
1314        memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1315        return MEMTX_OK;
1316    }
1317
1318    if (mr->ops->write) {
1319        return access_with_adjusted_size(addr, &data, size,
1320                                         mr->ops->impl.min_access_size,
1321                                         mr->ops->impl.max_access_size,
1322                                         memory_region_write_accessor, mr,
1323                                         attrs);
1324    } else if (mr->ops->write_with_attrs) {
1325        return
1326            access_with_adjusted_size(addr, &data, size,
1327                                      mr->ops->impl.min_access_size,
1328                                      mr->ops->impl.max_access_size,
1329                                      memory_region_write_with_attrs_accessor,
1330                                      mr, attrs);
1331    } else {
1332        return access_with_adjusted_size(addr, &data, size, 1, 4,
1333                                         memory_region_oldmmio_write_accessor,
1334                                         mr, attrs);
1335    }
1336}
1337
1338void memory_region_init_io(MemoryRegion *mr,
1339                           Object *owner,
1340                           const MemoryRegionOps *ops,
1341                           void *opaque,
1342                           const char *name,
1343                           uint64_t size)
1344{
1345    memory_region_init(mr, owner, name, size);
1346    mr->ops = ops ? ops : &unassigned_mem_ops;
1347    mr->opaque = opaque;
1348    mr->terminates = true;
1349}
1350
1351void memory_region_init_ram(MemoryRegion *mr,
1352                            Object *owner,
1353                            const char *name,
1354                            uint64_t size,
1355                            Error **errp)
1356{
1357    memory_region_init(mr, owner, name, size);
1358    mr->ram = true;
1359    mr->terminates = true;
1360    mr->destructor = memory_region_destructor_ram;
1361    mr->ram_block = qemu_ram_alloc(size, mr, errp);
1362    mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1363}
1364
1365void memory_region_init_resizeable_ram(MemoryRegion *mr,
1366                                       Object *owner,
1367                                       const char *name,
1368                                       uint64_t size,
1369                                       uint64_t max_size,
1370                                       void (*resized)(const char*,
1371                                                       uint64_t length,
1372                                                       void *host),
1373                                       Error **errp)
1374{
1375    memory_region_init(mr, owner, name, size);
1376    mr->ram = true;
1377    mr->terminates = true;
1378    mr->destructor = memory_region_destructor_ram;
1379    mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1380                                              mr, errp);
1381    mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1382}
1383
1384#ifdef __linux__
1385void memory_region_init_ram_from_file(MemoryRegion *mr,
1386                                      struct Object *owner,
1387                                      const char *name,
1388                                      uint64_t size,
1389                                      bool share,
1390                                      const char *path,
1391                                      Error **errp)
1392{
1393    memory_region_init(mr, owner, name, size);
1394    mr->ram = true;
1395    mr->terminates = true;
1396    mr->destructor = memory_region_destructor_ram;
1397    mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1398    mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1399}
1400#endif
1401
1402void memory_region_init_ram_ptr(MemoryRegion *mr,
1403                                Object *owner,
1404                                const char *name,
1405                                uint64_t size,
1406                                void *ptr)
1407{
1408    memory_region_init(mr, owner, name, size);
1409    mr->ram = true;
1410    mr->terminates = true;
1411    mr->destructor = memory_region_destructor_ram;
1412    mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1413
1414    /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL.  */
1415    assert(ptr != NULL);
1416    mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1417}
1418
1419void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1420                                       Object *owner,
1421                                       const char *name,
1422                                       uint64_t size,
1423                                       void *ptr)
1424{
1425    memory_region_init_ram_ptr(mr, owner, name, size, ptr);
1426    mr->ram_device = true;
1427    mr->ops = &ram_device_mem_ops;
1428    mr->opaque = mr;
1429}
1430
1431void memory_region_init_alias(MemoryRegion *mr,
1432                              Object *owner,
1433                              const char *name,
1434                              MemoryRegion *orig,
1435                              hwaddr offset,
1436                              uint64_t size)
1437{
1438    memory_region_init(mr, owner, name, size);
1439    mr->alias = orig;
1440    mr->alias_offset = offset;
1441}
1442
1443void memory_region_init_rom(MemoryRegion *mr,
1444                            struct Object *owner,
1445                            const char *name,
1446                            uint64_t size,
1447                            Error **errp)
1448{
1449    memory_region_init(mr, owner, name, size);
1450    mr->ram = true;
1451    mr->readonly = true;
1452    mr->terminates = true;
1453    mr->destructor = memory_region_destructor_ram;
1454    mr->ram_block = qemu_ram_alloc(size, mr, errp);
1455    mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1456}
1457
1458void memory_region_init_rom_device(MemoryRegion *mr,
1459                                   Object *owner,
1460                                   const MemoryRegionOps *ops,
1461                                   void *opaque,
1462                                   const char *name,
1463                                   uint64_t size,
1464                                   Error **errp)
1465{
1466    assert(ops);
1467    memory_region_init(mr, owner, name, size);
1468    mr->ops = ops;
1469    mr->opaque = opaque;
1470    mr->terminates = true;
1471    mr->rom_device = true;
1472    mr->destructor = memory_region_destructor_ram;
1473    mr->ram_block = qemu_ram_alloc(size, mr, errp);
1474}
1475
1476void memory_region_init_iommu(MemoryRegion *mr,
1477                              Object *owner,
1478                              const MemoryRegionIOMMUOps *ops,
1479                              const char *name,
1480                              uint64_t size)
1481{
1482    memory_region_init(mr, owner, name, size);
1483    mr->iommu_ops = ops,
1484    mr->terminates = true;  /* then re-forwards */
1485    QLIST_INIT(&mr->iommu_notify);
1486    mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
1487}
1488
1489static void memory_region_finalize(Object *obj)
1490{
1491    MemoryRegion *mr = MEMORY_REGION(obj);
1492
1493    assert(!mr->container);
1494
1495    /* We know the region is not visible in any address space (it
1496     * does not have a container and cannot be a root either because
1497     * it has no references, so we can blindly clear mr->enabled.
1498     * memory_region_set_enabled instead could trigger a transaction
1499     * and cause an infinite loop.
1500     */
1501    mr->enabled = false;
1502    memory_region_transaction_begin();
1503    while (!QTAILQ_EMPTY(&mr->subregions)) {
1504        MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1505        memory_region_del_subregion(mr, subregion);
1506    }
1507    memory_region_transaction_commit();
1508
1509    mr->destructor(mr);
1510    memory_region_clear_coalescing(mr);
1511    g_free((char *)mr->name);
1512    g_free(mr->ioeventfds);
1513}
1514
1515Object *memory_region_owner(MemoryRegion *mr)
1516{
1517    Object *obj = OBJECT(mr);
1518    return obj->parent;
1519}
1520
1521void memory_region_ref(MemoryRegion *mr)
1522{
1523    /* MMIO callbacks most likely will access data that belongs
1524     * to the owner, hence the need to ref/unref the owner whenever
1525     * the memory region is in use.
1526     *
1527     * The memory region is a child of its owner.  As long as the
1528     * owner doesn't call unparent itself on the memory region,
1529     * ref-ing the owner will also keep the memory region alive.
1530     * Memory regions without an owner are supposed to never go away;
1531     * we do not ref/unref them because it slows down DMA sensibly.
1532     */
1533    if (mr && mr->owner) {
1534        object_ref(mr->owner);
1535    }
1536}
1537
1538void memory_region_unref(MemoryRegion *mr)
1539{
1540    if (mr && mr->owner) {
1541        object_unref(mr->owner);
1542    }
1543}
1544
1545uint64_t memory_region_size(MemoryRegion *mr)
1546{
1547    if (int128_eq(mr->size, int128_2_64())) {
1548        return UINT64_MAX;
1549    }
1550    return int128_get64(mr->size);
1551}
1552
1553const char *memory_region_name(const MemoryRegion *mr)
1554{
1555    if (!mr->name) {
1556        ((MemoryRegion *)mr)->name =
1557            object_get_canonical_path_component(OBJECT(mr));
1558    }
1559    return mr->name;
1560}
1561
1562bool memory_region_is_ram_device(MemoryRegion *mr)
1563{
1564    return mr->ram_device;
1565}
1566
1567uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1568{
1569    uint8_t mask = mr->dirty_log_mask;
1570    if (global_dirty_log && mr->ram_block) {
1571        mask |= (1 << DIRTY_MEMORY_MIGRATION);
1572    }
1573    return mask;
1574}
1575
1576bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1577{
1578    return memory_region_get_dirty_log_mask(mr) & (1 << client);
1579}
1580
1581static void memory_region_update_iommu_notify_flags(MemoryRegion *mr)
1582{
1583    IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1584    IOMMUNotifier *iommu_notifier;
1585
1586    QLIST_FOREACH(iommu_notifier, &mr->iommu_notify, node) {
1587        flags |= iommu_notifier->notifier_flags;
1588    }
1589
1590    if (flags != mr->iommu_notify_flags &&
1591        mr->iommu_ops->notify_flag_changed) {
1592        mr->iommu_ops->notify_flag_changed(mr, mr->iommu_notify_flags,
1593                                           flags);
1594    }
1595
1596    mr->iommu_notify_flags = flags;
1597}
1598
1599void memory_region_register_iommu_notifier(MemoryRegion *mr,
1600                                           IOMMUNotifier *n)
1601{
1602    if (mr->alias) {
1603        memory_region_register_iommu_notifier(mr->alias, n);
1604        return;
1605    }
1606
1607    /* We need to register for at least one bitfield */
1608    assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
1609    QLIST_INSERT_HEAD(&mr->iommu_notify, n, node);
1610    memory_region_update_iommu_notify_flags(mr);
1611}
1612
1613uint64_t memory_region_iommu_get_min_page_size(MemoryRegion *mr)
1614{
1615    assert(memory_region_is_iommu(mr));
1616    if (mr->iommu_ops && mr->iommu_ops->get_min_page_size) {
1617        return mr->iommu_ops->get_min_page_size(mr);
1618    }
1619    return TARGET_PAGE_SIZE;
1620}
1621
1622void memory_region_iommu_replay(MemoryRegion *mr, IOMMUNotifier *n,
1623                                bool is_write)
1624{
1625    hwaddr addr, granularity;
1626    IOMMUTLBEntry iotlb;
1627
1628    granularity = memory_region_iommu_get_min_page_size(mr);
1629
1630    for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1631        iotlb = mr->iommu_ops->translate(mr, addr, is_write);
1632        if (iotlb.perm != IOMMU_NONE) {
1633            n->notify(n, &iotlb);
1634        }
1635
1636        /* if (2^64 - MR size) < granularity, it's possible to get an
1637         * infinite loop here.  This should catch such a wraparound */
1638        if ((addr + granularity) < addr) {
1639            break;
1640        }
1641    }
1642}
1643
1644void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1645                                             IOMMUNotifier *n)
1646{
1647    if (mr->alias) {
1648        memory_region_unregister_iommu_notifier(mr->alias, n);
1649        return;
1650    }
1651    QLIST_REMOVE(n, node);
1652    memory_region_update_iommu_notify_flags(mr);
1653}
1654
1655void memory_region_notify_iommu(MemoryRegion *mr,
1656                                IOMMUTLBEntry entry)
1657{
1658    IOMMUNotifier *iommu_notifier;
1659    IOMMUNotifierFlag request_flags;
1660
1661    assert(memory_region_is_iommu(mr));
1662
1663    if (entry.perm & IOMMU_RW) {
1664        request_flags = IOMMU_NOTIFIER_MAP;
1665    } else {
1666        request_flags = IOMMU_NOTIFIER_UNMAP;
1667    }
1668
1669    QLIST_FOREACH(iommu_notifier, &mr->iommu_notify, node) {
1670        if (iommu_notifier->notifier_flags & request_flags) {
1671            iommu_notifier->notify(iommu_notifier, &entry);
1672        }
1673    }
1674}
1675
1676void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1677{
1678    uint8_t mask = 1 << client;
1679    uint8_t old_logging;
1680
1681    assert(client == DIRTY_MEMORY_VGA);
1682    old_logging = mr->vga_logging_count;
1683    mr->vga_logging_count += log ? 1 : -1;
1684    if (!!old_logging == !!mr->vga_logging_count) {
1685        return;
1686    }
1687
1688    memory_region_transaction_begin();
1689    mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1690    memory_region_update_pending |= mr->enabled;
1691    memory_region_transaction_commit();
1692}
1693
1694bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1695                             hwaddr size, unsigned client)
1696{
1697    assert(mr->ram_block);
1698    return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr,
1699                                         size, client);
1700}
1701
1702void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1703                             hwaddr size)
1704{
1705    assert(mr->ram_block);
1706    cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
1707                                        size,
1708                                        memory_region_get_dirty_log_mask(mr));
1709}
1710
1711bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1712                                        hwaddr size, unsigned client)
1713{
1714    assert(mr->ram_block);
1715    return cpu_physical_memory_test_and_clear_dirty(
1716                memory_region_get_ram_addr(mr) + addr, size, client);
1717}
1718
1719
1720void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1721{
1722    MemoryListener *listener;
1723    AddressSpace *as;
1724    FlatView *view;
1725    FlatRange *fr;
1726
1727    /* If the same address space has multiple log_sync listeners, we
1728     * visit that address space's FlatView multiple times.  But because
1729     * log_sync listeners are rare, it's still cheaper than walking each
1730     * address space once.
1731     */
1732    QTAILQ_FOREACH(listener, &memory_listeners, link) {
1733        if (!listener->log_sync) {
1734            continue;
1735        }
1736        as = listener->address_space;
1737        view = address_space_get_flatview(as);
1738        FOR_EACH_FLAT_RANGE(fr, view) {
1739            if (fr->mr == mr) {
1740                MemoryRegionSection mrs = section_from_flat_range(fr, as);
1741                listener->log_sync(listener, &mrs);
1742            }
1743        }
1744        flatview_unref(view);
1745    }
1746}
1747
1748void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1749{
1750    if (mr->readonly != readonly) {
1751        memory_region_transaction_begin();
1752        mr->readonly = readonly;
1753        memory_region_update_pending |= mr->enabled;
1754        memory_region_transaction_commit();
1755    }
1756}
1757
1758void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1759{
1760    if (mr->romd_mode != romd_mode) {
1761        memory_region_transaction_begin();
1762        mr->romd_mode = romd_mode;
1763        memory_region_update_pending |= mr->enabled;
1764        memory_region_transaction_commit();
1765    }
1766}
1767
1768void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1769                               hwaddr size, unsigned client)
1770{
1771    assert(mr->ram_block);
1772    cpu_physical_memory_test_and_clear_dirty(
1773        memory_region_get_ram_addr(mr) + addr, size, client);
1774}
1775
1776int memory_region_get_fd(MemoryRegion *mr)
1777{
1778    int fd;
1779
1780    rcu_read_lock();
1781    while (mr->alias) {
1782        mr = mr->alias;
1783    }
1784    fd = mr->ram_block->fd;
1785    rcu_read_unlock();
1786
1787    return fd;
1788}
1789
1790void memory_region_set_fd(MemoryRegion *mr, int fd)
1791{
1792    rcu_read_lock();
1793    while (mr->alias) {
1794        mr = mr->alias;
1795    }
1796    mr->ram_block->fd = fd;
1797    rcu_read_unlock();
1798}
1799
1800void *memory_region_get_ram_ptr(MemoryRegion *mr)
1801{
1802    void *ptr;
1803    uint64_t offset = 0;
1804
1805    rcu_read_lock();
1806    while (mr->alias) {
1807        offset += mr->alias_offset;
1808        mr = mr->alias;
1809    }
1810    assert(mr->ram_block);
1811    ptr = qemu_map_ram_ptr(mr->ram_block, offset);
1812    rcu_read_unlock();
1813
1814    return ptr;
1815}
1816
1817MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
1818{
1819    RAMBlock *block;
1820
1821    block = qemu_ram_block_from_host(ptr, false, offset);
1822    if (!block) {
1823        return NULL;
1824    }
1825
1826    return block->mr;
1827}
1828
1829ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1830{
1831    return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
1832}
1833
1834void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
1835{
1836    assert(mr->ram_block);
1837
1838    qemu_ram_resize(mr->ram_block, newsize, errp);
1839}
1840
1841static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1842{
1843    FlatView *view;
1844    FlatRange *fr;
1845    CoalescedMemoryRange *cmr;
1846    AddrRange tmp;
1847    MemoryRegionSection section;
1848
1849    view = address_space_get_flatview(as);
1850    FOR_EACH_FLAT_RANGE(fr, view) {
1851        if (fr->mr == mr) {
1852            section = (MemoryRegionSection) {
1853                .address_space = as,
1854                .offset_within_address_space = int128_get64(fr->addr.start),
1855                .size = fr->addr.size,
1856            };
1857
1858            MEMORY_LISTENER_CALL(as, coalesced_mmio_del, Reverse, &section,
1859                                 int128_get64(fr->addr.start),
1860                                 int128_get64(fr->addr.size));
1861            QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1862                tmp = addrrange_shift(cmr->addr,
1863                                      int128_sub(fr->addr.start,
1864                                                 int128_make64(fr->offset_in_region)));
1865                if (!addrrange_intersects(tmp, fr->addr)) {
1866                    continue;
1867                }
1868                tmp = addrrange_intersection(tmp, fr->addr);
1869                MEMORY_LISTENER_CALL(as, coalesced_mmio_add, Forward, &section,
1870                                     int128_get64(tmp.start),
1871                                     int128_get64(tmp.size));
1872            }
1873        }
1874    }
1875    flatview_unref(view);
1876}
1877
1878static void memory_region_update_coalesced_range(MemoryRegion *mr)
1879{
1880    AddressSpace *as;
1881
1882    QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1883        memory_region_update_coalesced_range_as(mr, as);
1884    }
1885}
1886
1887void memory_region_set_coalescing(MemoryRegion *mr)
1888{
1889    memory_region_clear_coalescing(mr);
1890    memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1891}
1892
1893void memory_region_add_coalescing(MemoryRegion *mr,
1894                                  hwaddr offset,
1895                                  uint64_t size)
1896{
1897    CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1898
1899    cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1900    QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1901    memory_region_update_coalesced_range(mr);
1902    memory_region_set_flush_coalesced(mr);
1903}
1904
1905void memory_region_clear_coalescing(MemoryRegion *mr)
1906{
1907    CoalescedMemoryRange *cmr;
1908    bool updated = false;
1909
1910    qemu_flush_coalesced_mmio_buffer();
1911    mr->flush_coalesced_mmio = false;
1912
1913    while (!QTAILQ_EMPTY(&mr->coalesced)) {
1914        cmr = QTAILQ_FIRST(&mr->coalesced);
1915        QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1916        g_free(cmr);
1917        updated = true;
1918    }
1919
1920    if (updated) {
1921        memory_region_update_coalesced_range(mr);
1922    }
1923}
1924
1925void memory_region_set_flush_coalesced(MemoryRegion *mr)
1926{
1927    mr->flush_coalesced_mmio = true;
1928}
1929
1930void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1931{
1932    qemu_flush_coalesced_mmio_buffer();
1933    if (QTAILQ_EMPTY(&mr->coalesced)) {
1934        mr->flush_coalesced_mmio = false;
1935    }
1936}
1937
1938void memory_region_set_global_locking(MemoryRegion *mr)
1939{
1940    mr->global_locking = true;
1941}
1942
1943void memory_region_clear_global_locking(MemoryRegion *mr)
1944{
1945    mr->global_locking = false;
1946}
1947
1948static bool userspace_eventfd_warning;
1949
1950void memory_region_add_eventfd(MemoryRegion *mr,
1951                               hwaddr addr,
1952                               unsigned size,
1953                               bool match_data,
1954                               uint64_t data,
1955                               EventNotifier *e)
1956{
1957    MemoryRegionIoeventfd mrfd = {
1958        .addr.start = int128_make64(addr),
1959        .addr.size = int128_make64(size),
1960        .match_data = match_data,
1961        .data = data,
1962        .e = e,
1963    };
1964    unsigned i;
1965
1966    if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
1967                            userspace_eventfd_warning))) {
1968        userspace_eventfd_warning = true;
1969        error_report("Using eventfd without MMIO binding in KVM. "
1970                     "Suboptimal performance expected");
1971    }
1972
1973    if (size) {
1974        adjust_endianness(mr, &mrfd.data, size);
1975    }
1976    memory_region_transaction_begin();
1977    for (i = 0; i < mr->ioeventfd_nb; ++i) {
1978        if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1979            break;
1980        }
1981    }
1982    ++mr->ioeventfd_nb;
1983    mr->ioeventfds = g_realloc(mr->ioeventfds,
1984                                  sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1985    memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1986            sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1987    mr->ioeventfds[i] = mrfd;
1988    ioeventfd_update_pending |= mr->enabled;
1989    memory_region_transaction_commit();
1990}
1991
1992void memory_region_del_eventfd(MemoryRegion *mr,
1993                               hwaddr addr,
1994                               unsigned size,
1995                               bool match_data,
1996                               uint64_t data,
1997                               EventNotifier *e)
1998{
1999    MemoryRegionIoeventfd mrfd = {
2000        .addr.start = int128_make64(addr),
2001        .addr.size = int128_make64(size),
2002        .match_data = match_data,
2003        .data = data,
2004        .e = e,
2005    };
2006    unsigned i;
2007
2008    if (size) {
2009        adjust_endianness(mr, &mrfd.data, size);
2010    }
2011    memory_region_transaction_begin();
2012    for (i = 0; i < mr->ioeventfd_nb; ++i) {
2013        if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
2014            break;
2015        }
2016    }
2017    assert(i != mr->ioeventfd_nb);
2018    memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2019            sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2020    --mr->ioeventfd_nb;
2021    mr->ioeventfds = g_realloc(mr->ioeventfds,
2022                                  sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
2023    ioeventfd_update_pending |= mr->enabled;
2024    memory_region_transaction_commit();
2025}
2026
2027static void memory_region_update_container_subregions(MemoryRegion *subregion)
2028{
2029    MemoryRegion *mr = subregion->container;
2030    MemoryRegion *other;
2031
2032    memory_region_transaction_begin();
2033
2034    memory_region_ref(subregion);
2035    QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2036        if (subregion->priority >= other->priority) {
2037            QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2038            goto done;
2039        }
2040    }
2041    QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2042done:
2043    memory_region_update_pending |= mr->enabled && subregion->enabled;
2044    memory_region_transaction_commit();
2045}
2046
2047static void memory_region_add_subregion_common(MemoryRegion *mr,
2048                                               hwaddr offset,
2049                                               MemoryRegion *subregion)
2050{
2051    assert(!subregion->container);
2052    subregion->container = mr;
2053    subregion->addr = offset;
2054    memory_region_update_container_subregions(subregion);
2055}
2056
2057void memory_region_add_subregion(MemoryRegion *mr,
2058                                 hwaddr offset,
2059                                 MemoryRegion *subregion)
2060{
2061    subregion->priority = 0;
2062    memory_region_add_subregion_common(mr, offset, subregion);
2063}
2064
2065void memory_region_add_subregion_overlap(MemoryRegion *mr,
2066                                         hwaddr offset,
2067                                         MemoryRegion *subregion,
2068                                         int priority)
2069{
2070    subregion->priority = priority;
2071    memory_region_add_subregion_common(mr, offset, subregion);
2072}
2073
2074void memory_region_del_subregion(MemoryRegion *mr,
2075                                 MemoryRegion *subregion)
2076{
2077    memory_region_transaction_begin();
2078    assert(subregion->container == mr);
2079    subregion->container = NULL;
2080    QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2081    memory_region_unref(subregion);
2082    memory_region_update_pending |= mr->enabled && subregion->enabled;
2083    memory_region_transaction_commit();
2084}
2085
2086void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2087{
2088    if (enabled == mr->enabled) {
2089        return;
2090    }
2091    memory_region_transaction_begin();
2092    mr->enabled = enabled;
2093    memory_region_update_pending = true;
2094    memory_region_transaction_commit();
2095}
2096
2097void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2098{
2099    Int128 s = int128_make64(size);
2100
2101    if (size == UINT64_MAX) {
2102        s = int128_2_64();
2103    }
2104    if (int128_eq(s, mr->size)) {
2105        return;
2106    }
2107    memory_region_transaction_begin();
2108    mr->size = s;
2109    memory_region_update_pending = true;
2110    memory_region_transaction_commit();
2111}
2112
2113static void memory_region_readd_subregion(MemoryRegion *mr)
2114{
2115    MemoryRegion *container = mr->container;
2116
2117    if (container) {
2118        memory_region_transaction_begin();
2119        memory_region_ref(mr);
2120        memory_region_del_subregion(container, mr);
2121        mr->container = container;
2122        memory_region_update_container_subregions(mr);
2123        memory_region_unref(mr);
2124        memory_region_transaction_commit();
2125    }
2126}
2127
2128void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2129{
2130    if (addr != mr->addr) {
2131        mr->addr = addr;
2132        memory_region_readd_subregion(mr);
2133    }
2134}
2135
2136void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2137{
2138    assert(mr->alias);
2139
2140    if (offset == mr->alias_offset) {
2141        return;
2142    }
2143
2144    memory_region_transaction_begin();
2145    mr->alias_offset = offset;
2146    memory_region_update_pending |= mr->enabled;
2147    memory_region_transaction_commit();
2148}
2149
2150uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2151{
2152    return mr->align;
2153}
2154
2155static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2156{
2157    const AddrRange *addr = addr_;
2158    const FlatRange *fr = fr_;
2159
2160    if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2161        return -1;
2162    } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2163        return 1;
2164    }
2165    return 0;
2166}
2167
2168static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2169{
2170    return bsearch(&addr, view->ranges, view->nr,
2171                   sizeof(FlatRange), cmp_flatrange_addr);
2172}
2173
2174bool memory_region_is_mapped(MemoryRegion *mr)
2175{
2176    return mr->container ? true : false;
2177}
2178
2179/* Same as memory_region_find, but it does not add a reference to the
2180 * returned region.  It must be called from an RCU critical section.
2181 */
2182static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2183                                                  hwaddr addr, uint64_t size)
2184{
2185    MemoryRegionSection ret = { .mr = NULL };
2186    MemoryRegion *root;
2187    AddressSpace *as;
2188    AddrRange range;
2189    FlatView *view;
2190    FlatRange *fr;
2191
2192    addr += mr->addr;
2193    for (root = mr; root->container; ) {
2194        root = root->container;
2195        addr += root->addr;
2196    }
2197
2198    as = memory_region_to_address_space(root);
2199    if (!as) {
2200        return ret;
2201    }
2202    range = addrrange_make(int128_make64(addr), int128_make64(size));
2203
2204    view = atomic_rcu_read(&as->current_map);
2205    fr = flatview_lookup(view, range);
2206    if (!fr) {
2207        return ret;
2208    }
2209
2210    while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2211        --fr;
2212    }
2213
2214    ret.mr = fr->mr;
2215    ret.address_space = as;
2216    range = addrrange_intersection(range, fr->addr);
2217    ret.offset_within_region = fr->offset_in_region;
2218    ret.offset_within_region += int128_get64(int128_sub(range.start,
2219                                                        fr->addr.start));
2220    ret.size = range.size;
2221    ret.offset_within_address_space = int128_get64(range.start);
2222    ret.readonly = fr->readonly;
2223    return ret;
2224}
2225
2226MemoryRegionSection memory_region_find(MemoryRegion *mr,
2227                                       hwaddr addr, uint64_t size)
2228{
2229    MemoryRegionSection ret;
2230    rcu_read_lock();
2231    ret = memory_region_find_rcu(mr, addr, size);
2232    if (ret.mr) {
2233        memory_region_ref(ret.mr);
2234    }
2235    rcu_read_unlock();
2236    return ret;
2237}
2238
2239bool memory_region_present(MemoryRegion *container, hwaddr addr)
2240{
2241    MemoryRegion *mr;
2242
2243    rcu_read_lock();
2244    mr = memory_region_find_rcu(container, addr, 1).mr;
2245    rcu_read_unlock();
2246    return mr && mr != container;
2247}
2248
2249void memory_global_dirty_log_sync(void)
2250{
2251    MemoryListener *listener;
2252    AddressSpace *as;
2253    FlatView *view;
2254    FlatRange *fr;
2255
2256    QTAILQ_FOREACH(listener, &memory_listeners, link) {
2257        if (!listener->log_sync) {
2258            continue;
2259        }
2260        as = listener->address_space;
2261        view = address_space_get_flatview(as);
2262        FOR_EACH_FLAT_RANGE(fr, view) {
2263            if (fr->dirty_log_mask) {
2264                MemoryRegionSection mrs = section_from_flat_range(fr, as);
2265                listener->log_sync(listener, &mrs);
2266            }
2267        }
2268        flatview_unref(view);
2269    }
2270}
2271
2272void memory_global_dirty_log_start(void)
2273{
2274    global_dirty_log = true;
2275
2276    MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2277
2278    /* Refresh DIRTY_LOG_MIGRATION bit.  */
2279    memory_region_transaction_begin();
2280    memory_region_update_pending = true;
2281    memory_region_transaction_commit();
2282}
2283
2284void memory_global_dirty_log_stop(void)
2285{
2286    global_dirty_log = false;
2287
2288    /* Refresh DIRTY_LOG_MIGRATION bit.  */
2289    memory_region_transaction_begin();
2290    memory_region_update_pending = true;
2291    memory_region_transaction_commit();
2292
2293    MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2294}
2295
2296static void listener_add_address_space(MemoryListener *listener,
2297                                       AddressSpace *as)
2298{
2299    FlatView *view;
2300    FlatRange *fr;
2301
2302    if (listener->begin) {
2303        listener->begin(listener);
2304    }
2305    if (global_dirty_log) {
2306        if (listener->log_global_start) {
2307            listener->log_global_start(listener);
2308        }
2309    }
2310
2311    view = address_space_get_flatview(as);
2312    FOR_EACH_FLAT_RANGE(fr, view) {
2313        MemoryRegionSection section = {
2314            .mr = fr->mr,
2315            .address_space = as,
2316            .offset_within_region = fr->offset_in_region,
2317            .size = fr->addr.size,
2318            .offset_within_address_space = int128_get64(fr->addr.start),
2319            .readonly = fr->readonly,
2320        };
2321        if (fr->dirty_log_mask && listener->log_start) {
2322            listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2323        }
2324        if (listener->region_add) {
2325            listener->region_add(listener, &section);
2326        }
2327    }
2328    if (listener->commit) {
2329        listener->commit(listener);
2330    }
2331    flatview_unref(view);
2332}
2333
2334void memory_listener_register(MemoryListener *listener, AddressSpace *as)
2335{
2336    MemoryListener *other = NULL;
2337
2338    listener->address_space = as;
2339    if (QTAILQ_EMPTY(&memory_listeners)
2340        || listener->priority >= QTAILQ_LAST(&memory_listeners,
2341                                             memory_listeners)->priority) {
2342        QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2343    } else {
2344        QTAILQ_FOREACH(other, &memory_listeners, link) {
2345            if (listener->priority < other->priority) {
2346                break;
2347            }
2348        }
2349        QTAILQ_INSERT_BEFORE(other, listener, link);
2350    }
2351
2352    if (QTAILQ_EMPTY(&as->listeners)
2353        || listener->priority >= QTAILQ_LAST(&as->listeners,
2354                                             memory_listeners)->priority) {
2355        QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
2356    } else {
2357        QTAILQ_FOREACH(other, &as->listeners, link_as) {
2358            if (listener->priority < other->priority) {
2359                break;
2360            }
2361        }
2362        QTAILQ_INSERT_BEFORE(other, listener, link_as);
2363    }
2364
2365    listener_add_address_space(listener, as);
2366}
2367
2368void memory_listener_unregister(MemoryListener *listener)
2369{
2370    if (!listener->address_space) {
2371        return;
2372    }
2373
2374    QTAILQ_REMOVE(&memory_listeners, listener, link);
2375    QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
2376    listener->address_space = NULL;
2377}
2378
2379void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2380{
2381    memory_region_ref(root);
2382    memory_region_transaction_begin();
2383    as->ref_count = 1;
2384    as->root = root;
2385    as->malloced = false;
2386    as->current_map = g_new(FlatView, 1);
2387    flatview_init(as->current_map);
2388    as->ioeventfd_nb = 0;
2389    as->ioeventfds = NULL;
2390    QTAILQ_INIT(&as->listeners);
2391    QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2392    as->name = g_strdup(name ? name : "anonymous");
2393    address_space_init_dispatch(as);
2394    memory_region_update_pending |= root->enabled;
2395    memory_region_transaction_commit();
2396}
2397
2398static void do_address_space_destroy(AddressSpace *as)
2399{
2400    bool do_free = as->malloced;
2401
2402    address_space_destroy_dispatch(as);
2403    assert(QTAILQ_EMPTY(&as->listeners));
2404
2405    flatview_unref(as->current_map);
2406    g_free(as->name);
2407    g_free(as->ioeventfds);
2408    memory_region_unref(as->root);
2409    if (do_free) {
2410        g_free(as);
2411    }
2412}
2413
2414AddressSpace *address_space_init_shareable(MemoryRegion *root, const char *name)
2415{
2416    AddressSpace *as;
2417
2418    QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2419        if (root == as->root && as->malloced) {
2420            as->ref_count++;
2421            return as;
2422        }
2423    }
2424
2425    as = g_malloc0(sizeof *as);
2426    address_space_init(as, root, name);
2427    as->malloced = true;
2428    return as;
2429}
2430
2431void address_space_destroy(AddressSpace *as)
2432{
2433    MemoryRegion *root = as->root;
2434
2435    as->ref_count--;
2436    if (as->ref_count) {
2437        return;
2438    }
2439    /* Flush out anything from MemoryListeners listening in on this */
2440    memory_region_transaction_begin();
2441    as->root = NULL;
2442    memory_region_transaction_commit();
2443    QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2444    address_space_unregister(as);
2445
2446    /* At this point, as->dispatch and as->current_map are dummy
2447     * entries that the guest should never use.  Wait for the old
2448     * values to expire before freeing the data.
2449     */
2450    as->root = root;
2451    call_rcu(as, do_address_space_destroy, rcu);
2452}
2453
2454static const char *memory_region_type(MemoryRegion *mr)
2455{
2456    if (memory_region_is_ram_device(mr)) {
2457        return "ramd";
2458    } else if (memory_region_is_romd(mr)) {
2459        return "romd";
2460    } else if (memory_region_is_rom(mr)) {
2461        return "rom";
2462    } else if (memory_region_is_ram(mr)) {
2463        return "ram";
2464    } else {
2465        return "i/o";
2466    }
2467}
2468
2469typedef struct MemoryRegionList MemoryRegionList;
2470
2471struct MemoryRegionList {
2472    const MemoryRegion *mr;
2473    QTAILQ_ENTRY(MemoryRegionList) queue;
2474};
2475
2476typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
2477
2478#define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
2479                           int128_sub((size), int128_one())) : 0)
2480#define MTREE_INDENT "  "
2481
2482static void mtree_print_mr(fprintf_function mon_printf, void *f,
2483                           const MemoryRegion *mr, unsigned int level,
2484                           hwaddr base,
2485                           MemoryRegionListHead *alias_print_queue)
2486{
2487    MemoryRegionList *new_ml, *ml, *next_ml;
2488    MemoryRegionListHead submr_print_queue;
2489    const MemoryRegion *submr;
2490    unsigned int i;
2491    hwaddr cur_start, cur_end;
2492
2493    if (!mr) {
2494        return;
2495    }
2496
2497    for (i = 0; i < level; i++) {
2498        mon_printf(f, MTREE_INDENT);
2499    }
2500
2501    cur_start = base + mr->addr;
2502    cur_end = cur_start + MR_SIZE(mr->size);
2503
2504    /*
2505     * Try to detect overflow of memory region. This should never
2506     * happen normally. When it happens, we dump something to warn the
2507     * user who is observing this.
2508     */
2509    if (cur_start < base || cur_end < cur_start) {
2510        mon_printf(f, "[DETECTED OVERFLOW!] ");
2511    }
2512
2513    if (mr->alias) {
2514        MemoryRegionList *ml;
2515        bool found = false;
2516
2517        /* check if the alias is already in the queue */
2518        QTAILQ_FOREACH(ml, alias_print_queue, queue) {
2519            if (ml->mr == mr->alias) {
2520                found = true;
2521            }
2522        }
2523
2524        if (!found) {
2525            ml = g_new(MemoryRegionList, 1);
2526            ml->mr = mr->alias;
2527            QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
2528        }
2529        mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2530                   " (prio %d, %s): alias %s @%s " TARGET_FMT_plx
2531                   "-" TARGET_FMT_plx "%s\n",
2532                   cur_start, cur_end,
2533                   mr->priority,
2534                   memory_region_type((MemoryRegion *)mr),
2535                   memory_region_name(mr),
2536                   memory_region_name(mr->alias),
2537                   mr->alias_offset,
2538                   mr->alias_offset + MR_SIZE(mr->size),
2539                   mr->enabled ? "" : " [disabled]");
2540    } else {
2541        mon_printf(f,
2542                   TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %s): %s%s\n",
2543                   cur_start, cur_end,
2544                   mr->priority,
2545                   memory_region_type((MemoryRegion *)mr),
2546                   memory_region_name(mr),
2547                   mr->enabled ? "" : " [disabled]");
2548    }
2549
2550    QTAILQ_INIT(&submr_print_queue);
2551
2552    QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2553        new_ml = g_new(MemoryRegionList, 1);
2554        new_ml->mr = submr;
2555        QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2556            if (new_ml->mr->addr < ml->mr->addr ||
2557                (new_ml->mr->addr == ml->mr->addr &&
2558                 new_ml->mr->priority > ml->mr->priority)) {
2559                QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2560                new_ml = NULL;
2561                break;
2562            }
2563        }
2564        if (new_ml) {
2565            QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2566        }
2567    }
2568
2569    QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2570        mtree_print_mr(mon_printf, f, ml->mr, level + 1, cur_start,
2571                       alias_print_queue);
2572    }
2573
2574    QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
2575        g_free(ml);
2576    }
2577}
2578
2579static void mtree_print_flatview(fprintf_function p, void *f,
2580                                 AddressSpace *as)
2581{
2582    FlatView *view = address_space_get_flatview(as);
2583    FlatRange *range = &view->ranges[0];
2584    MemoryRegion *mr;
2585    int n = view->nr;
2586
2587    if (n <= 0) {
2588        p(f, MTREE_INDENT "No rendered FlatView for "
2589          "address space '%s'\n", as->name);
2590        flatview_unref(view);
2591        return;
2592    }
2593
2594    while (n--) {
2595        mr = range->mr;
2596        if (range->offset_in_region) {
2597            p(f, MTREE_INDENT TARGET_FMT_plx "-"
2598              TARGET_FMT_plx " (prio %d, %s): %s @" TARGET_FMT_plx "\n",
2599              int128_get64(range->addr.start),
2600              int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
2601              mr->priority,
2602              range->readonly ? "rom" : memory_region_type(mr),
2603              memory_region_name(mr),
2604              range->offset_in_region);
2605        } else {
2606            p(f, MTREE_INDENT TARGET_FMT_plx "-"
2607              TARGET_FMT_plx " (prio %d, %s): %s\n",
2608              int128_get64(range->addr.start),
2609              int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
2610              mr->priority,
2611              range->readonly ? "rom" : memory_region_type(mr),
2612              memory_region_name(mr));
2613        }
2614        range++;
2615    }
2616
2617    flatview_unref(view);
2618}
2619
2620void mtree_info(fprintf_function mon_printf, void *f, bool flatview)
2621{
2622    MemoryRegionListHead ml_head;
2623    MemoryRegionList *ml, *ml2;
2624    AddressSpace *as;
2625
2626    if (flatview) {
2627        QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2628            mon_printf(f, "address-space (flat view): %s\n", as->name);
2629            mtree_print_flatview(mon_printf, f, as);
2630            mon_printf(f, "\n");
2631        }
2632        return;
2633    }
2634
2635    QTAILQ_INIT(&ml_head);
2636
2637    QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2638        mon_printf(f, "address-space: %s\n", as->name);
2639        mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
2640        mon_printf(f, "\n");
2641    }
2642
2643    /* print aliased regions */
2644    QTAILQ_FOREACH(ml, &ml_head, queue) {
2645        mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
2646        mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
2647        mon_printf(f, "\n");
2648    }
2649
2650    QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
2651        g_free(ml);
2652    }
2653}
2654
2655static const TypeInfo memory_region_info = {
2656    .parent             = TYPE_OBJECT,
2657    .name               = TYPE_MEMORY_REGION,
2658    .instance_size      = sizeof(MemoryRegion),
2659    .instance_init      = memory_region_initfn,
2660    .instance_finalize  = memory_region_finalize,
2661};
2662
2663static void memory_register_types(void)
2664{
2665    type_register_static(&memory_region_info);
2666}
2667
2668type_init(memory_register_types)
2669