qemu/memory.c
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   1/*
   2 * Physical memory management
   3 *
   4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
   5 *
   6 * Authors:
   7 *  Avi Kivity <avi@redhat.com>
   8 *
   9 * This work is licensed under the terms of the GNU GPL, version 2.  See
  10 * the COPYING file in the top-level directory.
  11 *
  12 * Contributions after 2012-01-13 are licensed under the terms of the
  13 * GNU GPL, version 2 or (at your option) any later version.
  14 */
  15
  16#include "qemu/osdep.h"
  17#include "qapi/error.h"
  18#include "qemu-common.h"
  19#include "cpu.h"
  20#include "exec/memory.h"
  21#include "exec/address-spaces.h"
  22#include "qapi/visitor.h"
  23#include "qemu/bitops.h"
  24#include "qemu/error-report.h"
  25#include "qom/object.h"
  26#include "trace-root.h"
  27
  28#include "exec/memory-internal.h"
  29#include "exec/ram_addr.h"
  30#include "sysemu/kvm.h"
  31#include "sysemu/sysemu.h"
  32#include "hw/misc/mmio_interface.h"
  33#include "hw/qdev-properties.h"
  34#include "migration/vmstate.h"
  35
  36//#define DEBUG_UNASSIGNED
  37
  38static unsigned memory_region_transaction_depth;
  39static bool memory_region_update_pending;
  40static bool ioeventfd_update_pending;
  41static bool global_dirty_log = false;
  42
  43static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
  44    = QTAILQ_HEAD_INITIALIZER(memory_listeners);
  45
  46static QTAILQ_HEAD(, AddressSpace) address_spaces
  47    = QTAILQ_HEAD_INITIALIZER(address_spaces);
  48
  49static GHashTable *flat_views;
  50
  51typedef struct AddrRange AddrRange;
  52
  53/*
  54 * Note that signed integers are needed for negative offsetting in aliases
  55 * (large MemoryRegion::alias_offset).
  56 */
  57struct AddrRange {
  58    Int128 start;
  59    Int128 size;
  60};
  61
  62static AddrRange addrrange_make(Int128 start, Int128 size)
  63{
  64    return (AddrRange) { start, size };
  65}
  66
  67static bool addrrange_equal(AddrRange r1, AddrRange r2)
  68{
  69    return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
  70}
  71
  72static Int128 addrrange_end(AddrRange r)
  73{
  74    return int128_add(r.start, r.size);
  75}
  76
  77static AddrRange addrrange_shift(AddrRange range, Int128 delta)
  78{
  79    int128_addto(&range.start, delta);
  80    return range;
  81}
  82
  83static bool addrrange_contains(AddrRange range, Int128 addr)
  84{
  85    return int128_ge(addr, range.start)
  86        && int128_lt(addr, addrrange_end(range));
  87}
  88
  89static bool addrrange_intersects(AddrRange r1, AddrRange r2)
  90{
  91    return addrrange_contains(r1, r2.start)
  92        || addrrange_contains(r2, r1.start);
  93}
  94
  95static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
  96{
  97    Int128 start = int128_max(r1.start, r2.start);
  98    Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
  99    return addrrange_make(start, int128_sub(end, start));
 100}
 101
 102enum ListenerDirection { Forward, Reverse };
 103
 104#define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...)    \
 105    do {                                                                \
 106        MemoryListener *_listener;                                      \
 107                                                                        \
 108        switch (_direction) {                                           \
 109        case Forward:                                                   \
 110            QTAILQ_FOREACH(_listener, &memory_listeners, link) {        \
 111                if (_listener->_callback) {                             \
 112                    _listener->_callback(_listener, ##_args);           \
 113                }                                                       \
 114            }                                                           \
 115            break;                                                      \
 116        case Reverse:                                                   \
 117            QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners,        \
 118                                   memory_listeners, link) {            \
 119                if (_listener->_callback) {                             \
 120                    _listener->_callback(_listener, ##_args);           \
 121                }                                                       \
 122            }                                                           \
 123            break;                                                      \
 124        default:                                                        \
 125            abort();                                                    \
 126        }                                                               \
 127    } while (0)
 128
 129#define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
 130    do {                                                                \
 131        MemoryListener *_listener;                                      \
 132        struct memory_listeners_as *list = &(_as)->listeners;           \
 133                                                                        \
 134        switch (_direction) {                                           \
 135        case Forward:                                                   \
 136            QTAILQ_FOREACH(_listener, list, link_as) {                  \
 137                if (_listener->_callback) {                             \
 138                    _listener->_callback(_listener, _section, ##_args); \
 139                }                                                       \
 140            }                                                           \
 141            break;                                                      \
 142        case Reverse:                                                   \
 143            QTAILQ_FOREACH_REVERSE(_listener, list, memory_listeners_as, \
 144                                   link_as) {                           \
 145                if (_listener->_callback) {                             \
 146                    _listener->_callback(_listener, _section, ##_args); \
 147                }                                                       \
 148            }                                                           \
 149            break;                                                      \
 150        default:                                                        \
 151            abort();                                                    \
 152        }                                                               \
 153    } while (0)
 154
 155/* No need to ref/unref .mr, the FlatRange keeps it alive.  */
 156#define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...)  \
 157    do {                                                                \
 158        MemoryRegionSection mrs = section_from_flat_range(fr,           \
 159                address_space_to_flatview(as));                         \
 160        MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args);         \
 161    } while(0)
 162
 163struct CoalescedMemoryRange {
 164    AddrRange addr;
 165    QTAILQ_ENTRY(CoalescedMemoryRange) link;
 166};
 167
 168struct MemoryRegionIoeventfd {
 169    AddrRange addr;
 170    bool match_data;
 171    uint64_t data;
 172    EventNotifier *e;
 173};
 174
 175static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd *a,
 176                                           MemoryRegionIoeventfd *b)
 177{
 178    if (int128_lt(a->addr.start, b->addr.start)) {
 179        return true;
 180    } else if (int128_gt(a->addr.start, b->addr.start)) {
 181        return false;
 182    } else if (int128_lt(a->addr.size, b->addr.size)) {
 183        return true;
 184    } else if (int128_gt(a->addr.size, b->addr.size)) {
 185        return false;
 186    } else if (a->match_data < b->match_data) {
 187        return true;
 188    } else  if (a->match_data > b->match_data) {
 189        return false;
 190    } else if (a->match_data) {
 191        if (a->data < b->data) {
 192            return true;
 193        } else if (a->data > b->data) {
 194            return false;
 195        }
 196    }
 197    if (a->e < b->e) {
 198        return true;
 199    } else if (a->e > b->e) {
 200        return false;
 201    }
 202    return false;
 203}
 204
 205static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd *a,
 206                                          MemoryRegionIoeventfd *b)
 207{
 208    return !memory_region_ioeventfd_before(a, b)
 209        && !memory_region_ioeventfd_before(b, a);
 210}
 211
 212/* Range of memory in the global map.  Addresses are absolute. */
 213struct FlatRange {
 214    MemoryRegion *mr;
 215    hwaddr offset_in_region;
 216    AddrRange addr;
 217    uint8_t dirty_log_mask;
 218    bool romd_mode;
 219    bool readonly;
 220};
 221
 222#define FOR_EACH_FLAT_RANGE(var, view)          \
 223    for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
 224
 225static inline MemoryRegionSection
 226section_from_flat_range(FlatRange *fr, FlatView *fv)
 227{
 228    return (MemoryRegionSection) {
 229        .mr = fr->mr,
 230        .fv = fv,
 231        .offset_within_region = fr->offset_in_region,
 232        .size = fr->addr.size,
 233        .offset_within_address_space = int128_get64(fr->addr.start),
 234        .readonly = fr->readonly,
 235    };
 236}
 237
 238static bool flatrange_equal(FlatRange *a, FlatRange *b)
 239{
 240    return a->mr == b->mr
 241        && addrrange_equal(a->addr, b->addr)
 242        && a->offset_in_region == b->offset_in_region
 243        && a->romd_mode == b->romd_mode
 244        && a->readonly == b->readonly;
 245}
 246
 247static FlatView *flatview_new(MemoryRegion *mr_root)
 248{
 249    FlatView *view;
 250
 251    view = g_new0(FlatView, 1);
 252    view->ref = 1;
 253    view->root = mr_root;
 254    memory_region_ref(mr_root);
 255    trace_flatview_new(view, mr_root);
 256
 257    return view;
 258}
 259
 260/* Insert a range into a given position.  Caller is responsible for maintaining
 261 * sorting order.
 262 */
 263static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
 264{
 265    if (view->nr == view->nr_allocated) {
 266        view->nr_allocated = MAX(2 * view->nr, 10);
 267        view->ranges = g_realloc(view->ranges,
 268                                    view->nr_allocated * sizeof(*view->ranges));
 269    }
 270    memmove(view->ranges + pos + 1, view->ranges + pos,
 271            (view->nr - pos) * sizeof(FlatRange));
 272    view->ranges[pos] = *range;
 273    memory_region_ref(range->mr);
 274    ++view->nr;
 275}
 276
 277static void flatview_destroy(FlatView *view)
 278{
 279    int i;
 280
 281    trace_flatview_destroy(view, view->root);
 282    if (view->dispatch) {
 283        address_space_dispatch_free(view->dispatch);
 284    }
 285    for (i = 0; i < view->nr; i++) {
 286        memory_region_unref(view->ranges[i].mr);
 287    }
 288    g_free(view->ranges);
 289    memory_region_unref(view->root);
 290    g_free(view);
 291}
 292
 293static bool flatview_ref(FlatView *view)
 294{
 295    return atomic_fetch_inc_nonzero(&view->ref) > 0;
 296}
 297
 298void flatview_unref(FlatView *view)
 299{
 300    if (atomic_fetch_dec(&view->ref) == 1) {
 301        trace_flatview_destroy_rcu(view, view->root);
 302        assert(view->root);
 303        call_rcu(view, flatview_destroy, rcu);
 304    }
 305}
 306
 307static bool can_merge(FlatRange *r1, FlatRange *r2)
 308{
 309    return int128_eq(addrrange_end(r1->addr), r2->addr.start)
 310        && r1->mr == r2->mr
 311        && int128_eq(int128_add(int128_make64(r1->offset_in_region),
 312                                r1->addr.size),
 313                     int128_make64(r2->offset_in_region))
 314        && r1->dirty_log_mask == r2->dirty_log_mask
 315        && r1->romd_mode == r2->romd_mode
 316        && r1->readonly == r2->readonly;
 317}
 318
 319/* Attempt to simplify a view by merging adjacent ranges */
 320static void flatview_simplify(FlatView *view)
 321{
 322    unsigned i, j;
 323
 324    i = 0;
 325    while (i < view->nr) {
 326        j = i + 1;
 327        while (j < view->nr
 328               && can_merge(&view->ranges[j-1], &view->ranges[j])) {
 329            int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
 330            ++j;
 331        }
 332        ++i;
 333        memmove(&view->ranges[i], &view->ranges[j],
 334                (view->nr - j) * sizeof(view->ranges[j]));
 335        view->nr -= j - i;
 336    }
 337}
 338
 339static bool memory_region_big_endian(MemoryRegion *mr)
 340{
 341#ifdef TARGET_WORDS_BIGENDIAN
 342    return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
 343#else
 344    return mr->ops->endianness == DEVICE_BIG_ENDIAN;
 345#endif
 346}
 347
 348static bool memory_region_wrong_endianness(MemoryRegion *mr)
 349{
 350#ifdef TARGET_WORDS_BIGENDIAN
 351    return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
 352#else
 353    return mr->ops->endianness == DEVICE_BIG_ENDIAN;
 354#endif
 355}
 356
 357static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
 358{
 359    if (memory_region_wrong_endianness(mr)) {
 360        switch (size) {
 361        case 1:
 362            break;
 363        case 2:
 364            *data = bswap16(*data);
 365            break;
 366        case 4:
 367            *data = bswap32(*data);
 368            break;
 369        case 8:
 370            *data = bswap64(*data);
 371            break;
 372        default:
 373            abort();
 374        }
 375    }
 376}
 377
 378static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
 379{
 380    MemoryRegion *root;
 381    hwaddr abs_addr = offset;
 382
 383    abs_addr += mr->addr;
 384    for (root = mr; root->container; ) {
 385        root = root->container;
 386        abs_addr += root->addr;
 387    }
 388
 389    return abs_addr;
 390}
 391
 392static int get_cpu_index(void)
 393{
 394    if (current_cpu) {
 395        return current_cpu->cpu_index;
 396    }
 397    return -1;
 398}
 399
 400static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
 401                                                       hwaddr addr,
 402                                                       uint64_t *value,
 403                                                       unsigned size,
 404                                                       unsigned shift,
 405                                                       uint64_t mask,
 406                                                       MemTxAttrs attrs)
 407{
 408    uint64_t tmp;
 409
 410    tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
 411    if (mr->subpage) {
 412        trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
 413    } else if (mr == &io_mem_notdirty) {
 414        /* Accesses to code which has previously been translated into a TB show
 415         * up in the MMIO path, as accesses to the io_mem_notdirty
 416         * MemoryRegion. */
 417        trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
 418    } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
 419        hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
 420        trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
 421    }
 422    *value |= (tmp & mask) << shift;
 423    return MEMTX_OK;
 424}
 425
 426static MemTxResult  memory_region_read_accessor(MemoryRegion *mr,
 427                                                hwaddr addr,
 428                                                uint64_t *value,
 429                                                unsigned size,
 430                                                unsigned shift,
 431                                                uint64_t mask,
 432                                                MemTxAttrs attrs)
 433{
 434    uint64_t tmp;
 435
 436    tmp = mr->ops->read(mr->opaque, addr, size);
 437    if (mr->subpage) {
 438        trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
 439    } else if (mr == &io_mem_notdirty) {
 440        /* Accesses to code which has previously been translated into a TB show
 441         * up in the MMIO path, as accesses to the io_mem_notdirty
 442         * MemoryRegion. */
 443        trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
 444    } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
 445        hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
 446        trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
 447    }
 448    *value |= (tmp & mask) << shift;
 449    return MEMTX_OK;
 450}
 451
 452static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
 453                                                          hwaddr addr,
 454                                                          uint64_t *value,
 455                                                          unsigned size,
 456                                                          unsigned shift,
 457                                                          uint64_t mask,
 458                                                          MemTxAttrs attrs)
 459{
 460    uint64_t tmp = 0;
 461    MemTxResult r;
 462
 463    r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
 464    if (mr->subpage) {
 465        trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
 466    } else if (mr == &io_mem_notdirty) {
 467        /* Accesses to code which has previously been translated into a TB show
 468         * up in the MMIO path, as accesses to the io_mem_notdirty
 469         * MemoryRegion. */
 470        trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
 471    } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
 472        hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
 473        trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
 474    }
 475    *value |= (tmp & mask) << shift;
 476    return r;
 477}
 478
 479static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
 480                                                        hwaddr addr,
 481                                                        uint64_t *value,
 482                                                        unsigned size,
 483                                                        unsigned shift,
 484                                                        uint64_t mask,
 485                                                        MemTxAttrs attrs)
 486{
 487    uint64_t tmp;
 488
 489    tmp = (*value >> shift) & mask;
 490    if (mr->subpage) {
 491        trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
 492    } else if (mr == &io_mem_notdirty) {
 493        /* Accesses to code which has previously been translated into a TB show
 494         * up in the MMIO path, as accesses to the io_mem_notdirty
 495         * MemoryRegion. */
 496        trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
 497    } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
 498        hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
 499        trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
 500    }
 501    mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
 502    return MEMTX_OK;
 503}
 504
 505static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
 506                                                hwaddr addr,
 507                                                uint64_t *value,
 508                                                unsigned size,
 509                                                unsigned shift,
 510                                                uint64_t mask,
 511                                                MemTxAttrs attrs)
 512{
 513    uint64_t tmp;
 514
 515    tmp = (*value >> shift) & mask;
 516    if (mr->subpage) {
 517        trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
 518    } else if (mr == &io_mem_notdirty) {
 519        /* Accesses to code which has previously been translated into a TB show
 520         * up in the MMIO path, as accesses to the io_mem_notdirty
 521         * MemoryRegion. */
 522        trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
 523    } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
 524        hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
 525        trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
 526    }
 527    mr->ops->write(mr->opaque, addr, tmp, size);
 528    return MEMTX_OK;
 529}
 530
 531static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
 532                                                           hwaddr addr,
 533                                                           uint64_t *value,
 534                                                           unsigned size,
 535                                                           unsigned shift,
 536                                                           uint64_t mask,
 537                                                           MemTxAttrs attrs)
 538{
 539    uint64_t tmp;
 540
 541    tmp = (*value >> shift) & mask;
 542    if (mr->subpage) {
 543        trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
 544    } else if (mr == &io_mem_notdirty) {
 545        /* Accesses to code which has previously been translated into a TB show
 546         * up in the MMIO path, as accesses to the io_mem_notdirty
 547         * MemoryRegion. */
 548        trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
 549    } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
 550        hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
 551        trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
 552    }
 553    return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
 554}
 555
 556static MemTxResult access_with_adjusted_size(hwaddr addr,
 557                                      uint64_t *value,
 558                                      unsigned size,
 559                                      unsigned access_size_min,
 560                                      unsigned access_size_max,
 561                                      MemTxResult (*access_fn)
 562                                                  (MemoryRegion *mr,
 563                                                   hwaddr addr,
 564                                                   uint64_t *value,
 565                                                   unsigned size,
 566                                                   unsigned shift,
 567                                                   uint64_t mask,
 568                                                   MemTxAttrs attrs),
 569                                      MemoryRegion *mr,
 570                                      MemTxAttrs attrs)
 571{
 572    uint64_t access_mask;
 573    unsigned access_size;
 574    unsigned i;
 575    MemTxResult r = MEMTX_OK;
 576
 577    if (!access_size_min) {
 578        access_size_min = 1;
 579    }
 580    if (!access_size_max) {
 581        access_size_max = 4;
 582    }
 583
 584    /* FIXME: support unaligned access? */
 585    access_size = MAX(MIN(size, access_size_max), access_size_min);
 586    access_mask = -1ULL >> (64 - access_size * 8);
 587    if (memory_region_big_endian(mr)) {
 588        for (i = 0; i < size; i += access_size) {
 589            r |= access_fn(mr, addr + i, value, access_size,
 590                        (size - access_size - i) * 8, access_mask, attrs);
 591        }
 592    } else {
 593        for (i = 0; i < size; i += access_size) {
 594            r |= access_fn(mr, addr + i, value, access_size, i * 8,
 595                        access_mask, attrs);
 596        }
 597    }
 598    return r;
 599}
 600
 601static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
 602{
 603    AddressSpace *as;
 604
 605    while (mr->container) {
 606        mr = mr->container;
 607    }
 608    QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
 609        if (mr == as->root) {
 610            return as;
 611        }
 612    }
 613    return NULL;
 614}
 615
 616/* Render a memory region into the global view.  Ranges in @view obscure
 617 * ranges in @mr.
 618 */
 619static void render_memory_region(FlatView *view,
 620                                 MemoryRegion *mr,
 621                                 Int128 base,
 622                                 AddrRange clip,
 623                                 bool readonly)
 624{
 625    MemoryRegion *subregion;
 626    unsigned i;
 627    hwaddr offset_in_region;
 628    Int128 remain;
 629    Int128 now;
 630    FlatRange fr;
 631    AddrRange tmp;
 632
 633    if (!mr->enabled) {
 634        return;
 635    }
 636
 637    int128_addto(&base, int128_make64(mr->addr));
 638    readonly |= mr->readonly;
 639
 640    tmp = addrrange_make(base, mr->size);
 641
 642    if (!addrrange_intersects(tmp, clip)) {
 643        return;
 644    }
 645
 646    clip = addrrange_intersection(tmp, clip);
 647
 648    if (mr->alias) {
 649        int128_subfrom(&base, int128_make64(mr->alias->addr));
 650        int128_subfrom(&base, int128_make64(mr->alias_offset));
 651        render_memory_region(view, mr->alias, base, clip, readonly);
 652        return;
 653    }
 654
 655    /* Render subregions in priority order. */
 656    QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
 657        render_memory_region(view, subregion, base, clip, readonly);
 658    }
 659
 660    if (!mr->terminates) {
 661        return;
 662    }
 663
 664    offset_in_region = int128_get64(int128_sub(clip.start, base));
 665    base = clip.start;
 666    remain = clip.size;
 667
 668    fr.mr = mr;
 669    fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
 670    fr.romd_mode = mr->romd_mode;
 671    fr.readonly = readonly;
 672
 673    /* Render the region itself into any gaps left by the current view. */
 674    for (i = 0; i < view->nr && int128_nz(remain); ++i) {
 675        if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
 676            continue;
 677        }
 678        if (int128_lt(base, view->ranges[i].addr.start)) {
 679            now = int128_min(remain,
 680                             int128_sub(view->ranges[i].addr.start, base));
 681            fr.offset_in_region = offset_in_region;
 682            fr.addr = addrrange_make(base, now);
 683            flatview_insert(view, i, &fr);
 684            ++i;
 685            int128_addto(&base, now);
 686            offset_in_region += int128_get64(now);
 687            int128_subfrom(&remain, now);
 688        }
 689        now = int128_sub(int128_min(int128_add(base, remain),
 690                                    addrrange_end(view->ranges[i].addr)),
 691                         base);
 692        int128_addto(&base, now);
 693        offset_in_region += int128_get64(now);
 694        int128_subfrom(&remain, now);
 695    }
 696    if (int128_nz(remain)) {
 697        fr.offset_in_region = offset_in_region;
 698        fr.addr = addrrange_make(base, remain);
 699        flatview_insert(view, i, &fr);
 700    }
 701}
 702
 703static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr)
 704{
 705    while (mr->enabled) {
 706        if (mr->alias) {
 707            if (!mr->alias_offset && int128_ge(mr->size, mr->alias->size)) {
 708                /* The alias is included in its entirety.  Use it as
 709                 * the "real" root, so that we can share more FlatViews.
 710                 */
 711                mr = mr->alias;
 712                continue;
 713            }
 714        } else if (!mr->terminates) {
 715            unsigned int found = 0;
 716            MemoryRegion *child, *next = NULL;
 717            QTAILQ_FOREACH(child, &mr->subregions, subregions_link) {
 718                if (child->enabled) {
 719                    if (++found > 1) {
 720                        next = NULL;
 721                        break;
 722                    }
 723                    if (!child->addr && int128_ge(mr->size, child->size)) {
 724                        /* A child is included in its entirety.  If it's the only
 725                         * enabled one, use it in the hope of finding an alias down the
 726                         * way. This will also let us share FlatViews.
 727                         */
 728                        next = child;
 729                    }
 730                }
 731            }
 732            if (found == 0) {
 733                return NULL;
 734            }
 735            if (next) {
 736                mr = next;
 737                continue;
 738            }
 739        }
 740
 741        return mr;
 742    }
 743
 744    return NULL;
 745}
 746
 747/* Render a memory topology into a list of disjoint absolute ranges. */
 748static FlatView *generate_memory_topology(MemoryRegion *mr)
 749{
 750    int i;
 751    FlatView *view;
 752
 753    view = flatview_new(mr);
 754
 755    if (mr) {
 756        render_memory_region(view, mr, int128_zero(),
 757                             addrrange_make(int128_zero(), int128_2_64()), false);
 758    }
 759    flatview_simplify(view);
 760
 761    view->dispatch = address_space_dispatch_new(view);
 762    for (i = 0; i < view->nr; i++) {
 763        MemoryRegionSection mrs =
 764            section_from_flat_range(&view->ranges[i], view);
 765        flatview_add_to_dispatch(view, &mrs);
 766    }
 767    address_space_dispatch_compact(view->dispatch);
 768    g_hash_table_replace(flat_views, mr, view);
 769
 770    return view;
 771}
 772
 773static void address_space_add_del_ioeventfds(AddressSpace *as,
 774                                             MemoryRegionIoeventfd *fds_new,
 775                                             unsigned fds_new_nb,
 776                                             MemoryRegionIoeventfd *fds_old,
 777                                             unsigned fds_old_nb)
 778{
 779    unsigned iold, inew;
 780    MemoryRegionIoeventfd *fd;
 781    MemoryRegionSection section;
 782
 783    /* Generate a symmetric difference of the old and new fd sets, adding
 784     * and deleting as necessary.
 785     */
 786
 787    iold = inew = 0;
 788    while (iold < fds_old_nb || inew < fds_new_nb) {
 789        if (iold < fds_old_nb
 790            && (inew == fds_new_nb
 791                || memory_region_ioeventfd_before(&fds_old[iold],
 792                                                  &fds_new[inew]))) {
 793            fd = &fds_old[iold];
 794            section = (MemoryRegionSection) {
 795                .fv = address_space_to_flatview(as),
 796                .offset_within_address_space = int128_get64(fd->addr.start),
 797                .size = fd->addr.size,
 798            };
 799            MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
 800                                 fd->match_data, fd->data, fd->e);
 801            ++iold;
 802        } else if (inew < fds_new_nb
 803                   && (iold == fds_old_nb
 804                       || memory_region_ioeventfd_before(&fds_new[inew],
 805                                                         &fds_old[iold]))) {
 806            fd = &fds_new[inew];
 807            section = (MemoryRegionSection) {
 808                .fv = address_space_to_flatview(as),
 809                .offset_within_address_space = int128_get64(fd->addr.start),
 810                .size = fd->addr.size,
 811            };
 812            MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
 813                                 fd->match_data, fd->data, fd->e);
 814            ++inew;
 815        } else {
 816            ++iold;
 817            ++inew;
 818        }
 819    }
 820}
 821
 822FlatView *address_space_get_flatview(AddressSpace *as)
 823{
 824    FlatView *view;
 825
 826    rcu_read_lock();
 827    do {
 828        view = address_space_to_flatview(as);
 829        /* If somebody has replaced as->current_map concurrently,
 830         * flatview_ref returns false.
 831         */
 832    } while (!flatview_ref(view));
 833    rcu_read_unlock();
 834    return view;
 835}
 836
 837static void address_space_update_ioeventfds(AddressSpace *as)
 838{
 839    FlatView *view;
 840    FlatRange *fr;
 841    unsigned ioeventfd_nb = 0;
 842    MemoryRegionIoeventfd *ioeventfds = NULL;
 843    AddrRange tmp;
 844    unsigned i;
 845
 846    view = address_space_get_flatview(as);
 847    FOR_EACH_FLAT_RANGE(fr, view) {
 848        for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
 849            tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
 850                                  int128_sub(fr->addr.start,
 851                                             int128_make64(fr->offset_in_region)));
 852            if (addrrange_intersects(fr->addr, tmp)) {
 853                ++ioeventfd_nb;
 854                ioeventfds = g_realloc(ioeventfds,
 855                                          ioeventfd_nb * sizeof(*ioeventfds));
 856                ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
 857                ioeventfds[ioeventfd_nb-1].addr = tmp;
 858            }
 859        }
 860    }
 861
 862    address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
 863                                     as->ioeventfds, as->ioeventfd_nb);
 864
 865    g_free(as->ioeventfds);
 866    as->ioeventfds = ioeventfds;
 867    as->ioeventfd_nb = ioeventfd_nb;
 868    flatview_unref(view);
 869}
 870
 871static void address_space_update_topology_pass(AddressSpace *as,
 872                                               const FlatView *old_view,
 873                                               const FlatView *new_view,
 874                                               bool adding)
 875{
 876    unsigned iold, inew;
 877    FlatRange *frold, *frnew;
 878
 879    /* Generate a symmetric difference of the old and new memory maps.
 880     * Kill ranges in the old map, and instantiate ranges in the new map.
 881     */
 882    iold = inew = 0;
 883    while (iold < old_view->nr || inew < new_view->nr) {
 884        if (iold < old_view->nr) {
 885            frold = &old_view->ranges[iold];
 886        } else {
 887            frold = NULL;
 888        }
 889        if (inew < new_view->nr) {
 890            frnew = &new_view->ranges[inew];
 891        } else {
 892            frnew = NULL;
 893        }
 894
 895        if (frold
 896            && (!frnew
 897                || int128_lt(frold->addr.start, frnew->addr.start)
 898                || (int128_eq(frold->addr.start, frnew->addr.start)
 899                    && !flatrange_equal(frold, frnew)))) {
 900            /* In old but not in new, or in both but attributes changed. */
 901
 902            if (!adding) {
 903                MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
 904            }
 905
 906            ++iold;
 907        } else if (frold && frnew && flatrange_equal(frold, frnew)) {
 908            /* In both and unchanged (except logging may have changed) */
 909
 910            if (adding) {
 911                MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
 912                if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
 913                    MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
 914                                                  frold->dirty_log_mask,
 915                                                  frnew->dirty_log_mask);
 916                }
 917                if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
 918                    MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
 919                                                  frold->dirty_log_mask,
 920                                                  frnew->dirty_log_mask);
 921                }
 922            }
 923
 924            ++iold;
 925            ++inew;
 926        } else {
 927            /* In new */
 928
 929            if (adding) {
 930                MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
 931            }
 932
 933            ++inew;
 934        }
 935    }
 936}
 937
 938static void flatviews_init(void)
 939{
 940    static FlatView *empty_view;
 941
 942    if (flat_views) {
 943        return;
 944    }
 945
 946    flat_views = g_hash_table_new_full(g_direct_hash, g_direct_equal, NULL,
 947                                       (GDestroyNotify) flatview_unref);
 948    if (!empty_view) {
 949        empty_view = generate_memory_topology(NULL);
 950        /* We keep it alive forever in the global variable.  */
 951        flatview_ref(empty_view);
 952    } else {
 953        g_hash_table_replace(flat_views, NULL, empty_view);
 954        flatview_ref(empty_view);
 955    }
 956}
 957
 958static void flatviews_reset(void)
 959{
 960    AddressSpace *as;
 961
 962    if (flat_views) {
 963        g_hash_table_unref(flat_views);
 964        flat_views = NULL;
 965    }
 966    flatviews_init();
 967
 968    /* Render unique FVs */
 969    QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
 970        MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
 971
 972        if (g_hash_table_lookup(flat_views, physmr)) {
 973            continue;
 974        }
 975
 976        generate_memory_topology(physmr);
 977    }
 978}
 979
 980static void address_space_set_flatview(AddressSpace *as)
 981{
 982    FlatView *old_view = address_space_to_flatview(as);
 983    MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
 984    FlatView *new_view = g_hash_table_lookup(flat_views, physmr);
 985
 986    assert(new_view);
 987
 988    if (old_view == new_view) {
 989        return;
 990    }
 991
 992    if (old_view) {
 993        flatview_ref(old_view);
 994    }
 995
 996    flatview_ref(new_view);
 997
 998    if (!QTAILQ_EMPTY(&as->listeners)) {
 999        FlatView tmpview = { .nr = 0 }, *old_view2 = old_view;
1000
1001        if (!old_view2) {
1002            old_view2 = &tmpview;
1003        }
1004        address_space_update_topology_pass(as, old_view2, new_view, false);
1005        address_space_update_topology_pass(as, old_view2, new_view, true);
1006    }
1007
1008    /* Writes are protected by the BQL.  */
1009    atomic_rcu_set(&as->current_map, new_view);
1010    if (old_view) {
1011        flatview_unref(old_view);
1012    }
1013
1014    /* Note that all the old MemoryRegions are still alive up to this
1015     * point.  This relieves most MemoryListeners from the need to
1016     * ref/unref the MemoryRegions they get---unless they use them
1017     * outside the iothread mutex, in which case precise reference
1018     * counting is necessary.
1019     */
1020    if (old_view) {
1021        flatview_unref(old_view);
1022    }
1023}
1024
1025static void address_space_update_topology(AddressSpace *as)
1026{
1027    MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1028
1029    flatviews_init();
1030    if (!g_hash_table_lookup(flat_views, physmr)) {
1031        generate_memory_topology(physmr);
1032    }
1033    address_space_set_flatview(as);
1034}
1035
1036void memory_region_transaction_begin(void)
1037{
1038    qemu_flush_coalesced_mmio_buffer();
1039    ++memory_region_transaction_depth;
1040}
1041
1042void memory_region_transaction_commit(void)
1043{
1044    AddressSpace *as;
1045
1046    assert(memory_region_transaction_depth);
1047    assert(qemu_mutex_iothread_locked());
1048
1049    --memory_region_transaction_depth;
1050    if (!memory_region_transaction_depth) {
1051        if (memory_region_update_pending) {
1052            flatviews_reset();
1053
1054            MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
1055
1056            QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1057                address_space_set_flatview(as);
1058                address_space_update_ioeventfds(as);
1059            }
1060            memory_region_update_pending = false;
1061            ioeventfd_update_pending = false;
1062            MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
1063        } else if (ioeventfd_update_pending) {
1064            QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1065                address_space_update_ioeventfds(as);
1066            }
1067            ioeventfd_update_pending = false;
1068        }
1069   }
1070}
1071
1072static void memory_region_destructor_none(MemoryRegion *mr)
1073{
1074}
1075
1076static void memory_region_destructor_ram(MemoryRegion *mr)
1077{
1078    qemu_ram_free(mr->ram_block);
1079}
1080
1081static bool memory_region_need_escape(char c)
1082{
1083    return c == '/' || c == '[' || c == '\\' || c == ']';
1084}
1085
1086static char *memory_region_escape_name(const char *name)
1087{
1088    const char *p;
1089    char *escaped, *q;
1090    uint8_t c;
1091    size_t bytes = 0;
1092
1093    for (p = name; *p; p++) {
1094        bytes += memory_region_need_escape(*p) ? 4 : 1;
1095    }
1096    if (bytes == p - name) {
1097       return g_memdup(name, bytes + 1);
1098    }
1099
1100    escaped = g_malloc(bytes + 1);
1101    for (p = name, q = escaped; *p; p++) {
1102        c = *p;
1103        if (unlikely(memory_region_need_escape(c))) {
1104            *q++ = '\\';
1105            *q++ = 'x';
1106            *q++ = "0123456789abcdef"[c >> 4];
1107            c = "0123456789abcdef"[c & 15];
1108        }
1109        *q++ = c;
1110    }
1111    *q = 0;
1112    return escaped;
1113}
1114
1115static void memory_region_do_init(MemoryRegion *mr,
1116                                  Object *owner,
1117                                  const char *name,
1118                                  uint64_t size)
1119{
1120    mr->size = int128_make64(size);
1121    if (size == UINT64_MAX) {
1122        mr->size = int128_2_64();
1123    }
1124    mr->name = g_strdup(name);
1125    mr->owner = owner;
1126    mr->ram_block = NULL;
1127
1128    if (name) {
1129        char *escaped_name = memory_region_escape_name(name);
1130        char *name_array = g_strdup_printf("%s[*]", escaped_name);
1131
1132        if (!owner) {
1133            owner = container_get(qdev_get_machine(), "/unattached");
1134        }
1135
1136        object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
1137        object_unref(OBJECT(mr));
1138        g_free(name_array);
1139        g_free(escaped_name);
1140    }
1141}
1142
1143void memory_region_init(MemoryRegion *mr,
1144                        Object *owner,
1145                        const char *name,
1146                        uint64_t size)
1147{
1148    object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
1149    memory_region_do_init(mr, owner, name, size);
1150}
1151
1152static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
1153                                   void *opaque, Error **errp)
1154{
1155    MemoryRegion *mr = MEMORY_REGION(obj);
1156    uint64_t value = mr->addr;
1157
1158    visit_type_uint64(v, name, &value, errp);
1159}
1160
1161static void memory_region_get_container(Object *obj, Visitor *v,
1162                                        const char *name, void *opaque,
1163                                        Error **errp)
1164{
1165    MemoryRegion *mr = MEMORY_REGION(obj);
1166    gchar *path = (gchar *)"";
1167
1168    if (mr->container) {
1169        path = object_get_canonical_path(OBJECT(mr->container));
1170    }
1171    visit_type_str(v, name, &path, errp);
1172    if (mr->container) {
1173        g_free(path);
1174    }
1175}
1176
1177static Object *memory_region_resolve_container(Object *obj, void *opaque,
1178                                               const char *part)
1179{
1180    MemoryRegion *mr = MEMORY_REGION(obj);
1181
1182    return OBJECT(mr->container);
1183}
1184
1185static void memory_region_get_priority(Object *obj, Visitor *v,
1186                                       const char *name, void *opaque,
1187                                       Error **errp)
1188{
1189    MemoryRegion *mr = MEMORY_REGION(obj);
1190    int32_t value = mr->priority;
1191
1192    visit_type_int32(v, name, &value, errp);
1193}
1194
1195static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1196                                   void *opaque, Error **errp)
1197{
1198    MemoryRegion *mr = MEMORY_REGION(obj);
1199    uint64_t value = memory_region_size(mr);
1200
1201    visit_type_uint64(v, name, &value, errp);
1202}
1203
1204static void memory_region_initfn(Object *obj)
1205{
1206    MemoryRegion *mr = MEMORY_REGION(obj);
1207    ObjectProperty *op;
1208
1209    mr->ops = &unassigned_mem_ops;
1210    mr->enabled = true;
1211    mr->romd_mode = true;
1212    mr->global_locking = true;
1213    mr->destructor = memory_region_destructor_none;
1214    QTAILQ_INIT(&mr->subregions);
1215    QTAILQ_INIT(&mr->coalesced);
1216
1217    op = object_property_add(OBJECT(mr), "container",
1218                             "link<" TYPE_MEMORY_REGION ">",
1219                             memory_region_get_container,
1220                             NULL, /* memory_region_set_container */
1221                             NULL, NULL, &error_abort);
1222    op->resolve = memory_region_resolve_container;
1223
1224    object_property_add(OBJECT(mr), "addr", "uint64",
1225                        memory_region_get_addr,
1226                        NULL, /* memory_region_set_addr */
1227                        NULL, NULL, &error_abort);
1228    object_property_add(OBJECT(mr), "priority", "uint32",
1229                        memory_region_get_priority,
1230                        NULL, /* memory_region_set_priority */
1231                        NULL, NULL, &error_abort);
1232    object_property_add(OBJECT(mr), "size", "uint64",
1233                        memory_region_get_size,
1234                        NULL, /* memory_region_set_size, */
1235                        NULL, NULL, &error_abort);
1236}
1237
1238static void iommu_memory_region_initfn(Object *obj)
1239{
1240    MemoryRegion *mr = MEMORY_REGION(obj);
1241
1242    mr->is_iommu = true;
1243}
1244
1245static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1246                                    unsigned size)
1247{
1248#ifdef DEBUG_UNASSIGNED
1249    printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1250#endif
1251    if (current_cpu != NULL) {
1252        cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
1253    }
1254    return 0;
1255}
1256
1257static void unassigned_mem_write(void *opaque, hwaddr addr,
1258                                 uint64_t val, unsigned size)
1259{
1260#ifdef DEBUG_UNASSIGNED
1261    printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1262#endif
1263    if (current_cpu != NULL) {
1264        cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1265    }
1266}
1267
1268static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1269                                   unsigned size, bool is_write,
1270                                   MemTxAttrs attrs)
1271{
1272    return false;
1273}
1274
1275const MemoryRegionOps unassigned_mem_ops = {
1276    .valid.accepts = unassigned_mem_accepts,
1277    .endianness = DEVICE_NATIVE_ENDIAN,
1278};
1279
1280static uint64_t memory_region_ram_device_read(void *opaque,
1281                                              hwaddr addr, unsigned size)
1282{
1283    MemoryRegion *mr = opaque;
1284    uint64_t data = (uint64_t)~0;
1285
1286    switch (size) {
1287    case 1:
1288        data = *(uint8_t *)(mr->ram_block->host + addr);
1289        break;
1290    case 2:
1291        data = *(uint16_t *)(mr->ram_block->host + addr);
1292        break;
1293    case 4:
1294        data = *(uint32_t *)(mr->ram_block->host + addr);
1295        break;
1296    case 8:
1297        data = *(uint64_t *)(mr->ram_block->host + addr);
1298        break;
1299    }
1300
1301    trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1302
1303    return data;
1304}
1305
1306static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1307                                           uint64_t data, unsigned size)
1308{
1309    MemoryRegion *mr = opaque;
1310
1311    trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1312
1313    switch (size) {
1314    case 1:
1315        *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
1316        break;
1317    case 2:
1318        *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
1319        break;
1320    case 4:
1321        *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
1322        break;
1323    case 8:
1324        *(uint64_t *)(mr->ram_block->host + addr) = data;
1325        break;
1326    }
1327}
1328
1329static const MemoryRegionOps ram_device_mem_ops = {
1330    .read = memory_region_ram_device_read,
1331    .write = memory_region_ram_device_write,
1332    .endianness = DEVICE_HOST_ENDIAN,
1333    .valid = {
1334        .min_access_size = 1,
1335        .max_access_size = 8,
1336        .unaligned = true,
1337    },
1338    .impl = {
1339        .min_access_size = 1,
1340        .max_access_size = 8,
1341        .unaligned = true,
1342    },
1343};
1344
1345bool memory_region_access_valid(MemoryRegion *mr,
1346                                hwaddr addr,
1347                                unsigned size,
1348                                bool is_write,
1349                                MemTxAttrs attrs)
1350{
1351    int access_size_min, access_size_max;
1352    int access_size, i;
1353
1354    if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1355        return false;
1356    }
1357
1358    if (!mr->ops->valid.accepts) {
1359        return true;
1360    }
1361
1362    access_size_min = mr->ops->valid.min_access_size;
1363    if (!mr->ops->valid.min_access_size) {
1364        access_size_min = 1;
1365    }
1366
1367    access_size_max = mr->ops->valid.max_access_size;
1368    if (!mr->ops->valid.max_access_size) {
1369        access_size_max = 4;
1370    }
1371
1372    access_size = MAX(MIN(size, access_size_max), access_size_min);
1373    for (i = 0; i < size; i += access_size) {
1374        if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1375                                    is_write, attrs)) {
1376            return false;
1377        }
1378    }
1379
1380    return true;
1381}
1382
1383static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1384                                                hwaddr addr,
1385                                                uint64_t *pval,
1386                                                unsigned size,
1387                                                MemTxAttrs attrs)
1388{
1389    *pval = 0;
1390
1391    if (mr->ops->read) {
1392        return access_with_adjusted_size(addr, pval, size,
1393                                         mr->ops->impl.min_access_size,
1394                                         mr->ops->impl.max_access_size,
1395                                         memory_region_read_accessor,
1396                                         mr, attrs);
1397    } else if (mr->ops->read_with_attrs) {
1398        return access_with_adjusted_size(addr, pval, size,
1399                                         mr->ops->impl.min_access_size,
1400                                         mr->ops->impl.max_access_size,
1401                                         memory_region_read_with_attrs_accessor,
1402                                         mr, attrs);
1403    } else {
1404        return access_with_adjusted_size(addr, pval, size, 1, 4,
1405                                         memory_region_oldmmio_read_accessor,
1406                                         mr, attrs);
1407    }
1408}
1409
1410MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1411                                        hwaddr addr,
1412                                        uint64_t *pval,
1413                                        unsigned size,
1414                                        MemTxAttrs attrs)
1415{
1416    MemTxResult r;
1417
1418    if (!memory_region_access_valid(mr, addr, size, false, attrs)) {
1419        *pval = unassigned_mem_read(mr, addr, size);
1420        return MEMTX_DECODE_ERROR;
1421    }
1422
1423    r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1424    adjust_endianness(mr, pval, size);
1425    return r;
1426}
1427
1428/* Return true if an eventfd was signalled */
1429static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1430                                                    hwaddr addr,
1431                                                    uint64_t data,
1432                                                    unsigned size,
1433                                                    MemTxAttrs attrs)
1434{
1435    MemoryRegionIoeventfd ioeventfd = {
1436        .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1437        .data = data,
1438    };
1439    unsigned i;
1440
1441    for (i = 0; i < mr->ioeventfd_nb; i++) {
1442        ioeventfd.match_data = mr->ioeventfds[i].match_data;
1443        ioeventfd.e = mr->ioeventfds[i].e;
1444
1445        if (memory_region_ioeventfd_equal(&ioeventfd, &mr->ioeventfds[i])) {
1446            event_notifier_set(ioeventfd.e);
1447            return true;
1448        }
1449    }
1450
1451    return false;
1452}
1453
1454MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1455                                         hwaddr addr,
1456                                         uint64_t data,
1457                                         unsigned size,
1458                                         MemTxAttrs attrs)
1459{
1460    if (!memory_region_access_valid(mr, addr, size, true, attrs)) {
1461        unassigned_mem_write(mr, addr, data, size);
1462        return MEMTX_DECODE_ERROR;
1463    }
1464
1465    adjust_endianness(mr, &data, size);
1466
1467    if ((!kvm_eventfds_enabled()) &&
1468        memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1469        return MEMTX_OK;
1470    }
1471
1472    if (mr->ops->write) {
1473        return access_with_adjusted_size(addr, &data, size,
1474                                         mr->ops->impl.min_access_size,
1475                                         mr->ops->impl.max_access_size,
1476                                         memory_region_write_accessor, mr,
1477                                         attrs);
1478    } else if (mr->ops->write_with_attrs) {
1479        return
1480            access_with_adjusted_size(addr, &data, size,
1481                                      mr->ops->impl.min_access_size,
1482                                      mr->ops->impl.max_access_size,
1483                                      memory_region_write_with_attrs_accessor,
1484                                      mr, attrs);
1485    } else {
1486        return access_with_adjusted_size(addr, &data, size, 1, 4,
1487                                         memory_region_oldmmio_write_accessor,
1488                                         mr, attrs);
1489    }
1490}
1491
1492void memory_region_init_io(MemoryRegion *mr,
1493                           Object *owner,
1494                           const MemoryRegionOps *ops,
1495                           void *opaque,
1496                           const char *name,
1497                           uint64_t size)
1498{
1499    memory_region_init(mr, owner, name, size);
1500    mr->ops = ops ? ops : &unassigned_mem_ops;
1501    mr->opaque = opaque;
1502    mr->terminates = true;
1503}
1504
1505void memory_region_init_ram_nomigrate(MemoryRegion *mr,
1506                                      Object *owner,
1507                                      const char *name,
1508                                      uint64_t size,
1509                                      Error **errp)
1510{
1511    memory_region_init_ram_shared_nomigrate(mr, owner, name, size, false, errp);
1512}
1513
1514void memory_region_init_ram_shared_nomigrate(MemoryRegion *mr,
1515                                             Object *owner,
1516                                             const char *name,
1517                                             uint64_t size,
1518                                             bool share,
1519                                             Error **errp)
1520{
1521    memory_region_init(mr, owner, name, size);
1522    mr->ram = true;
1523    mr->terminates = true;
1524    mr->destructor = memory_region_destructor_ram;
1525    mr->ram_block = qemu_ram_alloc(size, share, mr, errp);
1526    mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1527}
1528
1529void memory_region_init_resizeable_ram(MemoryRegion *mr,
1530                                       Object *owner,
1531                                       const char *name,
1532                                       uint64_t size,
1533                                       uint64_t max_size,
1534                                       void (*resized)(const char*,
1535                                                       uint64_t length,
1536                                                       void *host),
1537                                       Error **errp)
1538{
1539    memory_region_init(mr, owner, name, size);
1540    mr->ram = true;
1541    mr->terminates = true;
1542    mr->destructor = memory_region_destructor_ram;
1543    mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1544                                              mr, errp);
1545    mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1546}
1547
1548#ifdef __linux__
1549void memory_region_init_ram_from_file(MemoryRegion *mr,
1550                                      struct Object *owner,
1551                                      const char *name,
1552                                      uint64_t size,
1553                                      uint64_t align,
1554                                      bool share,
1555                                      const char *path,
1556                                      Error **errp)
1557{
1558    memory_region_init(mr, owner, name, size);
1559    mr->ram = true;
1560    mr->terminates = true;
1561    mr->destructor = memory_region_destructor_ram;
1562    mr->align = align;
1563    mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1564    mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1565}
1566
1567void memory_region_init_ram_from_fd(MemoryRegion *mr,
1568                                    struct Object *owner,
1569                                    const char *name,
1570                                    uint64_t size,
1571                                    bool share,
1572                                    int fd,
1573                                    Error **errp)
1574{
1575    memory_region_init(mr, owner, name, size);
1576    mr->ram = true;
1577    mr->terminates = true;
1578    mr->destructor = memory_region_destructor_ram;
1579    mr->ram_block = qemu_ram_alloc_from_fd(size, mr, share, fd, errp);
1580    mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1581}
1582#endif
1583
1584void memory_region_init_ram_ptr(MemoryRegion *mr,
1585                                Object *owner,
1586                                const char *name,
1587                                uint64_t size,
1588                                void *ptr)
1589{
1590    memory_region_init(mr, owner, name, size);
1591    mr->ram = true;
1592    mr->terminates = true;
1593    mr->destructor = memory_region_destructor_ram;
1594    mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1595
1596    /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL.  */
1597    assert(ptr != NULL);
1598    mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1599}
1600
1601void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1602                                       Object *owner,
1603                                       const char *name,
1604                                       uint64_t size,
1605                                       void *ptr)
1606{
1607    memory_region_init_ram_ptr(mr, owner, name, size, ptr);
1608    mr->ram_device = true;
1609    mr->ops = &ram_device_mem_ops;
1610    mr->opaque = mr;
1611}
1612
1613void memory_region_init_alias(MemoryRegion *mr,
1614                              Object *owner,
1615                              const char *name,
1616                              MemoryRegion *orig,
1617                              hwaddr offset,
1618                              uint64_t size)
1619{
1620    memory_region_init(mr, owner, name, size);
1621    mr->alias = orig;
1622    mr->alias_offset = offset;
1623}
1624
1625void memory_region_init_rom_nomigrate(MemoryRegion *mr,
1626                                      struct Object *owner,
1627                                      const char *name,
1628                                      uint64_t size,
1629                                      Error **errp)
1630{
1631    memory_region_init(mr, owner, name, size);
1632    mr->ram = true;
1633    mr->readonly = true;
1634    mr->terminates = true;
1635    mr->destructor = memory_region_destructor_ram;
1636    mr->ram_block = qemu_ram_alloc(size, false, mr, errp);
1637    mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1638}
1639
1640void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
1641                                             Object *owner,
1642                                             const MemoryRegionOps *ops,
1643                                             void *opaque,
1644                                             const char *name,
1645                                             uint64_t size,
1646                                             Error **errp)
1647{
1648    assert(ops);
1649    memory_region_init(mr, owner, name, size);
1650    mr->ops = ops;
1651    mr->opaque = opaque;
1652    mr->terminates = true;
1653    mr->rom_device = true;
1654    mr->destructor = memory_region_destructor_ram;
1655    mr->ram_block = qemu_ram_alloc(size, false,  mr, errp);
1656}
1657
1658void memory_region_init_iommu(void *_iommu_mr,
1659                              size_t instance_size,
1660                              const char *mrtypename,
1661                              Object *owner,
1662                              const char *name,
1663                              uint64_t size)
1664{
1665    struct IOMMUMemoryRegion *iommu_mr;
1666    struct MemoryRegion *mr;
1667
1668    object_initialize(_iommu_mr, instance_size, mrtypename);
1669    mr = MEMORY_REGION(_iommu_mr);
1670    memory_region_do_init(mr, owner, name, size);
1671    iommu_mr = IOMMU_MEMORY_REGION(mr);
1672    mr->terminates = true;  /* then re-forwards */
1673    QLIST_INIT(&iommu_mr->iommu_notify);
1674    iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
1675}
1676
1677static void memory_region_finalize(Object *obj)
1678{
1679    MemoryRegion *mr = MEMORY_REGION(obj);
1680
1681    assert(!mr->container);
1682
1683    /* We know the region is not visible in any address space (it
1684     * does not have a container and cannot be a root either because
1685     * it has no references, so we can blindly clear mr->enabled.
1686     * memory_region_set_enabled instead could trigger a transaction
1687     * and cause an infinite loop.
1688     */
1689    mr->enabled = false;
1690    memory_region_transaction_begin();
1691    while (!QTAILQ_EMPTY(&mr->subregions)) {
1692        MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1693        memory_region_del_subregion(mr, subregion);
1694    }
1695    memory_region_transaction_commit();
1696
1697    mr->destructor(mr);
1698    memory_region_clear_coalescing(mr);
1699    g_free((char *)mr->name);
1700    g_free(mr->ioeventfds);
1701}
1702
1703Object *memory_region_owner(MemoryRegion *mr)
1704{
1705    Object *obj = OBJECT(mr);
1706    return obj->parent;
1707}
1708
1709void memory_region_ref(MemoryRegion *mr)
1710{
1711    /* MMIO callbacks most likely will access data that belongs
1712     * to the owner, hence the need to ref/unref the owner whenever
1713     * the memory region is in use.
1714     *
1715     * The memory region is a child of its owner.  As long as the
1716     * owner doesn't call unparent itself on the memory region,
1717     * ref-ing the owner will also keep the memory region alive.
1718     * Memory regions without an owner are supposed to never go away;
1719     * we do not ref/unref them because it slows down DMA sensibly.
1720     */
1721    if (mr && mr->owner) {
1722        object_ref(mr->owner);
1723    }
1724}
1725
1726void memory_region_unref(MemoryRegion *mr)
1727{
1728    if (mr && mr->owner) {
1729        object_unref(mr->owner);
1730    }
1731}
1732
1733uint64_t memory_region_size(MemoryRegion *mr)
1734{
1735    if (int128_eq(mr->size, int128_2_64())) {
1736        return UINT64_MAX;
1737    }
1738    return int128_get64(mr->size);
1739}
1740
1741const char *memory_region_name(const MemoryRegion *mr)
1742{
1743    if (!mr->name) {
1744        ((MemoryRegion *)mr)->name =
1745            object_get_canonical_path_component(OBJECT(mr));
1746    }
1747    return mr->name;
1748}
1749
1750bool memory_region_is_ram_device(MemoryRegion *mr)
1751{
1752    return mr->ram_device;
1753}
1754
1755uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1756{
1757    uint8_t mask = mr->dirty_log_mask;
1758    if (global_dirty_log && mr->ram_block) {
1759        mask |= (1 << DIRTY_MEMORY_MIGRATION);
1760    }
1761    return mask;
1762}
1763
1764bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1765{
1766    return memory_region_get_dirty_log_mask(mr) & (1 << client);
1767}
1768
1769static void memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr)
1770{
1771    IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1772    IOMMUNotifier *iommu_notifier;
1773    IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1774
1775    IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1776        flags |= iommu_notifier->notifier_flags;
1777    }
1778
1779    if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) {
1780        imrc->notify_flag_changed(iommu_mr,
1781                                  iommu_mr->iommu_notify_flags,
1782                                  flags);
1783    }
1784
1785    iommu_mr->iommu_notify_flags = flags;
1786}
1787
1788void memory_region_register_iommu_notifier(MemoryRegion *mr,
1789                                           IOMMUNotifier *n)
1790{
1791    IOMMUMemoryRegion *iommu_mr;
1792
1793    if (mr->alias) {
1794        memory_region_register_iommu_notifier(mr->alias, n);
1795        return;
1796    }
1797
1798    /* We need to register for at least one bitfield */
1799    iommu_mr = IOMMU_MEMORY_REGION(mr);
1800    assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
1801    assert(n->start <= n->end);
1802    assert(n->iommu_idx >= 0 &&
1803           n->iommu_idx < memory_region_iommu_num_indexes(iommu_mr));
1804
1805    QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node);
1806    memory_region_update_iommu_notify_flags(iommu_mr);
1807}
1808
1809uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr)
1810{
1811    IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1812
1813    if (imrc->get_min_page_size) {
1814        return imrc->get_min_page_size(iommu_mr);
1815    }
1816    return TARGET_PAGE_SIZE;
1817}
1818
1819void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
1820{
1821    MemoryRegion *mr = MEMORY_REGION(iommu_mr);
1822    IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1823    hwaddr addr, granularity;
1824    IOMMUTLBEntry iotlb;
1825
1826    /* If the IOMMU has its own replay callback, override */
1827    if (imrc->replay) {
1828        imrc->replay(iommu_mr, n);
1829        return;
1830    }
1831
1832    granularity = memory_region_iommu_get_min_page_size(iommu_mr);
1833
1834    for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1835        iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, n->iommu_idx);
1836        if (iotlb.perm != IOMMU_NONE) {
1837            n->notify(n, &iotlb);
1838        }
1839
1840        /* if (2^64 - MR size) < granularity, it's possible to get an
1841         * infinite loop here.  This should catch such a wraparound */
1842        if ((addr + granularity) < addr) {
1843            break;
1844        }
1845    }
1846}
1847
1848void memory_region_iommu_replay_all(IOMMUMemoryRegion *iommu_mr)
1849{
1850    IOMMUNotifier *notifier;
1851
1852    IOMMU_NOTIFIER_FOREACH(notifier, iommu_mr) {
1853        memory_region_iommu_replay(iommu_mr, notifier);
1854    }
1855}
1856
1857void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1858                                             IOMMUNotifier *n)
1859{
1860    IOMMUMemoryRegion *iommu_mr;
1861
1862    if (mr->alias) {
1863        memory_region_unregister_iommu_notifier(mr->alias, n);
1864        return;
1865    }
1866    QLIST_REMOVE(n, node);
1867    iommu_mr = IOMMU_MEMORY_REGION(mr);
1868    memory_region_update_iommu_notify_flags(iommu_mr);
1869}
1870
1871void memory_region_notify_one(IOMMUNotifier *notifier,
1872                              IOMMUTLBEntry *entry)
1873{
1874    IOMMUNotifierFlag request_flags;
1875
1876    /*
1877     * Skip the notification if the notification does not overlap
1878     * with registered range.
1879     */
1880    if (notifier->start > entry->iova + entry->addr_mask ||
1881        notifier->end < entry->iova) {
1882        return;
1883    }
1884
1885    if (entry->perm & IOMMU_RW) {
1886        request_flags = IOMMU_NOTIFIER_MAP;
1887    } else {
1888        request_flags = IOMMU_NOTIFIER_UNMAP;
1889    }
1890
1891    if (notifier->notifier_flags & request_flags) {
1892        notifier->notify(notifier, entry);
1893    }
1894}
1895
1896void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr,
1897                                int iommu_idx,
1898                                IOMMUTLBEntry entry)
1899{
1900    IOMMUNotifier *iommu_notifier;
1901
1902    assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr)));
1903
1904    IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1905        if (iommu_notifier->iommu_idx == iommu_idx) {
1906            memory_region_notify_one(iommu_notifier, &entry);
1907        }
1908    }
1909}
1910
1911int memory_region_iommu_get_attr(IOMMUMemoryRegion *iommu_mr,
1912                                 enum IOMMUMemoryRegionAttr attr,
1913                                 void *data)
1914{
1915    IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1916
1917    if (!imrc->get_attr) {
1918        return -EINVAL;
1919    }
1920
1921    return imrc->get_attr(iommu_mr, attr, data);
1922}
1923
1924int memory_region_iommu_attrs_to_index(IOMMUMemoryRegion *iommu_mr,
1925                                       MemTxAttrs attrs)
1926{
1927    IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1928
1929    if (!imrc->attrs_to_index) {
1930        return 0;
1931    }
1932
1933    return imrc->attrs_to_index(iommu_mr, attrs);
1934}
1935
1936int memory_region_iommu_num_indexes(IOMMUMemoryRegion *iommu_mr)
1937{
1938    IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1939
1940    if (!imrc->num_indexes) {
1941        return 1;
1942    }
1943
1944    return imrc->num_indexes(iommu_mr);
1945}
1946
1947void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1948{
1949    uint8_t mask = 1 << client;
1950    uint8_t old_logging;
1951
1952    assert(client == DIRTY_MEMORY_VGA);
1953    old_logging = mr->vga_logging_count;
1954    mr->vga_logging_count += log ? 1 : -1;
1955    if (!!old_logging == !!mr->vga_logging_count) {
1956        return;
1957    }
1958
1959    memory_region_transaction_begin();
1960    mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1961    memory_region_update_pending |= mr->enabled;
1962    memory_region_transaction_commit();
1963}
1964
1965bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1966                             hwaddr size, unsigned client)
1967{
1968    assert(mr->ram_block);
1969    return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr,
1970                                         size, client);
1971}
1972
1973void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1974                             hwaddr size)
1975{
1976    assert(mr->ram_block);
1977    cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
1978                                        size,
1979                                        memory_region_get_dirty_log_mask(mr));
1980}
1981
1982static void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1983{
1984    MemoryListener *listener;
1985    AddressSpace *as;
1986    FlatView *view;
1987    FlatRange *fr;
1988
1989    /* If the same address space has multiple log_sync listeners, we
1990     * visit that address space's FlatView multiple times.  But because
1991     * log_sync listeners are rare, it's still cheaper than walking each
1992     * address space once.
1993     */
1994    QTAILQ_FOREACH(listener, &memory_listeners, link) {
1995        if (!listener->log_sync) {
1996            continue;
1997        }
1998        as = listener->address_space;
1999        view = address_space_get_flatview(as);
2000        FOR_EACH_FLAT_RANGE(fr, view) {
2001            if (fr->dirty_log_mask && (!mr || fr->mr == mr)) {
2002                MemoryRegionSection mrs = section_from_flat_range(fr, view);
2003                listener->log_sync(listener, &mrs);
2004            }
2005        }
2006        flatview_unref(view);
2007    }
2008}
2009
2010DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
2011                                                            hwaddr addr,
2012                                                            hwaddr size,
2013                                                            unsigned client)
2014{
2015    assert(mr->ram_block);
2016    memory_region_sync_dirty_bitmap(mr);
2017    return cpu_physical_memory_snapshot_and_clear_dirty(
2018                memory_region_get_ram_addr(mr) + addr, size, client);
2019}
2020
2021bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
2022                                      hwaddr addr, hwaddr size)
2023{
2024    assert(mr->ram_block);
2025    return cpu_physical_memory_snapshot_get_dirty(snap,
2026                memory_region_get_ram_addr(mr) + addr, size);
2027}
2028
2029void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
2030{
2031    if (mr->readonly != readonly) {
2032        memory_region_transaction_begin();
2033        mr->readonly = readonly;
2034        memory_region_update_pending |= mr->enabled;
2035        memory_region_transaction_commit();
2036    }
2037}
2038
2039void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
2040{
2041    if (mr->romd_mode != romd_mode) {
2042        memory_region_transaction_begin();
2043        mr->romd_mode = romd_mode;
2044        memory_region_update_pending |= mr->enabled;
2045        memory_region_transaction_commit();
2046    }
2047}
2048
2049void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
2050                               hwaddr size, unsigned client)
2051{
2052    assert(mr->ram_block);
2053    cpu_physical_memory_test_and_clear_dirty(
2054        memory_region_get_ram_addr(mr) + addr, size, client);
2055}
2056
2057int memory_region_get_fd(MemoryRegion *mr)
2058{
2059    int fd;
2060
2061    rcu_read_lock();
2062    while (mr->alias) {
2063        mr = mr->alias;
2064    }
2065    fd = mr->ram_block->fd;
2066    rcu_read_unlock();
2067
2068    return fd;
2069}
2070
2071void *memory_region_get_ram_ptr(MemoryRegion *mr)
2072{
2073    void *ptr;
2074    uint64_t offset = 0;
2075
2076    rcu_read_lock();
2077    while (mr->alias) {
2078        offset += mr->alias_offset;
2079        mr = mr->alias;
2080    }
2081    assert(mr->ram_block);
2082    ptr = qemu_map_ram_ptr(mr->ram_block, offset);
2083    rcu_read_unlock();
2084
2085    return ptr;
2086}
2087
2088MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
2089{
2090    RAMBlock *block;
2091
2092    block = qemu_ram_block_from_host(ptr, false, offset);
2093    if (!block) {
2094        return NULL;
2095    }
2096
2097    return block->mr;
2098}
2099
2100ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
2101{
2102    return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
2103}
2104
2105void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
2106{
2107    assert(mr->ram_block);
2108
2109    qemu_ram_resize(mr->ram_block, newsize, errp);
2110}
2111
2112static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
2113{
2114    FlatView *view;
2115    FlatRange *fr;
2116    CoalescedMemoryRange *cmr;
2117    AddrRange tmp;
2118    MemoryRegionSection section;
2119
2120    view = address_space_get_flatview(as);
2121    FOR_EACH_FLAT_RANGE(fr, view) {
2122        if (fr->mr == mr) {
2123            section = (MemoryRegionSection) {
2124                .fv = view,
2125                .offset_within_address_space = int128_get64(fr->addr.start),
2126                .size = fr->addr.size,
2127            };
2128
2129            MEMORY_LISTENER_CALL(as, coalesced_mmio_del, Reverse, &section,
2130                                 int128_get64(fr->addr.start),
2131                                 int128_get64(fr->addr.size));
2132            QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
2133                tmp = addrrange_shift(cmr->addr,
2134                                      int128_sub(fr->addr.start,
2135                                                 int128_make64(fr->offset_in_region)));
2136                if (!addrrange_intersects(tmp, fr->addr)) {
2137                    continue;
2138                }
2139                tmp = addrrange_intersection(tmp, fr->addr);
2140                MEMORY_LISTENER_CALL(as, coalesced_mmio_add, Forward, &section,
2141                                     int128_get64(tmp.start),
2142                                     int128_get64(tmp.size));
2143            }
2144        }
2145    }
2146    flatview_unref(view);
2147}
2148
2149static void memory_region_update_coalesced_range(MemoryRegion *mr)
2150{
2151    AddressSpace *as;
2152
2153    QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2154        memory_region_update_coalesced_range_as(mr, as);
2155    }
2156}
2157
2158void memory_region_set_coalescing(MemoryRegion *mr)
2159{
2160    memory_region_clear_coalescing(mr);
2161    memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
2162}
2163
2164void memory_region_add_coalescing(MemoryRegion *mr,
2165                                  hwaddr offset,
2166                                  uint64_t size)
2167{
2168    CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
2169
2170    cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
2171    QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
2172    memory_region_update_coalesced_range(mr);
2173    memory_region_set_flush_coalesced(mr);
2174}
2175
2176void memory_region_clear_coalescing(MemoryRegion *mr)
2177{
2178    CoalescedMemoryRange *cmr;
2179    bool updated = false;
2180
2181    qemu_flush_coalesced_mmio_buffer();
2182    mr->flush_coalesced_mmio = false;
2183
2184    while (!QTAILQ_EMPTY(&mr->coalesced)) {
2185        cmr = QTAILQ_FIRST(&mr->coalesced);
2186        QTAILQ_REMOVE(&mr->coalesced, cmr, link);
2187        g_free(cmr);
2188        updated = true;
2189    }
2190
2191    if (updated) {
2192        memory_region_update_coalesced_range(mr);
2193    }
2194}
2195
2196void memory_region_set_flush_coalesced(MemoryRegion *mr)
2197{
2198    mr->flush_coalesced_mmio = true;
2199}
2200
2201void memory_region_clear_flush_coalesced(MemoryRegion *mr)
2202{
2203    qemu_flush_coalesced_mmio_buffer();
2204    if (QTAILQ_EMPTY(&mr->coalesced)) {
2205        mr->flush_coalesced_mmio = false;
2206    }
2207}
2208
2209void memory_region_clear_global_locking(MemoryRegion *mr)
2210{
2211    mr->global_locking = false;
2212}
2213
2214static bool userspace_eventfd_warning;
2215
2216void memory_region_add_eventfd(MemoryRegion *mr,
2217                               hwaddr addr,
2218                               unsigned size,
2219                               bool match_data,
2220                               uint64_t data,
2221                               EventNotifier *e)
2222{
2223    MemoryRegionIoeventfd mrfd = {
2224        .addr.start = int128_make64(addr),
2225        .addr.size = int128_make64(size),
2226        .match_data = match_data,
2227        .data = data,
2228        .e = e,
2229    };
2230    unsigned i;
2231
2232    if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
2233                            userspace_eventfd_warning))) {
2234        userspace_eventfd_warning = true;
2235        error_report("Using eventfd without MMIO binding in KVM. "
2236                     "Suboptimal performance expected");
2237    }
2238
2239    if (size) {
2240        adjust_endianness(mr, &mrfd.data, size);
2241    }
2242    memory_region_transaction_begin();
2243    for (i = 0; i < mr->ioeventfd_nb; ++i) {
2244        if (memory_region_ioeventfd_before(&mrfd, &mr->ioeventfds[i])) {
2245            break;
2246        }
2247    }
2248    ++mr->ioeventfd_nb;
2249    mr->ioeventfds = g_realloc(mr->ioeventfds,
2250                                  sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
2251    memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
2252            sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
2253    mr->ioeventfds[i] = mrfd;
2254    ioeventfd_update_pending |= mr->enabled;
2255    memory_region_transaction_commit();
2256}
2257
2258void memory_region_del_eventfd(MemoryRegion *mr,
2259                               hwaddr addr,
2260                               unsigned size,
2261                               bool match_data,
2262                               uint64_t data,
2263                               EventNotifier *e)
2264{
2265    MemoryRegionIoeventfd mrfd = {
2266        .addr.start = int128_make64(addr),
2267        .addr.size = int128_make64(size),
2268        .match_data = match_data,
2269        .data = data,
2270        .e = e,
2271    };
2272    unsigned i;
2273
2274    if (size) {
2275        adjust_endianness(mr, &mrfd.data, size);
2276    }
2277    memory_region_transaction_begin();
2278    for (i = 0; i < mr->ioeventfd_nb; ++i) {
2279        if (memory_region_ioeventfd_equal(&mrfd, &mr->ioeventfds[i])) {
2280            break;
2281        }
2282    }
2283    assert(i != mr->ioeventfd_nb);
2284    memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2285            sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2286    --mr->ioeventfd_nb;
2287    mr->ioeventfds = g_realloc(mr->ioeventfds,
2288                                  sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
2289    ioeventfd_update_pending |= mr->enabled;
2290    memory_region_transaction_commit();
2291}
2292
2293static void memory_region_update_container_subregions(MemoryRegion *subregion)
2294{
2295    MemoryRegion *mr = subregion->container;
2296    MemoryRegion *other;
2297
2298    memory_region_transaction_begin();
2299
2300    memory_region_ref(subregion);
2301    QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2302        if (subregion->priority >= other->priority) {
2303            QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2304            goto done;
2305        }
2306    }
2307    QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2308done:
2309    memory_region_update_pending |= mr->enabled && subregion->enabled;
2310    memory_region_transaction_commit();
2311}
2312
2313static void memory_region_add_subregion_common(MemoryRegion *mr,
2314                                               hwaddr offset,
2315                                               MemoryRegion *subregion)
2316{
2317    assert(!subregion->container);
2318    subregion->container = mr;
2319    subregion->addr = offset;
2320    memory_region_update_container_subregions(subregion);
2321}
2322
2323void memory_region_add_subregion(MemoryRegion *mr,
2324                                 hwaddr offset,
2325                                 MemoryRegion *subregion)
2326{
2327    subregion->priority = 0;
2328    memory_region_add_subregion_common(mr, offset, subregion);
2329}
2330
2331void memory_region_add_subregion_overlap(MemoryRegion *mr,
2332                                         hwaddr offset,
2333                                         MemoryRegion *subregion,
2334                                         int priority)
2335{
2336    subregion->priority = priority;
2337    memory_region_add_subregion_common(mr, offset, subregion);
2338}
2339
2340void memory_region_del_subregion(MemoryRegion *mr,
2341                                 MemoryRegion *subregion)
2342{
2343    memory_region_transaction_begin();
2344    assert(subregion->container == mr);
2345    subregion->container = NULL;
2346    QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2347    memory_region_unref(subregion);
2348    memory_region_update_pending |= mr->enabled && subregion->enabled;
2349    memory_region_transaction_commit();
2350}
2351
2352void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2353{
2354    if (enabled == mr->enabled) {
2355        return;
2356    }
2357    memory_region_transaction_begin();
2358    mr->enabled = enabled;
2359    memory_region_update_pending = true;
2360    memory_region_transaction_commit();
2361}
2362
2363void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2364{
2365    Int128 s = int128_make64(size);
2366
2367    if (size == UINT64_MAX) {
2368        s = int128_2_64();
2369    }
2370    if (int128_eq(s, mr->size)) {
2371        return;
2372    }
2373    memory_region_transaction_begin();
2374    mr->size = s;
2375    memory_region_update_pending = true;
2376    memory_region_transaction_commit();
2377}
2378
2379static void memory_region_readd_subregion(MemoryRegion *mr)
2380{
2381    MemoryRegion *container = mr->container;
2382
2383    if (container) {
2384        memory_region_transaction_begin();
2385        memory_region_ref(mr);
2386        memory_region_del_subregion(container, mr);
2387        mr->container = container;
2388        memory_region_update_container_subregions(mr);
2389        memory_region_unref(mr);
2390        memory_region_transaction_commit();
2391    }
2392}
2393
2394void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2395{
2396    if (addr != mr->addr) {
2397        mr->addr = addr;
2398        memory_region_readd_subregion(mr);
2399    }
2400}
2401
2402void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2403{
2404    assert(mr->alias);
2405
2406    if (offset == mr->alias_offset) {
2407        return;
2408    }
2409
2410    memory_region_transaction_begin();
2411    mr->alias_offset = offset;
2412    memory_region_update_pending |= mr->enabled;
2413    memory_region_transaction_commit();
2414}
2415
2416uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2417{
2418    return mr->align;
2419}
2420
2421static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2422{
2423    const AddrRange *addr = addr_;
2424    const FlatRange *fr = fr_;
2425
2426    if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2427        return -1;
2428    } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2429        return 1;
2430    }
2431    return 0;
2432}
2433
2434static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2435{
2436    return bsearch(&addr, view->ranges, view->nr,
2437                   sizeof(FlatRange), cmp_flatrange_addr);
2438}
2439
2440bool memory_region_is_mapped(MemoryRegion *mr)
2441{
2442    return mr->container ? true : false;
2443}
2444
2445/* Same as memory_region_find, but it does not add a reference to the
2446 * returned region.  It must be called from an RCU critical section.
2447 */
2448static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2449                                                  hwaddr addr, uint64_t size)
2450{
2451    MemoryRegionSection ret = { .mr = NULL };
2452    MemoryRegion *root;
2453    AddressSpace *as;
2454    AddrRange range;
2455    FlatView *view;
2456    FlatRange *fr;
2457
2458    addr += mr->addr;
2459    for (root = mr; root->container; ) {
2460        root = root->container;
2461        addr += root->addr;
2462    }
2463
2464    as = memory_region_to_address_space(root);
2465    if (!as) {
2466        return ret;
2467    }
2468    range = addrrange_make(int128_make64(addr), int128_make64(size));
2469
2470    view = address_space_to_flatview(as);
2471    fr = flatview_lookup(view, range);
2472    if (!fr) {
2473        return ret;
2474    }
2475
2476    while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2477        --fr;
2478    }
2479
2480    ret.mr = fr->mr;
2481    ret.fv = view;
2482    range = addrrange_intersection(range, fr->addr);
2483    ret.offset_within_region = fr->offset_in_region;
2484    ret.offset_within_region += int128_get64(int128_sub(range.start,
2485                                                        fr->addr.start));
2486    ret.size = range.size;
2487    ret.offset_within_address_space = int128_get64(range.start);
2488    ret.readonly = fr->readonly;
2489    return ret;
2490}
2491
2492MemoryRegionSection memory_region_find(MemoryRegion *mr,
2493                                       hwaddr addr, uint64_t size)
2494{
2495    MemoryRegionSection ret;
2496    rcu_read_lock();
2497    ret = memory_region_find_rcu(mr, addr, size);
2498    if (ret.mr) {
2499        memory_region_ref(ret.mr);
2500    }
2501    rcu_read_unlock();
2502    return ret;
2503}
2504
2505bool memory_region_present(MemoryRegion *container, hwaddr addr)
2506{
2507    MemoryRegion *mr;
2508
2509    rcu_read_lock();
2510    mr = memory_region_find_rcu(container, addr, 1).mr;
2511    rcu_read_unlock();
2512    return mr && mr != container;
2513}
2514
2515void memory_global_dirty_log_sync(void)
2516{
2517    memory_region_sync_dirty_bitmap(NULL);
2518}
2519
2520static VMChangeStateEntry *vmstate_change;
2521
2522void memory_global_dirty_log_start(void)
2523{
2524    if (vmstate_change) {
2525        qemu_del_vm_change_state_handler(vmstate_change);
2526        vmstate_change = NULL;
2527    }
2528
2529    global_dirty_log = true;
2530
2531    MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2532
2533    /* Refresh DIRTY_LOG_MIGRATION bit.  */
2534    memory_region_transaction_begin();
2535    memory_region_update_pending = true;
2536    memory_region_transaction_commit();
2537}
2538
2539static void memory_global_dirty_log_do_stop(void)
2540{
2541    global_dirty_log = false;
2542
2543    /* Refresh DIRTY_LOG_MIGRATION bit.  */
2544    memory_region_transaction_begin();
2545    memory_region_update_pending = true;
2546    memory_region_transaction_commit();
2547
2548    MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2549}
2550
2551static void memory_vm_change_state_handler(void *opaque, int running,
2552                                           RunState state)
2553{
2554    if (running) {
2555        memory_global_dirty_log_do_stop();
2556
2557        if (vmstate_change) {
2558            qemu_del_vm_change_state_handler(vmstate_change);
2559            vmstate_change = NULL;
2560        }
2561    }
2562}
2563
2564void memory_global_dirty_log_stop(void)
2565{
2566    if (!runstate_is_running()) {
2567        if (vmstate_change) {
2568            return;
2569        }
2570        vmstate_change = qemu_add_vm_change_state_handler(
2571                                memory_vm_change_state_handler, NULL);
2572        return;
2573    }
2574
2575    memory_global_dirty_log_do_stop();
2576}
2577
2578static void listener_add_address_space(MemoryListener *listener,
2579                                       AddressSpace *as)
2580{
2581    FlatView *view;
2582    FlatRange *fr;
2583
2584    if (listener->begin) {
2585        listener->begin(listener);
2586    }
2587    if (global_dirty_log) {
2588        if (listener->log_global_start) {
2589            listener->log_global_start(listener);
2590        }
2591    }
2592
2593    view = address_space_get_flatview(as);
2594    FOR_EACH_FLAT_RANGE(fr, view) {
2595        MemoryRegionSection section = section_from_flat_range(fr, view);
2596
2597        if (listener->region_add) {
2598            listener->region_add(listener, &section);
2599        }
2600        if (fr->dirty_log_mask && listener->log_start) {
2601            listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2602        }
2603    }
2604    if (listener->commit) {
2605        listener->commit(listener);
2606    }
2607    flatview_unref(view);
2608}
2609
2610static void listener_del_address_space(MemoryListener *listener,
2611                                       AddressSpace *as)
2612{
2613    FlatView *view;
2614    FlatRange *fr;
2615
2616    if (listener->begin) {
2617        listener->begin(listener);
2618    }
2619    view = address_space_get_flatview(as);
2620    FOR_EACH_FLAT_RANGE(fr, view) {
2621        MemoryRegionSection section = section_from_flat_range(fr, view);
2622
2623        if (fr->dirty_log_mask && listener->log_stop) {
2624            listener->log_stop(listener, &section, fr->dirty_log_mask, 0);
2625        }
2626        if (listener->region_del) {
2627            listener->region_del(listener, &section);
2628        }
2629    }
2630    if (listener->commit) {
2631        listener->commit(listener);
2632    }
2633    flatview_unref(view);
2634}
2635
2636void memory_listener_register(MemoryListener *listener, AddressSpace *as)
2637{
2638    MemoryListener *other = NULL;
2639
2640    listener->address_space = as;
2641    if (QTAILQ_EMPTY(&memory_listeners)
2642        || listener->priority >= QTAILQ_LAST(&memory_listeners,
2643                                             memory_listeners)->priority) {
2644        QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2645    } else {
2646        QTAILQ_FOREACH(other, &memory_listeners, link) {
2647            if (listener->priority < other->priority) {
2648                break;
2649            }
2650        }
2651        QTAILQ_INSERT_BEFORE(other, listener, link);
2652    }
2653
2654    if (QTAILQ_EMPTY(&as->listeners)
2655        || listener->priority >= QTAILQ_LAST(&as->listeners,
2656                                             memory_listeners)->priority) {
2657        QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
2658    } else {
2659        QTAILQ_FOREACH(other, &as->listeners, link_as) {
2660            if (listener->priority < other->priority) {
2661                break;
2662            }
2663        }
2664        QTAILQ_INSERT_BEFORE(other, listener, link_as);
2665    }
2666
2667    listener_add_address_space(listener, as);
2668}
2669
2670void memory_listener_unregister(MemoryListener *listener)
2671{
2672    if (!listener->address_space) {
2673        return;
2674    }
2675
2676    listener_del_address_space(listener, listener->address_space);
2677    QTAILQ_REMOVE(&memory_listeners, listener, link);
2678    QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
2679    listener->address_space = NULL;
2680}
2681
2682bool memory_region_request_mmio_ptr(MemoryRegion *mr, hwaddr addr)
2683{
2684    void *host;
2685    unsigned size = 0;
2686    unsigned offset = 0;
2687    Object *new_interface;
2688
2689    if (!mr || !mr->ops->request_ptr) {
2690        return false;
2691    }
2692
2693    /*
2694     * Avoid an update if the request_ptr call
2695     * memory_region_invalidate_mmio_ptr which seems to be likely when we use
2696     * a cache.
2697     */
2698    memory_region_transaction_begin();
2699
2700    host = mr->ops->request_ptr(mr->opaque, addr - mr->addr, &size, &offset);
2701
2702    if (!host || !size) {
2703        memory_region_transaction_commit();
2704        return false;
2705    }
2706
2707    new_interface = object_new("mmio_interface");
2708    qdev_prop_set_uint64(DEVICE(new_interface), "start", offset);
2709    qdev_prop_set_uint64(DEVICE(new_interface), "end", offset + size - 1);
2710    qdev_prop_set_bit(DEVICE(new_interface), "ro", true);
2711    qdev_prop_set_ptr(DEVICE(new_interface), "host_ptr", host);
2712    qdev_prop_set_ptr(DEVICE(new_interface), "subregion", mr);
2713    object_property_set_bool(OBJECT(new_interface), true, "realized", NULL);
2714
2715    memory_region_transaction_commit();
2716    return true;
2717}
2718
2719typedef struct MMIOPtrInvalidate {
2720    MemoryRegion *mr;
2721    hwaddr offset;
2722    unsigned size;
2723    int busy;
2724    int allocated;
2725} MMIOPtrInvalidate;
2726
2727#define MAX_MMIO_INVALIDATE 10
2728static MMIOPtrInvalidate mmio_ptr_invalidate_list[MAX_MMIO_INVALIDATE];
2729
2730static void memory_region_do_invalidate_mmio_ptr(CPUState *cpu,
2731                                                 run_on_cpu_data data)
2732{
2733    MMIOPtrInvalidate *invalidate_data = (MMIOPtrInvalidate *)data.host_ptr;
2734    MemoryRegion *mr = invalidate_data->mr;
2735    hwaddr offset = invalidate_data->offset;
2736    unsigned size = invalidate_data->size;
2737    MemoryRegionSection section = memory_region_find(mr, offset, size);
2738
2739    qemu_mutex_lock_iothread();
2740
2741    /* Reset dirty so this doesn't happen later. */
2742    cpu_physical_memory_test_and_clear_dirty(offset, size, 1);
2743
2744    if (section.mr != mr) {
2745        /* memory_region_find add a ref on section.mr */
2746        memory_region_unref(section.mr);
2747        if (MMIO_INTERFACE(section.mr->owner)) {
2748            /* We found the interface just drop it. */
2749            object_property_set_bool(section.mr->owner, false, "realized",
2750                                     NULL);
2751            object_unref(section.mr->owner);
2752            object_unparent(section.mr->owner);
2753        }
2754    }
2755
2756    qemu_mutex_unlock_iothread();
2757
2758    if (invalidate_data->allocated) {
2759        g_free(invalidate_data);
2760    } else {
2761        invalidate_data->busy = 0;
2762    }
2763}
2764
2765void memory_region_invalidate_mmio_ptr(MemoryRegion *mr, hwaddr offset,
2766                                       unsigned size)
2767{
2768    size_t i;
2769    MMIOPtrInvalidate *invalidate_data = NULL;
2770
2771    for (i = 0; i < MAX_MMIO_INVALIDATE; i++) {
2772        if (atomic_cmpxchg(&(mmio_ptr_invalidate_list[i].busy), 0, 1) == 0) {
2773            invalidate_data = &mmio_ptr_invalidate_list[i];
2774            break;
2775        }
2776    }
2777
2778    if (!invalidate_data) {
2779        invalidate_data = g_malloc0(sizeof(MMIOPtrInvalidate));
2780        invalidate_data->allocated = 1;
2781    }
2782
2783    invalidate_data->mr = mr;
2784    invalidate_data->offset = offset;
2785    invalidate_data->size = size;
2786
2787    async_safe_run_on_cpu(first_cpu, memory_region_do_invalidate_mmio_ptr,
2788                          RUN_ON_CPU_HOST_PTR(invalidate_data));
2789}
2790
2791void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2792{
2793    memory_region_ref(root);
2794    as->root = root;
2795    as->current_map = NULL;
2796    as->ioeventfd_nb = 0;
2797    as->ioeventfds = NULL;
2798    QTAILQ_INIT(&as->listeners);
2799    QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2800    as->name = g_strdup(name ? name : "anonymous");
2801    address_space_update_topology(as);
2802    address_space_update_ioeventfds(as);
2803}
2804
2805static void do_address_space_destroy(AddressSpace *as)
2806{
2807    assert(QTAILQ_EMPTY(&as->listeners));
2808
2809    flatview_unref(as->current_map);
2810    g_free(as->name);
2811    g_free(as->ioeventfds);
2812    memory_region_unref(as->root);
2813}
2814
2815void address_space_destroy(AddressSpace *as)
2816{
2817    MemoryRegion *root = as->root;
2818
2819    /* Flush out anything from MemoryListeners listening in on this */
2820    memory_region_transaction_begin();
2821    as->root = NULL;
2822    memory_region_transaction_commit();
2823    QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2824
2825    /* At this point, as->dispatch and as->current_map are dummy
2826     * entries that the guest should never use.  Wait for the old
2827     * values to expire before freeing the data.
2828     */
2829    as->root = root;
2830    call_rcu(as, do_address_space_destroy, rcu);
2831}
2832
2833static const char *memory_region_type(MemoryRegion *mr)
2834{
2835    if (memory_region_is_ram_device(mr)) {
2836        return "ramd";
2837    } else if (memory_region_is_romd(mr)) {
2838        return "romd";
2839    } else if (memory_region_is_rom(mr)) {
2840        return "rom";
2841    } else if (memory_region_is_ram(mr)) {
2842        return "ram";
2843    } else {
2844        return "i/o";
2845    }
2846}
2847
2848typedef struct MemoryRegionList MemoryRegionList;
2849
2850struct MemoryRegionList {
2851    const MemoryRegion *mr;
2852    QTAILQ_ENTRY(MemoryRegionList) mrqueue;
2853};
2854
2855typedef QTAILQ_HEAD(mrqueue, MemoryRegionList) MemoryRegionListHead;
2856
2857#define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
2858                           int128_sub((size), int128_one())) : 0)
2859#define MTREE_INDENT "  "
2860
2861static void mtree_expand_owner(fprintf_function mon_printf, void *f,
2862                               const char *label, Object *obj)
2863{
2864    DeviceState *dev = (DeviceState *) object_dynamic_cast(obj, TYPE_DEVICE);
2865
2866    mon_printf(f, " %s:{%s", label, dev ? "dev" : "obj");
2867    if (dev && dev->id) {
2868        mon_printf(f, " id=%s", dev->id);
2869    } else {
2870        gchar *canonical_path = object_get_canonical_path(obj);
2871        if (canonical_path) {
2872            mon_printf(f, " path=%s", canonical_path);
2873            g_free(canonical_path);
2874        } else {
2875            mon_printf(f, " type=%s", object_get_typename(obj));
2876        }
2877    }
2878    mon_printf(f, "}");
2879}
2880
2881static void mtree_print_mr_owner(fprintf_function mon_printf, void *f,
2882                                 const MemoryRegion *mr)
2883{
2884    Object *owner = mr->owner;
2885    Object *parent = memory_region_owner((MemoryRegion *)mr);
2886
2887    if (!owner && !parent) {
2888        mon_printf(f, " orphan");
2889        return;
2890    }
2891    if (owner) {
2892        mtree_expand_owner(mon_printf, f, "owner", owner);
2893    }
2894    if (parent && parent != owner) {
2895        mtree_expand_owner(mon_printf, f, "parent", parent);
2896    }
2897}
2898
2899static void mtree_print_mr(fprintf_function mon_printf, void *f,
2900                           const MemoryRegion *mr, unsigned int level,
2901                           hwaddr base,
2902                           MemoryRegionListHead *alias_print_queue,
2903                           bool owner)
2904{
2905    MemoryRegionList *new_ml, *ml, *next_ml;
2906    MemoryRegionListHead submr_print_queue;
2907    const MemoryRegion *submr;
2908    unsigned int i;
2909    hwaddr cur_start, cur_end;
2910
2911    if (!mr) {
2912        return;
2913    }
2914
2915    for (i = 0; i < level; i++) {
2916        mon_printf(f, MTREE_INDENT);
2917    }
2918
2919    cur_start = base + mr->addr;
2920    cur_end = cur_start + MR_SIZE(mr->size);
2921
2922    /*
2923     * Try to detect overflow of memory region. This should never
2924     * happen normally. When it happens, we dump something to warn the
2925     * user who is observing this.
2926     */
2927    if (cur_start < base || cur_end < cur_start) {
2928        mon_printf(f, "[DETECTED OVERFLOW!] ");
2929    }
2930
2931    if (mr->alias) {
2932        MemoryRegionList *ml;
2933        bool found = false;
2934
2935        /* check if the alias is already in the queue */
2936        QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) {
2937            if (ml->mr == mr->alias) {
2938                found = true;
2939            }
2940        }
2941
2942        if (!found) {
2943            ml = g_new(MemoryRegionList, 1);
2944            ml->mr = mr->alias;
2945            QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue);
2946        }
2947        mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2948                   " (prio %d, %s): alias %s @%s " TARGET_FMT_plx
2949                   "-" TARGET_FMT_plx "%s",
2950                   cur_start, cur_end,
2951                   mr->priority,
2952                   memory_region_type((MemoryRegion *)mr),
2953                   memory_region_name(mr),
2954                   memory_region_name(mr->alias),
2955                   mr->alias_offset,
2956                   mr->alias_offset + MR_SIZE(mr->size),
2957                   mr->enabled ? "" : " [disabled]");
2958        if (owner) {
2959            mtree_print_mr_owner(mon_printf, f, mr);
2960        }
2961    } else {
2962        mon_printf(f,
2963                   TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %s): %s%s",
2964                   cur_start, cur_end,
2965                   mr->priority,
2966                   memory_region_type((MemoryRegion *)mr),
2967                   memory_region_name(mr),
2968                   mr->enabled ? "" : " [disabled]");
2969        if (owner) {
2970            mtree_print_mr_owner(mon_printf, f, mr);
2971        }
2972    }
2973    mon_printf(f, "\n");
2974
2975    QTAILQ_INIT(&submr_print_queue);
2976
2977    QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2978        new_ml = g_new(MemoryRegionList, 1);
2979        new_ml->mr = submr;
2980        QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
2981            if (new_ml->mr->addr < ml->mr->addr ||
2982                (new_ml->mr->addr == ml->mr->addr &&
2983                 new_ml->mr->priority > ml->mr->priority)) {
2984                QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue);
2985                new_ml = NULL;
2986                break;
2987            }
2988        }
2989        if (new_ml) {
2990            QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue);
2991        }
2992    }
2993
2994    QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
2995        mtree_print_mr(mon_printf, f, ml->mr, level + 1, cur_start,
2996                       alias_print_queue, owner);
2997    }
2998
2999    QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) {
3000        g_free(ml);
3001    }
3002}
3003
3004struct FlatViewInfo {
3005    fprintf_function mon_printf;
3006    void *f;
3007    int counter;
3008    bool dispatch_tree;
3009    bool owner;
3010};
3011
3012static void mtree_print_flatview(gpointer key, gpointer value,
3013                                 gpointer user_data)
3014{
3015    FlatView *view = key;
3016    GArray *fv_address_spaces = value;
3017    struct FlatViewInfo *fvi = user_data;
3018    fprintf_function p = fvi->mon_printf;
3019    void *f = fvi->f;
3020    FlatRange *range = &view->ranges[0];
3021    MemoryRegion *mr;
3022    int n = view->nr;
3023    int i;
3024    AddressSpace *as;
3025
3026    p(f, "FlatView #%d\n", fvi->counter);
3027    ++fvi->counter;
3028
3029    for (i = 0; i < fv_address_spaces->len; ++i) {
3030        as = g_array_index(fv_address_spaces, AddressSpace*, i);
3031        p(f, " AS \"%s\", root: %s", as->name, memory_region_name(as->root));
3032        if (as->root->alias) {
3033            p(f, ", alias %s", memory_region_name(as->root->alias));
3034        }
3035        p(f, "\n");
3036    }
3037
3038    p(f, " Root memory region: %s\n",
3039      view->root ? memory_region_name(view->root) : "(none)");
3040
3041    if (n <= 0) {
3042        p(f, MTREE_INDENT "No rendered FlatView\n\n");
3043        return;
3044    }
3045
3046    while (n--) {
3047        mr = range->mr;
3048        if (range->offset_in_region) {
3049            p(f, MTREE_INDENT TARGET_FMT_plx "-"
3050              TARGET_FMT_plx " (prio %d, %s): %s @" TARGET_FMT_plx,
3051              int128_get64(range->addr.start),
3052              int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
3053              mr->priority,
3054              range->readonly ? "rom" : memory_region_type(mr),
3055              memory_region_name(mr),
3056              range->offset_in_region);
3057        } else {
3058            p(f, MTREE_INDENT TARGET_FMT_plx "-"
3059              TARGET_FMT_plx " (prio %d, %s): %s",
3060              int128_get64(range->addr.start),
3061              int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
3062              mr->priority,
3063              range->readonly ? "rom" : memory_region_type(mr),
3064              memory_region_name(mr));
3065        }
3066        if (fvi->owner) {
3067            mtree_print_mr_owner(p, f, mr);
3068        }
3069        p(f, "\n");
3070        range++;
3071    }
3072
3073#if !defined(CONFIG_USER_ONLY)
3074    if (fvi->dispatch_tree && view->root) {
3075        mtree_print_dispatch(p, f, view->dispatch, view->root);
3076    }
3077#endif
3078
3079    p(f, "\n");
3080}
3081
3082static gboolean mtree_info_flatview_free(gpointer key, gpointer value,
3083                                      gpointer user_data)
3084{
3085    FlatView *view = key;
3086    GArray *fv_address_spaces = value;
3087
3088    g_array_unref(fv_address_spaces);
3089    flatview_unref(view);
3090
3091    return true;
3092}
3093
3094void mtree_info(fprintf_function mon_printf, void *f, bool flatview,
3095                bool dispatch_tree, bool owner)
3096{
3097    MemoryRegionListHead ml_head;
3098    MemoryRegionList *ml, *ml2;
3099    AddressSpace *as;
3100
3101    if (flatview) {
3102        FlatView *view;
3103        struct FlatViewInfo fvi = {
3104            .mon_printf = mon_printf,
3105            .f = f,
3106            .counter = 0,
3107            .dispatch_tree = dispatch_tree,
3108            .owner = owner,
3109        };
3110        GArray *fv_address_spaces;
3111        GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3112
3113        /* Gather all FVs in one table */
3114        QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3115            view = address_space_get_flatview(as);
3116
3117            fv_address_spaces = g_hash_table_lookup(views, view);
3118            if (!fv_address_spaces) {
3119                fv_address_spaces = g_array_new(false, false, sizeof(as));
3120                g_hash_table_insert(views, view, fv_address_spaces);
3121            }
3122
3123            g_array_append_val(fv_address_spaces, as);
3124        }
3125
3126        /* Print */
3127        g_hash_table_foreach(views, mtree_print_flatview, &fvi);
3128
3129        /* Free */
3130        g_hash_table_foreach_remove(views, mtree_info_flatview_free, 0);
3131        g_hash_table_unref(views);
3132
3133        return;
3134    }
3135
3136    QTAILQ_INIT(&ml_head);
3137
3138    QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3139        mon_printf(f, "address-space: %s\n", as->name);
3140        mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head, owner);
3141        mon_printf(f, "\n");
3142    }
3143
3144    /* print aliased regions */
3145    QTAILQ_FOREACH(ml, &ml_head, mrqueue) {
3146        mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
3147        mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head, owner);
3148        mon_printf(f, "\n");
3149    }
3150
3151    QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) {
3152        g_free(ml);
3153    }
3154}
3155
3156void memory_region_init_ram(MemoryRegion *mr,
3157                            struct Object *owner,
3158                            const char *name,
3159                            uint64_t size,
3160                            Error **errp)
3161{
3162    DeviceState *owner_dev;
3163    Error *err = NULL;
3164
3165    memory_region_init_ram_nomigrate(mr, owner, name, size, &err);
3166    if (err) {
3167        error_propagate(errp, err);
3168        return;
3169    }
3170    /* This will assert if owner is neither NULL nor a DeviceState.
3171     * We only want the owner here for the purposes of defining a
3172     * unique name for migration. TODO: Ideally we should implement
3173     * a naming scheme for Objects which are not DeviceStates, in
3174     * which case we can relax this restriction.
3175     */
3176    owner_dev = DEVICE(owner);
3177    vmstate_register_ram(mr, owner_dev);
3178}
3179
3180void memory_region_init_rom(MemoryRegion *mr,
3181                            struct Object *owner,
3182                            const char *name,
3183                            uint64_t size,
3184                            Error **errp)
3185{
3186    DeviceState *owner_dev;
3187    Error *err = NULL;
3188
3189    memory_region_init_rom_nomigrate(mr, owner, name, size, &err);
3190    if (err) {
3191        error_propagate(errp, err);
3192        return;
3193    }
3194    /* This will assert if owner is neither NULL nor a DeviceState.
3195     * We only want the owner here for the purposes of defining a
3196     * unique name for migration. TODO: Ideally we should implement
3197     * a naming scheme for Objects which are not DeviceStates, in
3198     * which case we can relax this restriction.
3199     */
3200    owner_dev = DEVICE(owner);
3201    vmstate_register_ram(mr, owner_dev);
3202}
3203
3204void memory_region_init_rom_device(MemoryRegion *mr,
3205                                   struct Object *owner,
3206                                   const MemoryRegionOps *ops,
3207                                   void *opaque,
3208                                   const char *name,
3209                                   uint64_t size,
3210                                   Error **errp)
3211{
3212    DeviceState *owner_dev;
3213    Error *err = NULL;
3214
3215    memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
3216                                            name, size, &err);
3217    if (err) {
3218        error_propagate(errp, err);
3219        return;
3220    }
3221    /* This will assert if owner is neither NULL nor a DeviceState.
3222     * We only want the owner here for the purposes of defining a
3223     * unique name for migration. TODO: Ideally we should implement
3224     * a naming scheme for Objects which are not DeviceStates, in
3225     * which case we can relax this restriction.
3226     */
3227    owner_dev = DEVICE(owner);
3228    vmstate_register_ram(mr, owner_dev);
3229}
3230
3231static const TypeInfo memory_region_info = {
3232    .parent             = TYPE_OBJECT,
3233    .name               = TYPE_MEMORY_REGION,
3234    .instance_size      = sizeof(MemoryRegion),
3235    .instance_init      = memory_region_initfn,
3236    .instance_finalize  = memory_region_finalize,
3237};
3238
3239static const TypeInfo iommu_memory_region_info = {
3240    .parent             = TYPE_MEMORY_REGION,
3241    .name               = TYPE_IOMMU_MEMORY_REGION,
3242    .class_size         = sizeof(IOMMUMemoryRegionClass),
3243    .instance_size      = sizeof(IOMMUMemoryRegion),
3244    .instance_init      = iommu_memory_region_initfn,
3245    .abstract           = true,
3246};
3247
3248static void memory_register_types(void)
3249{
3250    type_register_static(&memory_region_info);
3251    type_register_static(&iommu_memory_region_info);
3252}
3253
3254type_init(memory_register_types)
3255