qemu/memory.c
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   1/*
   2 * Physical memory management
   3 *
   4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
   5 *
   6 * Authors:
   7 *  Avi Kivity <avi@redhat.com>
   8 *
   9 * This work is licensed under the terms of the GNU GPL, version 2.  See
  10 * the COPYING file in the top-level directory.
  11 *
  12 * Contributions after 2012-01-13 are licensed under the terms of the
  13 * GNU GPL, version 2 or (at your option) any later version.
  14 */
  15
  16#include "qemu/osdep.h"
  17#include "qapi/error.h"
  18#include "qemu-common.h"
  19#include "cpu.h"
  20#include "exec/memory.h"
  21#include "exec/address-spaces.h"
  22#include "qapi/visitor.h"
  23#include "qemu/bitops.h"
  24#include "qemu/error-report.h"
  25#include "qom/object.h"
  26#include "trace-root.h"
  27
  28#include "exec/memory-internal.h"
  29#include "exec/ram_addr.h"
  30#include "sysemu/kvm.h"
  31#include "sysemu/sysemu.h"
  32#include "hw/qdev-properties.h"
  33#include "migration/vmstate.h"
  34
  35//#define DEBUG_UNASSIGNED
  36
  37static unsigned memory_region_transaction_depth;
  38static bool memory_region_update_pending;
  39static bool ioeventfd_update_pending;
  40static bool global_dirty_log = false;
  41
  42static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
  43    = QTAILQ_HEAD_INITIALIZER(memory_listeners);
  44
  45static QTAILQ_HEAD(, AddressSpace) address_spaces
  46    = QTAILQ_HEAD_INITIALIZER(address_spaces);
  47
  48static GHashTable *flat_views;
  49
  50typedef struct AddrRange AddrRange;
  51
  52/*
  53 * Note that signed integers are needed for negative offsetting in aliases
  54 * (large MemoryRegion::alias_offset).
  55 */
  56struct AddrRange {
  57    Int128 start;
  58    Int128 size;
  59};
  60
  61static AddrRange addrrange_make(Int128 start, Int128 size)
  62{
  63    return (AddrRange) { start, size };
  64}
  65
  66static bool addrrange_equal(AddrRange r1, AddrRange r2)
  67{
  68    return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
  69}
  70
  71static Int128 addrrange_end(AddrRange r)
  72{
  73    return int128_add(r.start, r.size);
  74}
  75
  76static AddrRange addrrange_shift(AddrRange range, Int128 delta)
  77{
  78    int128_addto(&range.start, delta);
  79    return range;
  80}
  81
  82static bool addrrange_contains(AddrRange range, Int128 addr)
  83{
  84    return int128_ge(addr, range.start)
  85        && int128_lt(addr, addrrange_end(range));
  86}
  87
  88static bool addrrange_intersects(AddrRange r1, AddrRange r2)
  89{
  90    return addrrange_contains(r1, r2.start)
  91        || addrrange_contains(r2, r1.start);
  92}
  93
  94static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
  95{
  96    Int128 start = int128_max(r1.start, r2.start);
  97    Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
  98    return addrrange_make(start, int128_sub(end, start));
  99}
 100
 101enum ListenerDirection { Forward, Reverse };
 102
 103#define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...)    \
 104    do {                                                                \
 105        MemoryListener *_listener;                                      \
 106                                                                        \
 107        switch (_direction) {                                           \
 108        case Forward:                                                   \
 109            QTAILQ_FOREACH(_listener, &memory_listeners, link) {        \
 110                if (_listener->_callback) {                             \
 111                    _listener->_callback(_listener, ##_args);           \
 112                }                                                       \
 113            }                                                           \
 114            break;                                                      \
 115        case Reverse:                                                   \
 116            QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners,        \
 117                                   memory_listeners, link) {            \
 118                if (_listener->_callback) {                             \
 119                    _listener->_callback(_listener, ##_args);           \
 120                }                                                       \
 121            }                                                           \
 122            break;                                                      \
 123        default:                                                        \
 124            abort();                                                    \
 125        }                                                               \
 126    } while (0)
 127
 128#define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
 129    do {                                                                \
 130        MemoryListener *_listener;                                      \
 131        struct memory_listeners_as *list = &(_as)->listeners;           \
 132                                                                        \
 133        switch (_direction) {                                           \
 134        case Forward:                                                   \
 135            QTAILQ_FOREACH(_listener, list, link_as) {                  \
 136                if (_listener->_callback) {                             \
 137                    _listener->_callback(_listener, _section, ##_args); \
 138                }                                                       \
 139            }                                                           \
 140            break;                                                      \
 141        case Reverse:                                                   \
 142            QTAILQ_FOREACH_REVERSE(_listener, list, memory_listeners_as, \
 143                                   link_as) {                           \
 144                if (_listener->_callback) {                             \
 145                    _listener->_callback(_listener, _section, ##_args); \
 146                }                                                       \
 147            }                                                           \
 148            break;                                                      \
 149        default:                                                        \
 150            abort();                                                    \
 151        }                                                               \
 152    } while (0)
 153
 154/* No need to ref/unref .mr, the FlatRange keeps it alive.  */
 155#define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...)  \
 156    do {                                                                \
 157        MemoryRegionSection mrs = section_from_flat_range(fr,           \
 158                address_space_to_flatview(as));                         \
 159        MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args);         \
 160    } while(0)
 161
 162struct CoalescedMemoryRange {
 163    AddrRange addr;
 164    QTAILQ_ENTRY(CoalescedMemoryRange) link;
 165};
 166
 167struct MemoryRegionIoeventfd {
 168    AddrRange addr;
 169    bool match_data;
 170    uint64_t data;
 171    EventNotifier *e;
 172};
 173
 174static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd *a,
 175                                           MemoryRegionIoeventfd *b)
 176{
 177    if (int128_lt(a->addr.start, b->addr.start)) {
 178        return true;
 179    } else if (int128_gt(a->addr.start, b->addr.start)) {
 180        return false;
 181    } else if (int128_lt(a->addr.size, b->addr.size)) {
 182        return true;
 183    } else if (int128_gt(a->addr.size, b->addr.size)) {
 184        return false;
 185    } else if (a->match_data < b->match_data) {
 186        return true;
 187    } else  if (a->match_data > b->match_data) {
 188        return false;
 189    } else if (a->match_data) {
 190        if (a->data < b->data) {
 191            return true;
 192        } else if (a->data > b->data) {
 193            return false;
 194        }
 195    }
 196    if (a->e < b->e) {
 197        return true;
 198    } else if (a->e > b->e) {
 199        return false;
 200    }
 201    return false;
 202}
 203
 204static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd *a,
 205                                          MemoryRegionIoeventfd *b)
 206{
 207    return !memory_region_ioeventfd_before(a, b)
 208        && !memory_region_ioeventfd_before(b, a);
 209}
 210
 211/* Range of memory in the global map.  Addresses are absolute. */
 212struct FlatRange {
 213    MemoryRegion *mr;
 214    hwaddr offset_in_region;
 215    AddrRange addr;
 216    uint8_t dirty_log_mask;
 217    bool romd_mode;
 218    bool readonly;
 219    bool nonvolatile;
 220};
 221
 222#define FOR_EACH_FLAT_RANGE(var, view)          \
 223    for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
 224
 225static inline MemoryRegionSection
 226section_from_flat_range(FlatRange *fr, FlatView *fv)
 227{
 228    return (MemoryRegionSection) {
 229        .mr = fr->mr,
 230        .fv = fv,
 231        .offset_within_region = fr->offset_in_region,
 232        .size = fr->addr.size,
 233        .offset_within_address_space = int128_get64(fr->addr.start),
 234        .readonly = fr->readonly,
 235        .nonvolatile = fr->nonvolatile,
 236    };
 237}
 238
 239static bool flatrange_equal(FlatRange *a, FlatRange *b)
 240{
 241    return a->mr == b->mr
 242        && addrrange_equal(a->addr, b->addr)
 243        && a->offset_in_region == b->offset_in_region
 244        && a->romd_mode == b->romd_mode
 245        && a->readonly == b->readonly
 246        && a->nonvolatile == b->nonvolatile;
 247}
 248
 249static FlatView *flatview_new(MemoryRegion *mr_root)
 250{
 251    FlatView *view;
 252
 253    view = g_new0(FlatView, 1);
 254    view->ref = 1;
 255    view->root = mr_root;
 256    memory_region_ref(mr_root);
 257    trace_flatview_new(view, mr_root);
 258
 259    return view;
 260}
 261
 262/* Insert a range into a given position.  Caller is responsible for maintaining
 263 * sorting order.
 264 */
 265static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
 266{
 267    if (view->nr == view->nr_allocated) {
 268        view->nr_allocated = MAX(2 * view->nr, 10);
 269        view->ranges = g_realloc(view->ranges,
 270                                    view->nr_allocated * sizeof(*view->ranges));
 271    }
 272    memmove(view->ranges + pos + 1, view->ranges + pos,
 273            (view->nr - pos) * sizeof(FlatRange));
 274    view->ranges[pos] = *range;
 275    memory_region_ref(range->mr);
 276    ++view->nr;
 277}
 278
 279static void flatview_destroy(FlatView *view)
 280{
 281    int i;
 282
 283    trace_flatview_destroy(view, view->root);
 284    if (view->dispatch) {
 285        address_space_dispatch_free(view->dispatch);
 286    }
 287    for (i = 0; i < view->nr; i++) {
 288        memory_region_unref(view->ranges[i].mr);
 289    }
 290    g_free(view->ranges);
 291    memory_region_unref(view->root);
 292    g_free(view);
 293}
 294
 295static bool flatview_ref(FlatView *view)
 296{
 297    return atomic_fetch_inc_nonzero(&view->ref) > 0;
 298}
 299
 300void flatview_unref(FlatView *view)
 301{
 302    if (atomic_fetch_dec(&view->ref) == 1) {
 303        trace_flatview_destroy_rcu(view, view->root);
 304        assert(view->root);
 305        call_rcu(view, flatview_destroy, rcu);
 306    }
 307}
 308
 309static bool can_merge(FlatRange *r1, FlatRange *r2)
 310{
 311    return int128_eq(addrrange_end(r1->addr), r2->addr.start)
 312        && r1->mr == r2->mr
 313        && int128_eq(int128_add(int128_make64(r1->offset_in_region),
 314                                r1->addr.size),
 315                     int128_make64(r2->offset_in_region))
 316        && r1->dirty_log_mask == r2->dirty_log_mask
 317        && r1->romd_mode == r2->romd_mode
 318        && r1->readonly == r2->readonly
 319        && r1->nonvolatile == r2->nonvolatile;
 320}
 321
 322/* Attempt to simplify a view by merging adjacent ranges */
 323static void flatview_simplify(FlatView *view)
 324{
 325    unsigned i, j;
 326
 327    i = 0;
 328    while (i < view->nr) {
 329        j = i + 1;
 330        while (j < view->nr
 331               && can_merge(&view->ranges[j-1], &view->ranges[j])) {
 332            int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
 333            ++j;
 334        }
 335        ++i;
 336        memmove(&view->ranges[i], &view->ranges[j],
 337                (view->nr - j) * sizeof(view->ranges[j]));
 338        view->nr -= j - i;
 339    }
 340}
 341
 342static bool memory_region_big_endian(MemoryRegion *mr)
 343{
 344#ifdef TARGET_WORDS_BIGENDIAN
 345    return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
 346#else
 347    return mr->ops->endianness == DEVICE_BIG_ENDIAN;
 348#endif
 349}
 350
 351static bool memory_region_wrong_endianness(MemoryRegion *mr)
 352{
 353#ifdef TARGET_WORDS_BIGENDIAN
 354    return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
 355#else
 356    return mr->ops->endianness == DEVICE_BIG_ENDIAN;
 357#endif
 358}
 359
 360static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
 361{
 362    if (memory_region_wrong_endianness(mr)) {
 363        switch (size) {
 364        case 1:
 365            break;
 366        case 2:
 367            *data = bswap16(*data);
 368            break;
 369        case 4:
 370            *data = bswap32(*data);
 371            break;
 372        case 8:
 373            *data = bswap64(*data);
 374            break;
 375        default:
 376            abort();
 377        }
 378    }
 379}
 380
 381static inline void memory_region_shift_read_access(uint64_t *value,
 382                                                   signed shift,
 383                                                   uint64_t mask,
 384                                                   uint64_t tmp)
 385{
 386    if (shift >= 0) {
 387        *value |= (tmp & mask) << shift;
 388    } else {
 389        *value |= (tmp & mask) >> -shift;
 390    }
 391}
 392
 393static inline uint64_t memory_region_shift_write_access(uint64_t *value,
 394                                                        signed shift,
 395                                                        uint64_t mask)
 396{
 397    uint64_t tmp;
 398
 399    if (shift >= 0) {
 400        tmp = (*value >> shift) & mask;
 401    } else {
 402        tmp = (*value << -shift) & mask;
 403    }
 404
 405    return tmp;
 406}
 407
 408static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
 409{
 410    MemoryRegion *root;
 411    hwaddr abs_addr = offset;
 412
 413    abs_addr += mr->addr;
 414    for (root = mr; root->container; ) {
 415        root = root->container;
 416        abs_addr += root->addr;
 417    }
 418
 419    return abs_addr;
 420}
 421
 422static int get_cpu_index(void)
 423{
 424    if (current_cpu) {
 425        return current_cpu->cpu_index;
 426    }
 427    return -1;
 428}
 429
 430static MemTxResult  memory_region_read_accessor(MemoryRegion *mr,
 431                                                hwaddr addr,
 432                                                uint64_t *value,
 433                                                unsigned size,
 434                                                signed shift,
 435                                                uint64_t mask,
 436                                                MemTxAttrs attrs)
 437{
 438    uint64_t tmp;
 439
 440    tmp = mr->ops->read(mr->opaque, addr, size);
 441    if (mr->subpage) {
 442        trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
 443    } else if (mr == &io_mem_notdirty) {
 444        /* Accesses to code which has previously been translated into a TB show
 445         * up in the MMIO path, as accesses to the io_mem_notdirty
 446         * MemoryRegion. */
 447        trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
 448    } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
 449        hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
 450        trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
 451    }
 452    memory_region_shift_read_access(value, shift, mask, tmp);
 453    return MEMTX_OK;
 454}
 455
 456static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
 457                                                          hwaddr addr,
 458                                                          uint64_t *value,
 459                                                          unsigned size,
 460                                                          signed shift,
 461                                                          uint64_t mask,
 462                                                          MemTxAttrs attrs)
 463{
 464    uint64_t tmp = 0;
 465    MemTxResult r;
 466
 467    r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
 468    if (mr->subpage) {
 469        trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
 470    } else if (mr == &io_mem_notdirty) {
 471        /* Accesses to code which has previously been translated into a TB show
 472         * up in the MMIO path, as accesses to the io_mem_notdirty
 473         * MemoryRegion. */
 474        trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
 475    } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
 476        hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
 477        trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
 478    }
 479    memory_region_shift_read_access(value, shift, mask, tmp);
 480    return r;
 481}
 482
 483static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
 484                                                hwaddr addr,
 485                                                uint64_t *value,
 486                                                unsigned size,
 487                                                signed shift,
 488                                                uint64_t mask,
 489                                                MemTxAttrs attrs)
 490{
 491    uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
 492
 493    if (mr->subpage) {
 494        trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
 495    } else if (mr == &io_mem_notdirty) {
 496        /* Accesses to code which has previously been translated into a TB show
 497         * up in the MMIO path, as accesses to the io_mem_notdirty
 498         * MemoryRegion. */
 499        trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
 500    } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
 501        hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
 502        trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
 503    }
 504    mr->ops->write(mr->opaque, addr, tmp, size);
 505    return MEMTX_OK;
 506}
 507
 508static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
 509                                                           hwaddr addr,
 510                                                           uint64_t *value,
 511                                                           unsigned size,
 512                                                           signed shift,
 513                                                           uint64_t mask,
 514                                                           MemTxAttrs attrs)
 515{
 516    uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
 517
 518    if (mr->subpage) {
 519        trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
 520    } else if (mr == &io_mem_notdirty) {
 521        /* Accesses to code which has previously been translated into a TB show
 522         * up in the MMIO path, as accesses to the io_mem_notdirty
 523         * MemoryRegion. */
 524        trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
 525    } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
 526        hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
 527        trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
 528    }
 529    return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
 530}
 531
 532static MemTxResult access_with_adjusted_size(hwaddr addr,
 533                                      uint64_t *value,
 534                                      unsigned size,
 535                                      unsigned access_size_min,
 536                                      unsigned access_size_max,
 537                                      MemTxResult (*access_fn)
 538                                                  (MemoryRegion *mr,
 539                                                   hwaddr addr,
 540                                                   uint64_t *value,
 541                                                   unsigned size,
 542                                                   signed shift,
 543                                                   uint64_t mask,
 544                                                   MemTxAttrs attrs),
 545                                      MemoryRegion *mr,
 546                                      MemTxAttrs attrs)
 547{
 548    uint64_t access_mask;
 549    unsigned access_size;
 550    unsigned i;
 551    MemTxResult r = MEMTX_OK;
 552
 553    if (!access_size_min) {
 554        access_size_min = 1;
 555    }
 556    if (!access_size_max) {
 557        access_size_max = 4;
 558    }
 559
 560    /* FIXME: support unaligned access? */
 561    access_size = MAX(MIN(size, access_size_max), access_size_min);
 562    access_mask = MAKE_64BIT_MASK(0, access_size * 8);
 563    if (memory_region_big_endian(mr)) {
 564        for (i = 0; i < size; i += access_size) {
 565            r |= access_fn(mr, addr + i, value, access_size,
 566                        (size - access_size - i) * 8, access_mask, attrs);
 567        }
 568    } else {
 569        for (i = 0; i < size; i += access_size) {
 570            r |= access_fn(mr, addr + i, value, access_size, i * 8,
 571                        access_mask, attrs);
 572        }
 573    }
 574    return r;
 575}
 576
 577static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
 578{
 579    AddressSpace *as;
 580
 581    while (mr->container) {
 582        mr = mr->container;
 583    }
 584    QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
 585        if (mr == as->root) {
 586            return as;
 587        }
 588    }
 589    return NULL;
 590}
 591
 592/* Render a memory region into the global view.  Ranges in @view obscure
 593 * ranges in @mr.
 594 */
 595static void render_memory_region(FlatView *view,
 596                                 MemoryRegion *mr,
 597                                 Int128 base,
 598                                 AddrRange clip,
 599                                 bool readonly,
 600                                 bool nonvolatile)
 601{
 602    MemoryRegion *subregion;
 603    unsigned i;
 604    hwaddr offset_in_region;
 605    Int128 remain;
 606    Int128 now;
 607    FlatRange fr;
 608    AddrRange tmp;
 609
 610    if (!mr->enabled) {
 611        return;
 612    }
 613
 614    int128_addto(&base, int128_make64(mr->addr));
 615    readonly |= mr->readonly;
 616    nonvolatile |= mr->nonvolatile;
 617
 618    tmp = addrrange_make(base, mr->size);
 619
 620    if (!addrrange_intersects(tmp, clip)) {
 621        return;
 622    }
 623
 624    clip = addrrange_intersection(tmp, clip);
 625
 626    if (mr->alias) {
 627        int128_subfrom(&base, int128_make64(mr->alias->addr));
 628        int128_subfrom(&base, int128_make64(mr->alias_offset));
 629        render_memory_region(view, mr->alias, base, clip,
 630                             readonly, nonvolatile);
 631        return;
 632    }
 633
 634    /* Render subregions in priority order. */
 635    QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
 636        render_memory_region(view, subregion, base, clip,
 637                             readonly, nonvolatile);
 638    }
 639
 640    if (!mr->terminates) {
 641        return;
 642    }
 643
 644    offset_in_region = int128_get64(int128_sub(clip.start, base));
 645    base = clip.start;
 646    remain = clip.size;
 647
 648    fr.mr = mr;
 649    fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
 650    fr.romd_mode = mr->romd_mode;
 651    fr.readonly = readonly;
 652    fr.nonvolatile = nonvolatile;
 653
 654    /* Render the region itself into any gaps left by the current view. */
 655    for (i = 0; i < view->nr && int128_nz(remain); ++i) {
 656        if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
 657            continue;
 658        }
 659        if (int128_lt(base, view->ranges[i].addr.start)) {
 660            now = int128_min(remain,
 661                             int128_sub(view->ranges[i].addr.start, base));
 662            fr.offset_in_region = offset_in_region;
 663            fr.addr = addrrange_make(base, now);
 664            flatview_insert(view, i, &fr);
 665            ++i;
 666            int128_addto(&base, now);
 667            offset_in_region += int128_get64(now);
 668            int128_subfrom(&remain, now);
 669        }
 670        now = int128_sub(int128_min(int128_add(base, remain),
 671                                    addrrange_end(view->ranges[i].addr)),
 672                         base);
 673        int128_addto(&base, now);
 674        offset_in_region += int128_get64(now);
 675        int128_subfrom(&remain, now);
 676    }
 677    if (int128_nz(remain)) {
 678        fr.offset_in_region = offset_in_region;
 679        fr.addr = addrrange_make(base, remain);
 680        flatview_insert(view, i, &fr);
 681    }
 682}
 683
 684static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr)
 685{
 686    while (mr->enabled) {
 687        if (mr->alias) {
 688            if (!mr->alias_offset && int128_ge(mr->size, mr->alias->size)) {
 689                /* The alias is included in its entirety.  Use it as
 690                 * the "real" root, so that we can share more FlatViews.
 691                 */
 692                mr = mr->alias;
 693                continue;
 694            }
 695        } else if (!mr->terminates) {
 696            unsigned int found = 0;
 697            MemoryRegion *child, *next = NULL;
 698            QTAILQ_FOREACH(child, &mr->subregions, subregions_link) {
 699                if (child->enabled) {
 700                    if (++found > 1) {
 701                        next = NULL;
 702                        break;
 703                    }
 704                    if (!child->addr && int128_ge(mr->size, child->size)) {
 705                        /* A child is included in its entirety.  If it's the only
 706                         * enabled one, use it in the hope of finding an alias down the
 707                         * way. This will also let us share FlatViews.
 708                         */
 709                        next = child;
 710                    }
 711                }
 712            }
 713            if (found == 0) {
 714                return NULL;
 715            }
 716            if (next) {
 717                mr = next;
 718                continue;
 719            }
 720        }
 721
 722        return mr;
 723    }
 724
 725    return NULL;
 726}
 727
 728/* Render a memory topology into a list of disjoint absolute ranges. */
 729static FlatView *generate_memory_topology(MemoryRegion *mr)
 730{
 731    int i;
 732    FlatView *view;
 733
 734    view = flatview_new(mr);
 735
 736    if (mr) {
 737        render_memory_region(view, mr, int128_zero(),
 738                             addrrange_make(int128_zero(), int128_2_64()),
 739                             false, false);
 740    }
 741    flatview_simplify(view);
 742
 743    view->dispatch = address_space_dispatch_new(view);
 744    for (i = 0; i < view->nr; i++) {
 745        MemoryRegionSection mrs =
 746            section_from_flat_range(&view->ranges[i], view);
 747        flatview_add_to_dispatch(view, &mrs);
 748    }
 749    address_space_dispatch_compact(view->dispatch);
 750    g_hash_table_replace(flat_views, mr, view);
 751
 752    return view;
 753}
 754
 755static void address_space_add_del_ioeventfds(AddressSpace *as,
 756                                             MemoryRegionIoeventfd *fds_new,
 757                                             unsigned fds_new_nb,
 758                                             MemoryRegionIoeventfd *fds_old,
 759                                             unsigned fds_old_nb)
 760{
 761    unsigned iold, inew;
 762    MemoryRegionIoeventfd *fd;
 763    MemoryRegionSection section;
 764
 765    /* Generate a symmetric difference of the old and new fd sets, adding
 766     * and deleting as necessary.
 767     */
 768
 769    iold = inew = 0;
 770    while (iold < fds_old_nb || inew < fds_new_nb) {
 771        if (iold < fds_old_nb
 772            && (inew == fds_new_nb
 773                || memory_region_ioeventfd_before(&fds_old[iold],
 774                                                  &fds_new[inew]))) {
 775            fd = &fds_old[iold];
 776            section = (MemoryRegionSection) {
 777                .fv = address_space_to_flatview(as),
 778                .offset_within_address_space = int128_get64(fd->addr.start),
 779                .size = fd->addr.size,
 780            };
 781            MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
 782                                 fd->match_data, fd->data, fd->e);
 783            ++iold;
 784        } else if (inew < fds_new_nb
 785                   && (iold == fds_old_nb
 786                       || memory_region_ioeventfd_before(&fds_new[inew],
 787                                                         &fds_old[iold]))) {
 788            fd = &fds_new[inew];
 789            section = (MemoryRegionSection) {
 790                .fv = address_space_to_flatview(as),
 791                .offset_within_address_space = int128_get64(fd->addr.start),
 792                .size = fd->addr.size,
 793            };
 794            MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
 795                                 fd->match_data, fd->data, fd->e);
 796            ++inew;
 797        } else {
 798            ++iold;
 799            ++inew;
 800        }
 801    }
 802}
 803
 804FlatView *address_space_get_flatview(AddressSpace *as)
 805{
 806    FlatView *view;
 807
 808    rcu_read_lock();
 809    do {
 810        view = address_space_to_flatview(as);
 811        /* If somebody has replaced as->current_map concurrently,
 812         * flatview_ref returns false.
 813         */
 814    } while (!flatview_ref(view));
 815    rcu_read_unlock();
 816    return view;
 817}
 818
 819static void address_space_update_ioeventfds(AddressSpace *as)
 820{
 821    FlatView *view;
 822    FlatRange *fr;
 823    unsigned ioeventfd_nb = 0;
 824    MemoryRegionIoeventfd *ioeventfds = NULL;
 825    AddrRange tmp;
 826    unsigned i;
 827
 828    view = address_space_get_flatview(as);
 829    FOR_EACH_FLAT_RANGE(fr, view) {
 830        for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
 831            tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
 832                                  int128_sub(fr->addr.start,
 833                                             int128_make64(fr->offset_in_region)));
 834            if (addrrange_intersects(fr->addr, tmp)) {
 835                ++ioeventfd_nb;
 836                ioeventfds = g_realloc(ioeventfds,
 837                                          ioeventfd_nb * sizeof(*ioeventfds));
 838                ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
 839                ioeventfds[ioeventfd_nb-1].addr = tmp;
 840            }
 841        }
 842    }
 843
 844    address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
 845                                     as->ioeventfds, as->ioeventfd_nb);
 846
 847    g_free(as->ioeventfds);
 848    as->ioeventfds = ioeventfds;
 849    as->ioeventfd_nb = ioeventfd_nb;
 850    flatview_unref(view);
 851}
 852
 853static void address_space_update_topology_pass(AddressSpace *as,
 854                                               const FlatView *old_view,
 855                                               const FlatView *new_view,
 856                                               bool adding)
 857{
 858    unsigned iold, inew;
 859    FlatRange *frold, *frnew;
 860
 861    /* Generate a symmetric difference of the old and new memory maps.
 862     * Kill ranges in the old map, and instantiate ranges in the new map.
 863     */
 864    iold = inew = 0;
 865    while (iold < old_view->nr || inew < new_view->nr) {
 866        if (iold < old_view->nr) {
 867            frold = &old_view->ranges[iold];
 868        } else {
 869            frold = NULL;
 870        }
 871        if (inew < new_view->nr) {
 872            frnew = &new_view->ranges[inew];
 873        } else {
 874            frnew = NULL;
 875        }
 876
 877        if (frold
 878            && (!frnew
 879                || int128_lt(frold->addr.start, frnew->addr.start)
 880                || (int128_eq(frold->addr.start, frnew->addr.start)
 881                    && !flatrange_equal(frold, frnew)))) {
 882            /* In old but not in new, or in both but attributes changed. */
 883
 884            if (!adding) {
 885                MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
 886            }
 887
 888            ++iold;
 889        } else if (frold && frnew && flatrange_equal(frold, frnew)) {
 890            /* In both and unchanged (except logging may have changed) */
 891
 892            if (adding) {
 893                MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
 894                if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
 895                    MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
 896                                                  frold->dirty_log_mask,
 897                                                  frnew->dirty_log_mask);
 898                }
 899                if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
 900                    MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
 901                                                  frold->dirty_log_mask,
 902                                                  frnew->dirty_log_mask);
 903                }
 904            }
 905
 906            ++iold;
 907            ++inew;
 908        } else {
 909            /* In new */
 910
 911            if (adding) {
 912                MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
 913            }
 914
 915            ++inew;
 916        }
 917    }
 918}
 919
 920static void flatviews_init(void)
 921{
 922    static FlatView *empty_view;
 923
 924    if (flat_views) {
 925        return;
 926    }
 927
 928    flat_views = g_hash_table_new_full(g_direct_hash, g_direct_equal, NULL,
 929                                       (GDestroyNotify) flatview_unref);
 930    if (!empty_view) {
 931        empty_view = generate_memory_topology(NULL);
 932        /* We keep it alive forever in the global variable.  */
 933        flatview_ref(empty_view);
 934    } else {
 935        g_hash_table_replace(flat_views, NULL, empty_view);
 936        flatview_ref(empty_view);
 937    }
 938}
 939
 940static void flatviews_reset(void)
 941{
 942    AddressSpace *as;
 943
 944    if (flat_views) {
 945        g_hash_table_unref(flat_views);
 946        flat_views = NULL;
 947    }
 948    flatviews_init();
 949
 950    /* Render unique FVs */
 951    QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
 952        MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
 953
 954        if (g_hash_table_lookup(flat_views, physmr)) {
 955            continue;
 956        }
 957
 958        generate_memory_topology(physmr);
 959    }
 960}
 961
 962static void address_space_set_flatview(AddressSpace *as)
 963{
 964    FlatView *old_view = address_space_to_flatview(as);
 965    MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
 966    FlatView *new_view = g_hash_table_lookup(flat_views, physmr);
 967
 968    assert(new_view);
 969
 970    if (old_view == new_view) {
 971        return;
 972    }
 973
 974    if (old_view) {
 975        flatview_ref(old_view);
 976    }
 977
 978    flatview_ref(new_view);
 979
 980    if (!QTAILQ_EMPTY(&as->listeners)) {
 981        FlatView tmpview = { .nr = 0 }, *old_view2 = old_view;
 982
 983        if (!old_view2) {
 984            old_view2 = &tmpview;
 985        }
 986        address_space_update_topology_pass(as, old_view2, new_view, false);
 987        address_space_update_topology_pass(as, old_view2, new_view, true);
 988    }
 989
 990    /* Writes are protected by the BQL.  */
 991    atomic_rcu_set(&as->current_map, new_view);
 992    if (old_view) {
 993        flatview_unref(old_view);
 994    }
 995
 996    /* Note that all the old MemoryRegions are still alive up to this
 997     * point.  This relieves most MemoryListeners from the need to
 998     * ref/unref the MemoryRegions they get---unless they use them
 999     * outside the iothread mutex, in which case precise reference
1000     * counting is necessary.
1001     */
1002    if (old_view) {
1003        flatview_unref(old_view);
1004    }
1005}
1006
1007static void address_space_update_topology(AddressSpace *as)
1008{
1009    MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1010
1011    flatviews_init();
1012    if (!g_hash_table_lookup(flat_views, physmr)) {
1013        generate_memory_topology(physmr);
1014    }
1015    address_space_set_flatview(as);
1016}
1017
1018void memory_region_transaction_begin(void)
1019{
1020    qemu_flush_coalesced_mmio_buffer();
1021    ++memory_region_transaction_depth;
1022}
1023
1024void memory_region_transaction_commit(void)
1025{
1026    AddressSpace *as;
1027
1028    assert(memory_region_transaction_depth);
1029    assert(qemu_mutex_iothread_locked());
1030
1031    --memory_region_transaction_depth;
1032    if (!memory_region_transaction_depth) {
1033        if (memory_region_update_pending) {
1034            flatviews_reset();
1035
1036            MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
1037
1038            QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1039                address_space_set_flatview(as);
1040                address_space_update_ioeventfds(as);
1041            }
1042            memory_region_update_pending = false;
1043            ioeventfd_update_pending = false;
1044            MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
1045        } else if (ioeventfd_update_pending) {
1046            QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1047                address_space_update_ioeventfds(as);
1048            }
1049            ioeventfd_update_pending = false;
1050        }
1051   }
1052}
1053
1054static void memory_region_destructor_none(MemoryRegion *mr)
1055{
1056}
1057
1058static void memory_region_destructor_ram(MemoryRegion *mr)
1059{
1060    qemu_ram_free(mr->ram_block);
1061}
1062
1063static bool memory_region_need_escape(char c)
1064{
1065    return c == '/' || c == '[' || c == '\\' || c == ']';
1066}
1067
1068static char *memory_region_escape_name(const char *name)
1069{
1070    const char *p;
1071    char *escaped, *q;
1072    uint8_t c;
1073    size_t bytes = 0;
1074
1075    for (p = name; *p; p++) {
1076        bytes += memory_region_need_escape(*p) ? 4 : 1;
1077    }
1078    if (bytes == p - name) {
1079       return g_memdup(name, bytes + 1);
1080    }
1081
1082    escaped = g_malloc(bytes + 1);
1083    for (p = name, q = escaped; *p; p++) {
1084        c = *p;
1085        if (unlikely(memory_region_need_escape(c))) {
1086            *q++ = '\\';
1087            *q++ = 'x';
1088            *q++ = "0123456789abcdef"[c >> 4];
1089            c = "0123456789abcdef"[c & 15];
1090        }
1091        *q++ = c;
1092    }
1093    *q = 0;
1094    return escaped;
1095}
1096
1097static void memory_region_do_init(MemoryRegion *mr,
1098                                  Object *owner,
1099                                  const char *name,
1100                                  uint64_t size)
1101{
1102    mr->size = int128_make64(size);
1103    if (size == UINT64_MAX) {
1104        mr->size = int128_2_64();
1105    }
1106    mr->name = g_strdup(name);
1107    mr->owner = owner;
1108    mr->ram_block = NULL;
1109
1110    if (name) {
1111        char *escaped_name = memory_region_escape_name(name);
1112        char *name_array = g_strdup_printf("%s[*]", escaped_name);
1113
1114        if (!owner) {
1115            owner = container_get(qdev_get_machine(), "/unattached");
1116        }
1117
1118        object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
1119        object_unref(OBJECT(mr));
1120        g_free(name_array);
1121        g_free(escaped_name);
1122    }
1123}
1124
1125void memory_region_init(MemoryRegion *mr,
1126                        Object *owner,
1127                        const char *name,
1128                        uint64_t size)
1129{
1130    object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
1131    memory_region_do_init(mr, owner, name, size);
1132}
1133
1134static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
1135                                   void *opaque, Error **errp)
1136{
1137    MemoryRegion *mr = MEMORY_REGION(obj);
1138    uint64_t value = mr->addr;
1139
1140    visit_type_uint64(v, name, &value, errp);
1141}
1142
1143static void memory_region_get_container(Object *obj, Visitor *v,
1144                                        const char *name, void *opaque,
1145                                        Error **errp)
1146{
1147    MemoryRegion *mr = MEMORY_REGION(obj);
1148    gchar *path = (gchar *)"";
1149
1150    if (mr->container) {
1151        path = object_get_canonical_path(OBJECT(mr->container));
1152    }
1153    visit_type_str(v, name, &path, errp);
1154    if (mr->container) {
1155        g_free(path);
1156    }
1157}
1158
1159static Object *memory_region_resolve_container(Object *obj, void *opaque,
1160                                               const char *part)
1161{
1162    MemoryRegion *mr = MEMORY_REGION(obj);
1163
1164    return OBJECT(mr->container);
1165}
1166
1167static void memory_region_get_priority(Object *obj, Visitor *v,
1168                                       const char *name, void *opaque,
1169                                       Error **errp)
1170{
1171    MemoryRegion *mr = MEMORY_REGION(obj);
1172    int32_t value = mr->priority;
1173
1174    visit_type_int32(v, name, &value, errp);
1175}
1176
1177static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1178                                   void *opaque, Error **errp)
1179{
1180    MemoryRegion *mr = MEMORY_REGION(obj);
1181    uint64_t value = memory_region_size(mr);
1182
1183    visit_type_uint64(v, name, &value, errp);
1184}
1185
1186static void memory_region_initfn(Object *obj)
1187{
1188    MemoryRegion *mr = MEMORY_REGION(obj);
1189    ObjectProperty *op;
1190
1191    mr->ops = &unassigned_mem_ops;
1192    mr->enabled = true;
1193    mr->romd_mode = true;
1194    mr->global_locking = true;
1195    mr->destructor = memory_region_destructor_none;
1196    QTAILQ_INIT(&mr->subregions);
1197    QTAILQ_INIT(&mr->coalesced);
1198
1199    op = object_property_add(OBJECT(mr), "container",
1200                             "link<" TYPE_MEMORY_REGION ">",
1201                             memory_region_get_container,
1202                             NULL, /* memory_region_set_container */
1203                             NULL, NULL, &error_abort);
1204    op->resolve = memory_region_resolve_container;
1205
1206    object_property_add(OBJECT(mr), "addr", "uint64",
1207                        memory_region_get_addr,
1208                        NULL, /* memory_region_set_addr */
1209                        NULL, NULL, &error_abort);
1210    object_property_add(OBJECT(mr), "priority", "uint32",
1211                        memory_region_get_priority,
1212                        NULL, /* memory_region_set_priority */
1213                        NULL, NULL, &error_abort);
1214    object_property_add(OBJECT(mr), "size", "uint64",
1215                        memory_region_get_size,
1216                        NULL, /* memory_region_set_size, */
1217                        NULL, NULL, &error_abort);
1218}
1219
1220static void iommu_memory_region_initfn(Object *obj)
1221{
1222    MemoryRegion *mr = MEMORY_REGION(obj);
1223
1224    mr->is_iommu = true;
1225}
1226
1227static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1228                                    unsigned size)
1229{
1230#ifdef DEBUG_UNASSIGNED
1231    printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1232#endif
1233    if (current_cpu != NULL) {
1234        bool is_exec = current_cpu->mem_io_access_type == MMU_INST_FETCH;
1235        cpu_unassigned_access(current_cpu, addr, false, is_exec, 0, size);
1236    }
1237    return 0;
1238}
1239
1240static void unassigned_mem_write(void *opaque, hwaddr addr,
1241                                 uint64_t val, unsigned size)
1242{
1243#ifdef DEBUG_UNASSIGNED
1244    printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1245#endif
1246    if (current_cpu != NULL) {
1247        cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1248    }
1249}
1250
1251static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1252                                   unsigned size, bool is_write,
1253                                   MemTxAttrs attrs)
1254{
1255    return false;
1256}
1257
1258const MemoryRegionOps unassigned_mem_ops = {
1259    .valid.accepts = unassigned_mem_accepts,
1260    .endianness = DEVICE_NATIVE_ENDIAN,
1261};
1262
1263static uint64_t memory_region_ram_device_read(void *opaque,
1264                                              hwaddr addr, unsigned size)
1265{
1266    MemoryRegion *mr = opaque;
1267    uint64_t data = (uint64_t)~0;
1268
1269    switch (size) {
1270    case 1:
1271        data = *(uint8_t *)(mr->ram_block->host + addr);
1272        break;
1273    case 2:
1274        data = *(uint16_t *)(mr->ram_block->host + addr);
1275        break;
1276    case 4:
1277        data = *(uint32_t *)(mr->ram_block->host + addr);
1278        break;
1279    case 8:
1280        data = *(uint64_t *)(mr->ram_block->host + addr);
1281        break;
1282    }
1283
1284    trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1285
1286    return data;
1287}
1288
1289static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1290                                           uint64_t data, unsigned size)
1291{
1292    MemoryRegion *mr = opaque;
1293
1294    trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1295
1296    switch (size) {
1297    case 1:
1298        *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
1299        break;
1300    case 2:
1301        *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
1302        break;
1303    case 4:
1304        *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
1305        break;
1306    case 8:
1307        *(uint64_t *)(mr->ram_block->host + addr) = data;
1308        break;
1309    }
1310}
1311
1312static const MemoryRegionOps ram_device_mem_ops = {
1313    .read = memory_region_ram_device_read,
1314    .write = memory_region_ram_device_write,
1315    .endianness = DEVICE_HOST_ENDIAN,
1316    .valid = {
1317        .min_access_size = 1,
1318        .max_access_size = 8,
1319        .unaligned = true,
1320    },
1321    .impl = {
1322        .min_access_size = 1,
1323        .max_access_size = 8,
1324        .unaligned = true,
1325    },
1326};
1327
1328bool memory_region_access_valid(MemoryRegion *mr,
1329                                hwaddr addr,
1330                                unsigned size,
1331                                bool is_write,
1332                                MemTxAttrs attrs)
1333{
1334    int access_size_min, access_size_max;
1335    int access_size, i;
1336
1337    if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1338        return false;
1339    }
1340
1341    if (!mr->ops->valid.accepts) {
1342        return true;
1343    }
1344
1345    access_size_min = mr->ops->valid.min_access_size;
1346    if (!mr->ops->valid.min_access_size) {
1347        access_size_min = 1;
1348    }
1349
1350    access_size_max = mr->ops->valid.max_access_size;
1351    if (!mr->ops->valid.max_access_size) {
1352        access_size_max = 4;
1353    }
1354
1355    access_size = MAX(MIN(size, access_size_max), access_size_min);
1356    for (i = 0; i < size; i += access_size) {
1357        if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1358                                    is_write, attrs)) {
1359            return false;
1360        }
1361    }
1362
1363    return true;
1364}
1365
1366static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1367                                                hwaddr addr,
1368                                                uint64_t *pval,
1369                                                unsigned size,
1370                                                MemTxAttrs attrs)
1371{
1372    *pval = 0;
1373
1374    if (mr->ops->read) {
1375        return access_with_adjusted_size(addr, pval, size,
1376                                         mr->ops->impl.min_access_size,
1377                                         mr->ops->impl.max_access_size,
1378                                         memory_region_read_accessor,
1379                                         mr, attrs);
1380    } else {
1381        return access_with_adjusted_size(addr, pval, size,
1382                                         mr->ops->impl.min_access_size,
1383                                         mr->ops->impl.max_access_size,
1384                                         memory_region_read_with_attrs_accessor,
1385                                         mr, attrs);
1386    }
1387}
1388
1389MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1390                                        hwaddr addr,
1391                                        uint64_t *pval,
1392                                        unsigned size,
1393                                        MemTxAttrs attrs)
1394{
1395    MemTxResult r;
1396
1397    if (!memory_region_access_valid(mr, addr, size, false, attrs)) {
1398        *pval = unassigned_mem_read(mr, addr, size);
1399        return MEMTX_DECODE_ERROR;
1400    }
1401
1402    r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1403    adjust_endianness(mr, pval, size);
1404    return r;
1405}
1406
1407/* Return true if an eventfd was signalled */
1408static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1409                                                    hwaddr addr,
1410                                                    uint64_t data,
1411                                                    unsigned size,
1412                                                    MemTxAttrs attrs)
1413{
1414    MemoryRegionIoeventfd ioeventfd = {
1415        .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1416        .data = data,
1417    };
1418    unsigned i;
1419
1420    for (i = 0; i < mr->ioeventfd_nb; i++) {
1421        ioeventfd.match_data = mr->ioeventfds[i].match_data;
1422        ioeventfd.e = mr->ioeventfds[i].e;
1423
1424        if (memory_region_ioeventfd_equal(&ioeventfd, &mr->ioeventfds[i])) {
1425            event_notifier_set(ioeventfd.e);
1426            return true;
1427        }
1428    }
1429
1430    return false;
1431}
1432
1433MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1434                                         hwaddr addr,
1435                                         uint64_t data,
1436                                         unsigned size,
1437                                         MemTxAttrs attrs)
1438{
1439    if (!memory_region_access_valid(mr, addr, size, true, attrs)) {
1440        unassigned_mem_write(mr, addr, data, size);
1441        return MEMTX_DECODE_ERROR;
1442    }
1443
1444    adjust_endianness(mr, &data, size);
1445
1446    if ((!kvm_eventfds_enabled()) &&
1447        memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1448        return MEMTX_OK;
1449    }
1450
1451    if (mr->ops->write) {
1452        return access_with_adjusted_size(addr, &data, size,
1453                                         mr->ops->impl.min_access_size,
1454                                         mr->ops->impl.max_access_size,
1455                                         memory_region_write_accessor, mr,
1456                                         attrs);
1457    } else {
1458        return
1459            access_with_adjusted_size(addr, &data, size,
1460                                      mr->ops->impl.min_access_size,
1461                                      mr->ops->impl.max_access_size,
1462                                      memory_region_write_with_attrs_accessor,
1463                                      mr, attrs);
1464    }
1465}
1466
1467void memory_region_init_io(MemoryRegion *mr,
1468                           Object *owner,
1469                           const MemoryRegionOps *ops,
1470                           void *opaque,
1471                           const char *name,
1472                           uint64_t size)
1473{
1474    memory_region_init(mr, owner, name, size);
1475    mr->ops = ops ? ops : &unassigned_mem_ops;
1476    mr->opaque = opaque;
1477    mr->terminates = true;
1478}
1479
1480void memory_region_init_ram_nomigrate(MemoryRegion *mr,
1481                                      Object *owner,
1482                                      const char *name,
1483                                      uint64_t size,
1484                                      Error **errp)
1485{
1486    memory_region_init_ram_shared_nomigrate(mr, owner, name, size, false, errp);
1487}
1488
1489void memory_region_init_ram_shared_nomigrate(MemoryRegion *mr,
1490                                             Object *owner,
1491                                             const char *name,
1492                                             uint64_t size,
1493                                             bool share,
1494                                             Error **errp)
1495{
1496    Error *err = NULL;
1497    memory_region_init(mr, owner, name, size);
1498    mr->ram = true;
1499    mr->terminates = true;
1500    mr->destructor = memory_region_destructor_ram;
1501    mr->ram_block = qemu_ram_alloc(size, share, mr, &err);
1502    mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1503    if (err) {
1504        mr->size = int128_zero();
1505        object_unparent(OBJECT(mr));
1506        error_propagate(errp, err);
1507    }
1508}
1509
1510void memory_region_init_resizeable_ram(MemoryRegion *mr,
1511                                       Object *owner,
1512                                       const char *name,
1513                                       uint64_t size,
1514                                       uint64_t max_size,
1515                                       void (*resized)(const char*,
1516                                                       uint64_t length,
1517                                                       void *host),
1518                                       Error **errp)
1519{
1520    Error *err = NULL;
1521    memory_region_init(mr, owner, name, size);
1522    mr->ram = true;
1523    mr->terminates = true;
1524    mr->destructor = memory_region_destructor_ram;
1525    mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1526                                              mr, &err);
1527    mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1528    if (err) {
1529        mr->size = int128_zero();
1530        object_unparent(OBJECT(mr));
1531        error_propagate(errp, err);
1532    }
1533}
1534
1535#ifdef CONFIG_POSIX
1536void memory_region_init_ram_from_file(MemoryRegion *mr,
1537                                      struct Object *owner,
1538                                      const char *name,
1539                                      uint64_t size,
1540                                      uint64_t align,
1541                                      uint32_t ram_flags,
1542                                      const char *path,
1543                                      Error **errp)
1544{
1545    Error *err = NULL;
1546    memory_region_init(mr, owner, name, size);
1547    mr->ram = true;
1548    mr->terminates = true;
1549    mr->destructor = memory_region_destructor_ram;
1550    mr->align = align;
1551    mr->ram_block = qemu_ram_alloc_from_file(size, mr, ram_flags, path, &err);
1552    mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1553    if (err) {
1554        mr->size = int128_zero();
1555        object_unparent(OBJECT(mr));
1556        error_propagate(errp, err);
1557    }
1558}
1559
1560void memory_region_init_ram_from_fd(MemoryRegion *mr,
1561                                    struct Object *owner,
1562                                    const char *name,
1563                                    uint64_t size,
1564                                    bool share,
1565                                    int fd,
1566                                    Error **errp)
1567{
1568    Error *err = NULL;
1569    memory_region_init(mr, owner, name, size);
1570    mr->ram = true;
1571    mr->terminates = true;
1572    mr->destructor = memory_region_destructor_ram;
1573    mr->ram_block = qemu_ram_alloc_from_fd(size, mr,
1574                                           share ? RAM_SHARED : 0,
1575                                           fd, &err);
1576    mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1577    if (err) {
1578        mr->size = int128_zero();
1579        object_unparent(OBJECT(mr));
1580        error_propagate(errp, err);
1581    }
1582}
1583#endif
1584
1585void memory_region_init_ram_ptr(MemoryRegion *mr,
1586                                Object *owner,
1587                                const char *name,
1588                                uint64_t size,
1589                                void *ptr)
1590{
1591    memory_region_init(mr, owner, name, size);
1592    mr->ram = true;
1593    mr->terminates = true;
1594    mr->destructor = memory_region_destructor_ram;
1595    mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1596
1597    /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL.  */
1598    assert(ptr != NULL);
1599    mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1600}
1601
1602void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1603                                       Object *owner,
1604                                       const char *name,
1605                                       uint64_t size,
1606                                       void *ptr)
1607{
1608    memory_region_init_ram_ptr(mr, owner, name, size, ptr);
1609    mr->ram_device = true;
1610    mr->ops = &ram_device_mem_ops;
1611    mr->opaque = mr;
1612}
1613
1614void memory_region_init_alias(MemoryRegion *mr,
1615                              Object *owner,
1616                              const char *name,
1617                              MemoryRegion *orig,
1618                              hwaddr offset,
1619                              uint64_t size)
1620{
1621    memory_region_init(mr, owner, name, size);
1622    mr->alias = orig;
1623    mr->alias_offset = offset;
1624}
1625
1626void memory_region_init_rom_nomigrate(MemoryRegion *mr,
1627                                      struct Object *owner,
1628                                      const char *name,
1629                                      uint64_t size,
1630                                      Error **errp)
1631{
1632    Error *err = NULL;
1633    memory_region_init(mr, owner, name, size);
1634    mr->ram = true;
1635    mr->readonly = true;
1636    mr->terminates = true;
1637    mr->destructor = memory_region_destructor_ram;
1638    mr->ram_block = qemu_ram_alloc(size, false, mr, &err);
1639    mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1640    if (err) {
1641        mr->size = int128_zero();
1642        object_unparent(OBJECT(mr));
1643        error_propagate(errp, err);
1644    }
1645}
1646
1647void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
1648                                             Object *owner,
1649                                             const MemoryRegionOps *ops,
1650                                             void *opaque,
1651                                             const char *name,
1652                                             uint64_t size,
1653                                             Error **errp)
1654{
1655    Error *err = NULL;
1656    assert(ops);
1657    memory_region_init(mr, owner, name, size);
1658    mr->ops = ops;
1659    mr->opaque = opaque;
1660    mr->terminates = true;
1661    mr->rom_device = true;
1662    mr->destructor = memory_region_destructor_ram;
1663    mr->ram_block = qemu_ram_alloc(size, false,  mr, &err);
1664    if (err) {
1665        mr->size = int128_zero();
1666        object_unparent(OBJECT(mr));
1667        error_propagate(errp, err);
1668    }
1669}
1670
1671void memory_region_init_iommu(void *_iommu_mr,
1672                              size_t instance_size,
1673                              const char *mrtypename,
1674                              Object *owner,
1675                              const char *name,
1676                              uint64_t size)
1677{
1678    struct IOMMUMemoryRegion *iommu_mr;
1679    struct MemoryRegion *mr;
1680
1681    object_initialize(_iommu_mr, instance_size, mrtypename);
1682    mr = MEMORY_REGION(_iommu_mr);
1683    memory_region_do_init(mr, owner, name, size);
1684    iommu_mr = IOMMU_MEMORY_REGION(mr);
1685    mr->terminates = true;  /* then re-forwards */
1686    QLIST_INIT(&iommu_mr->iommu_notify);
1687    iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
1688}
1689
1690static void memory_region_finalize(Object *obj)
1691{
1692    MemoryRegion *mr = MEMORY_REGION(obj);
1693
1694    assert(!mr->container);
1695
1696    /* We know the region is not visible in any address space (it
1697     * does not have a container and cannot be a root either because
1698     * it has no references, so we can blindly clear mr->enabled.
1699     * memory_region_set_enabled instead could trigger a transaction
1700     * and cause an infinite loop.
1701     */
1702    mr->enabled = false;
1703    memory_region_transaction_begin();
1704    while (!QTAILQ_EMPTY(&mr->subregions)) {
1705        MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1706        memory_region_del_subregion(mr, subregion);
1707    }
1708    memory_region_transaction_commit();
1709
1710    mr->destructor(mr);
1711    memory_region_clear_coalescing(mr);
1712    g_free((char *)mr->name);
1713    g_free(mr->ioeventfds);
1714}
1715
1716Object *memory_region_owner(MemoryRegion *mr)
1717{
1718    Object *obj = OBJECT(mr);
1719    return obj->parent;
1720}
1721
1722void memory_region_ref(MemoryRegion *mr)
1723{
1724    /* MMIO callbacks most likely will access data that belongs
1725     * to the owner, hence the need to ref/unref the owner whenever
1726     * the memory region is in use.
1727     *
1728     * The memory region is a child of its owner.  As long as the
1729     * owner doesn't call unparent itself on the memory region,
1730     * ref-ing the owner will also keep the memory region alive.
1731     * Memory regions without an owner are supposed to never go away;
1732     * we do not ref/unref them because it slows down DMA sensibly.
1733     */
1734    if (mr && mr->owner) {
1735        object_ref(mr->owner);
1736    }
1737}
1738
1739void memory_region_unref(MemoryRegion *mr)
1740{
1741    if (mr && mr->owner) {
1742        object_unref(mr->owner);
1743    }
1744}
1745
1746uint64_t memory_region_size(MemoryRegion *mr)
1747{
1748    if (int128_eq(mr->size, int128_2_64())) {
1749        return UINT64_MAX;
1750    }
1751    return int128_get64(mr->size);
1752}
1753
1754const char *memory_region_name(const MemoryRegion *mr)
1755{
1756    if (!mr->name) {
1757        ((MemoryRegion *)mr)->name =
1758            object_get_canonical_path_component(OBJECT(mr));
1759    }
1760    return mr->name;
1761}
1762
1763bool memory_region_is_ram_device(MemoryRegion *mr)
1764{
1765    return mr->ram_device;
1766}
1767
1768uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1769{
1770    uint8_t mask = mr->dirty_log_mask;
1771    if (global_dirty_log && mr->ram_block) {
1772        mask |= (1 << DIRTY_MEMORY_MIGRATION);
1773    }
1774    return mask;
1775}
1776
1777bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1778{
1779    return memory_region_get_dirty_log_mask(mr) & (1 << client);
1780}
1781
1782static void memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr)
1783{
1784    IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1785    IOMMUNotifier *iommu_notifier;
1786    IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1787
1788    IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1789        flags |= iommu_notifier->notifier_flags;
1790    }
1791
1792    if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) {
1793        imrc->notify_flag_changed(iommu_mr,
1794                                  iommu_mr->iommu_notify_flags,
1795                                  flags);
1796    }
1797
1798    iommu_mr->iommu_notify_flags = flags;
1799}
1800
1801void memory_region_register_iommu_notifier(MemoryRegion *mr,
1802                                           IOMMUNotifier *n)
1803{
1804    IOMMUMemoryRegion *iommu_mr;
1805
1806    if (mr->alias) {
1807        memory_region_register_iommu_notifier(mr->alias, n);
1808        return;
1809    }
1810
1811    /* We need to register for at least one bitfield */
1812    iommu_mr = IOMMU_MEMORY_REGION(mr);
1813    assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
1814    assert(n->start <= n->end);
1815    assert(n->iommu_idx >= 0 &&
1816           n->iommu_idx < memory_region_iommu_num_indexes(iommu_mr));
1817
1818    QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node);
1819    memory_region_update_iommu_notify_flags(iommu_mr);
1820}
1821
1822uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr)
1823{
1824    IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1825
1826    if (imrc->get_min_page_size) {
1827        return imrc->get_min_page_size(iommu_mr);
1828    }
1829    return TARGET_PAGE_SIZE;
1830}
1831
1832void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
1833{
1834    MemoryRegion *mr = MEMORY_REGION(iommu_mr);
1835    IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1836    hwaddr addr, granularity;
1837    IOMMUTLBEntry iotlb;
1838
1839    /* If the IOMMU has its own replay callback, override */
1840    if (imrc->replay) {
1841        imrc->replay(iommu_mr, n);
1842        return;
1843    }
1844
1845    granularity = memory_region_iommu_get_min_page_size(iommu_mr);
1846
1847    for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1848        iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, n->iommu_idx);
1849        if (iotlb.perm != IOMMU_NONE) {
1850            n->notify(n, &iotlb);
1851        }
1852
1853        /* if (2^64 - MR size) < granularity, it's possible to get an
1854         * infinite loop here.  This should catch such a wraparound */
1855        if ((addr + granularity) < addr) {
1856            break;
1857        }
1858    }
1859}
1860
1861void memory_region_iommu_replay_all(IOMMUMemoryRegion *iommu_mr)
1862{
1863    IOMMUNotifier *notifier;
1864
1865    IOMMU_NOTIFIER_FOREACH(notifier, iommu_mr) {
1866        memory_region_iommu_replay(iommu_mr, notifier);
1867    }
1868}
1869
1870void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1871                                             IOMMUNotifier *n)
1872{
1873    IOMMUMemoryRegion *iommu_mr;
1874
1875    if (mr->alias) {
1876        memory_region_unregister_iommu_notifier(mr->alias, n);
1877        return;
1878    }
1879    QLIST_REMOVE(n, node);
1880    iommu_mr = IOMMU_MEMORY_REGION(mr);
1881    memory_region_update_iommu_notify_flags(iommu_mr);
1882}
1883
1884void memory_region_notify_one(IOMMUNotifier *notifier,
1885                              IOMMUTLBEntry *entry)
1886{
1887    IOMMUNotifierFlag request_flags;
1888
1889    /*
1890     * Skip the notification if the notification does not overlap
1891     * with registered range.
1892     */
1893    if (notifier->start > entry->iova + entry->addr_mask ||
1894        notifier->end < entry->iova) {
1895        return;
1896    }
1897
1898    if (entry->perm & IOMMU_RW) {
1899        request_flags = IOMMU_NOTIFIER_MAP;
1900    } else {
1901        request_flags = IOMMU_NOTIFIER_UNMAP;
1902    }
1903
1904    if (notifier->notifier_flags & request_flags) {
1905        notifier->notify(notifier, entry);
1906    }
1907}
1908
1909void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr,
1910                                int iommu_idx,
1911                                IOMMUTLBEntry entry)
1912{
1913    IOMMUNotifier *iommu_notifier;
1914
1915    assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr)));
1916
1917    IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1918        if (iommu_notifier->iommu_idx == iommu_idx) {
1919            memory_region_notify_one(iommu_notifier, &entry);
1920        }
1921    }
1922}
1923
1924int memory_region_iommu_get_attr(IOMMUMemoryRegion *iommu_mr,
1925                                 enum IOMMUMemoryRegionAttr attr,
1926                                 void *data)
1927{
1928    IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1929
1930    if (!imrc->get_attr) {
1931        return -EINVAL;
1932    }
1933
1934    return imrc->get_attr(iommu_mr, attr, data);
1935}
1936
1937int memory_region_iommu_attrs_to_index(IOMMUMemoryRegion *iommu_mr,
1938                                       MemTxAttrs attrs)
1939{
1940    IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1941
1942    if (!imrc->attrs_to_index) {
1943        return 0;
1944    }
1945
1946    return imrc->attrs_to_index(iommu_mr, attrs);
1947}
1948
1949int memory_region_iommu_num_indexes(IOMMUMemoryRegion *iommu_mr)
1950{
1951    IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1952
1953    if (!imrc->num_indexes) {
1954        return 1;
1955    }
1956
1957    return imrc->num_indexes(iommu_mr);
1958}
1959
1960void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1961{
1962    uint8_t mask = 1 << client;
1963    uint8_t old_logging;
1964
1965    assert(client == DIRTY_MEMORY_VGA);
1966    old_logging = mr->vga_logging_count;
1967    mr->vga_logging_count += log ? 1 : -1;
1968    if (!!old_logging == !!mr->vga_logging_count) {
1969        return;
1970    }
1971
1972    memory_region_transaction_begin();
1973    mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1974    memory_region_update_pending |= mr->enabled;
1975    memory_region_transaction_commit();
1976}
1977
1978bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1979                             hwaddr size, unsigned client)
1980{
1981    assert(mr->ram_block);
1982    return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr,
1983                                         size, client);
1984}
1985
1986void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1987                             hwaddr size)
1988{
1989    assert(mr->ram_block);
1990    cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
1991                                        size,
1992                                        memory_region_get_dirty_log_mask(mr));
1993}
1994
1995static void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1996{
1997    MemoryListener *listener;
1998    AddressSpace *as;
1999    FlatView *view;
2000    FlatRange *fr;
2001
2002    /* If the same address space has multiple log_sync listeners, we
2003     * visit that address space's FlatView multiple times.  But because
2004     * log_sync listeners are rare, it's still cheaper than walking each
2005     * address space once.
2006     */
2007    QTAILQ_FOREACH(listener, &memory_listeners, link) {
2008        if (!listener->log_sync) {
2009            continue;
2010        }
2011        as = listener->address_space;
2012        view = address_space_get_flatview(as);
2013        FOR_EACH_FLAT_RANGE(fr, view) {
2014            if (fr->dirty_log_mask && (!mr || fr->mr == mr)) {
2015                MemoryRegionSection mrs = section_from_flat_range(fr, view);
2016                listener->log_sync(listener, &mrs);
2017            }
2018        }
2019        flatview_unref(view);
2020    }
2021}
2022
2023DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
2024                                                            hwaddr addr,
2025                                                            hwaddr size,
2026                                                            unsigned client)
2027{
2028    assert(mr->ram_block);
2029    memory_region_sync_dirty_bitmap(mr);
2030    return cpu_physical_memory_snapshot_and_clear_dirty(
2031                memory_region_get_ram_addr(mr) + addr, size, client);
2032}
2033
2034bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
2035                                      hwaddr addr, hwaddr size)
2036{
2037    assert(mr->ram_block);
2038    return cpu_physical_memory_snapshot_get_dirty(snap,
2039                memory_region_get_ram_addr(mr) + addr, size);
2040}
2041
2042void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
2043{
2044    if (mr->readonly != readonly) {
2045        memory_region_transaction_begin();
2046        mr->readonly = readonly;
2047        memory_region_update_pending |= mr->enabled;
2048        memory_region_transaction_commit();
2049    }
2050}
2051
2052void memory_region_set_nonvolatile(MemoryRegion *mr, bool nonvolatile)
2053{
2054    if (mr->nonvolatile != nonvolatile) {
2055        memory_region_transaction_begin();
2056        mr->nonvolatile = nonvolatile;
2057        memory_region_update_pending |= mr->enabled;
2058        memory_region_transaction_commit();
2059    }
2060}
2061
2062void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
2063{
2064    if (mr->romd_mode != romd_mode) {
2065        memory_region_transaction_begin();
2066        mr->romd_mode = romd_mode;
2067        memory_region_update_pending |= mr->enabled;
2068        memory_region_transaction_commit();
2069    }
2070}
2071
2072void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
2073                               hwaddr size, unsigned client)
2074{
2075    assert(mr->ram_block);
2076    cpu_physical_memory_test_and_clear_dirty(
2077        memory_region_get_ram_addr(mr) + addr, size, client);
2078}
2079
2080int memory_region_get_fd(MemoryRegion *mr)
2081{
2082    int fd;
2083
2084    rcu_read_lock();
2085    while (mr->alias) {
2086        mr = mr->alias;
2087    }
2088    fd = mr->ram_block->fd;
2089    rcu_read_unlock();
2090
2091    return fd;
2092}
2093
2094void *memory_region_get_ram_ptr(MemoryRegion *mr)
2095{
2096    void *ptr;
2097    uint64_t offset = 0;
2098
2099    rcu_read_lock();
2100    while (mr->alias) {
2101        offset += mr->alias_offset;
2102        mr = mr->alias;
2103    }
2104    assert(mr->ram_block);
2105    ptr = qemu_map_ram_ptr(mr->ram_block, offset);
2106    rcu_read_unlock();
2107
2108    return ptr;
2109}
2110
2111MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
2112{
2113    RAMBlock *block;
2114
2115    block = qemu_ram_block_from_host(ptr, false, offset);
2116    if (!block) {
2117        return NULL;
2118    }
2119
2120    return block->mr;
2121}
2122
2123ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
2124{
2125    return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
2126}
2127
2128void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
2129{
2130    assert(mr->ram_block);
2131
2132    qemu_ram_resize(mr->ram_block, newsize, errp);
2133}
2134
2135static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
2136{
2137    FlatView *view;
2138    FlatRange *fr;
2139    CoalescedMemoryRange *cmr;
2140    AddrRange tmp;
2141    MemoryRegionSection section;
2142
2143    view = address_space_get_flatview(as);
2144    FOR_EACH_FLAT_RANGE(fr, view) {
2145        if (fr->mr == mr) {
2146            section = (MemoryRegionSection) {
2147                .fv = view,
2148                .offset_within_address_space = int128_get64(fr->addr.start),
2149                .size = fr->addr.size,
2150            };
2151
2152            MEMORY_LISTENER_CALL(as, coalesced_io_del, Reverse, &section,
2153                                 int128_get64(fr->addr.start),
2154                                 int128_get64(fr->addr.size));
2155            QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
2156                tmp = addrrange_shift(cmr->addr,
2157                                      int128_sub(fr->addr.start,
2158                                                 int128_make64(fr->offset_in_region)));
2159                if (!addrrange_intersects(tmp, fr->addr)) {
2160                    continue;
2161                }
2162                tmp = addrrange_intersection(tmp, fr->addr);
2163                MEMORY_LISTENER_CALL(as, coalesced_io_add, Forward, &section,
2164                                     int128_get64(tmp.start),
2165                                     int128_get64(tmp.size));
2166            }
2167        }
2168    }
2169    flatview_unref(view);
2170}
2171
2172static void memory_region_update_coalesced_range(MemoryRegion *mr)
2173{
2174    AddressSpace *as;
2175
2176    QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2177        memory_region_update_coalesced_range_as(mr, as);
2178    }
2179}
2180
2181void memory_region_set_coalescing(MemoryRegion *mr)
2182{
2183    memory_region_clear_coalescing(mr);
2184    memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
2185}
2186
2187void memory_region_add_coalescing(MemoryRegion *mr,
2188                                  hwaddr offset,
2189                                  uint64_t size)
2190{
2191    CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
2192
2193    cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
2194    QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
2195    memory_region_update_coalesced_range(mr);
2196    memory_region_set_flush_coalesced(mr);
2197}
2198
2199void memory_region_clear_coalescing(MemoryRegion *mr)
2200{
2201    CoalescedMemoryRange *cmr;
2202    bool updated = false;
2203
2204    qemu_flush_coalesced_mmio_buffer();
2205    mr->flush_coalesced_mmio = false;
2206
2207    while (!QTAILQ_EMPTY(&mr->coalesced)) {
2208        cmr = QTAILQ_FIRST(&mr->coalesced);
2209        QTAILQ_REMOVE(&mr->coalesced, cmr, link);
2210        g_free(cmr);
2211        updated = true;
2212    }
2213
2214    if (updated) {
2215        memory_region_update_coalesced_range(mr);
2216    }
2217}
2218
2219void memory_region_set_flush_coalesced(MemoryRegion *mr)
2220{
2221    mr->flush_coalesced_mmio = true;
2222}
2223
2224void memory_region_clear_flush_coalesced(MemoryRegion *mr)
2225{
2226    qemu_flush_coalesced_mmio_buffer();
2227    if (QTAILQ_EMPTY(&mr->coalesced)) {
2228        mr->flush_coalesced_mmio = false;
2229    }
2230}
2231
2232void memory_region_clear_global_locking(MemoryRegion *mr)
2233{
2234    mr->global_locking = false;
2235}
2236
2237static bool userspace_eventfd_warning;
2238
2239void memory_region_add_eventfd(MemoryRegion *mr,
2240                               hwaddr addr,
2241                               unsigned size,
2242                               bool match_data,
2243                               uint64_t data,
2244                               EventNotifier *e)
2245{
2246    MemoryRegionIoeventfd mrfd = {
2247        .addr.start = int128_make64(addr),
2248        .addr.size = int128_make64(size),
2249        .match_data = match_data,
2250        .data = data,
2251        .e = e,
2252    };
2253    unsigned i;
2254
2255    if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
2256                            userspace_eventfd_warning))) {
2257        userspace_eventfd_warning = true;
2258        error_report("Using eventfd without MMIO binding in KVM. "
2259                     "Suboptimal performance expected");
2260    }
2261
2262    if (size) {
2263        adjust_endianness(mr, &mrfd.data, size);
2264    }
2265    memory_region_transaction_begin();
2266    for (i = 0; i < mr->ioeventfd_nb; ++i) {
2267        if (memory_region_ioeventfd_before(&mrfd, &mr->ioeventfds[i])) {
2268            break;
2269        }
2270    }
2271    ++mr->ioeventfd_nb;
2272    mr->ioeventfds = g_realloc(mr->ioeventfds,
2273                                  sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
2274    memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
2275            sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
2276    mr->ioeventfds[i] = mrfd;
2277    ioeventfd_update_pending |= mr->enabled;
2278    memory_region_transaction_commit();
2279}
2280
2281void memory_region_del_eventfd(MemoryRegion *mr,
2282                               hwaddr addr,
2283                               unsigned size,
2284                               bool match_data,
2285                               uint64_t data,
2286                               EventNotifier *e)
2287{
2288    MemoryRegionIoeventfd mrfd = {
2289        .addr.start = int128_make64(addr),
2290        .addr.size = int128_make64(size),
2291        .match_data = match_data,
2292        .data = data,
2293        .e = e,
2294    };
2295    unsigned i;
2296
2297    if (size) {
2298        adjust_endianness(mr, &mrfd.data, size);
2299    }
2300    memory_region_transaction_begin();
2301    for (i = 0; i < mr->ioeventfd_nb; ++i) {
2302        if (memory_region_ioeventfd_equal(&mrfd, &mr->ioeventfds[i])) {
2303            break;
2304        }
2305    }
2306    assert(i != mr->ioeventfd_nb);
2307    memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2308            sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2309    --mr->ioeventfd_nb;
2310    mr->ioeventfds = g_realloc(mr->ioeventfds,
2311                                  sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
2312    ioeventfd_update_pending |= mr->enabled;
2313    memory_region_transaction_commit();
2314}
2315
2316static void memory_region_update_container_subregions(MemoryRegion *subregion)
2317{
2318    MemoryRegion *mr = subregion->container;
2319    MemoryRegion *other;
2320
2321    memory_region_transaction_begin();
2322
2323    memory_region_ref(subregion);
2324    QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2325        if (subregion->priority >= other->priority) {
2326            QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2327            goto done;
2328        }
2329    }
2330    QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2331done:
2332    memory_region_update_pending |= mr->enabled && subregion->enabled;
2333    memory_region_transaction_commit();
2334}
2335
2336static void memory_region_add_subregion_common(MemoryRegion *mr,
2337                                               hwaddr offset,
2338                                               MemoryRegion *subregion)
2339{
2340    assert(!subregion->container);
2341    subregion->container = mr;
2342    subregion->addr = offset;
2343    memory_region_update_container_subregions(subregion);
2344}
2345
2346void memory_region_add_subregion(MemoryRegion *mr,
2347                                 hwaddr offset,
2348                                 MemoryRegion *subregion)
2349{
2350    subregion->priority = 0;
2351    memory_region_add_subregion_common(mr, offset, subregion);
2352}
2353
2354void memory_region_add_subregion_overlap(MemoryRegion *mr,
2355                                         hwaddr offset,
2356                                         MemoryRegion *subregion,
2357                                         int priority)
2358{
2359    subregion->priority = priority;
2360    memory_region_add_subregion_common(mr, offset, subregion);
2361}
2362
2363void memory_region_del_subregion(MemoryRegion *mr,
2364                                 MemoryRegion *subregion)
2365{
2366    memory_region_transaction_begin();
2367    assert(subregion->container == mr);
2368    subregion->container = NULL;
2369    QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2370    memory_region_unref(subregion);
2371    memory_region_update_pending |= mr->enabled && subregion->enabled;
2372    memory_region_transaction_commit();
2373}
2374
2375void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2376{
2377    if (enabled == mr->enabled) {
2378        return;
2379    }
2380    memory_region_transaction_begin();
2381    mr->enabled = enabled;
2382    memory_region_update_pending = true;
2383    memory_region_transaction_commit();
2384}
2385
2386void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2387{
2388    Int128 s = int128_make64(size);
2389
2390    if (size == UINT64_MAX) {
2391        s = int128_2_64();
2392    }
2393    if (int128_eq(s, mr->size)) {
2394        return;
2395    }
2396    memory_region_transaction_begin();
2397    mr->size = s;
2398    memory_region_update_pending = true;
2399    memory_region_transaction_commit();
2400}
2401
2402static void memory_region_readd_subregion(MemoryRegion *mr)
2403{
2404    MemoryRegion *container = mr->container;
2405
2406    if (container) {
2407        memory_region_transaction_begin();
2408        memory_region_ref(mr);
2409        memory_region_del_subregion(container, mr);
2410        mr->container = container;
2411        memory_region_update_container_subregions(mr);
2412        memory_region_unref(mr);
2413        memory_region_transaction_commit();
2414    }
2415}
2416
2417void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2418{
2419    if (addr != mr->addr) {
2420        mr->addr = addr;
2421        memory_region_readd_subregion(mr);
2422    }
2423}
2424
2425void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2426{
2427    assert(mr->alias);
2428
2429    if (offset == mr->alias_offset) {
2430        return;
2431    }
2432
2433    memory_region_transaction_begin();
2434    mr->alias_offset = offset;
2435    memory_region_update_pending |= mr->enabled;
2436    memory_region_transaction_commit();
2437}
2438
2439uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2440{
2441    return mr->align;
2442}
2443
2444static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2445{
2446    const AddrRange *addr = addr_;
2447    const FlatRange *fr = fr_;
2448
2449    if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2450        return -1;
2451    } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2452        return 1;
2453    }
2454    return 0;
2455}
2456
2457static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2458{
2459    return bsearch(&addr, view->ranges, view->nr,
2460                   sizeof(FlatRange), cmp_flatrange_addr);
2461}
2462
2463bool memory_region_is_mapped(MemoryRegion *mr)
2464{
2465    return mr->container ? true : false;
2466}
2467
2468/* Same as memory_region_find, but it does not add a reference to the
2469 * returned region.  It must be called from an RCU critical section.
2470 */
2471static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2472                                                  hwaddr addr, uint64_t size)
2473{
2474    MemoryRegionSection ret = { .mr = NULL };
2475    MemoryRegion *root;
2476    AddressSpace *as;
2477    AddrRange range;
2478    FlatView *view;
2479    FlatRange *fr;
2480
2481    addr += mr->addr;
2482    for (root = mr; root->container; ) {
2483        root = root->container;
2484        addr += root->addr;
2485    }
2486
2487    as = memory_region_to_address_space(root);
2488    if (!as) {
2489        return ret;
2490    }
2491    range = addrrange_make(int128_make64(addr), int128_make64(size));
2492
2493    view = address_space_to_flatview(as);
2494    fr = flatview_lookup(view, range);
2495    if (!fr) {
2496        return ret;
2497    }
2498
2499    while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2500        --fr;
2501    }
2502
2503    ret.mr = fr->mr;
2504    ret.fv = view;
2505    range = addrrange_intersection(range, fr->addr);
2506    ret.offset_within_region = fr->offset_in_region;
2507    ret.offset_within_region += int128_get64(int128_sub(range.start,
2508                                                        fr->addr.start));
2509    ret.size = range.size;
2510    ret.offset_within_address_space = int128_get64(range.start);
2511    ret.readonly = fr->readonly;
2512    ret.nonvolatile = fr->nonvolatile;
2513    return ret;
2514}
2515
2516MemoryRegionSection memory_region_find(MemoryRegion *mr,
2517                                       hwaddr addr, uint64_t size)
2518{
2519    MemoryRegionSection ret;
2520    rcu_read_lock();
2521    ret = memory_region_find_rcu(mr, addr, size);
2522    if (ret.mr) {
2523        memory_region_ref(ret.mr);
2524    }
2525    rcu_read_unlock();
2526    return ret;
2527}
2528
2529bool memory_region_present(MemoryRegion *container, hwaddr addr)
2530{
2531    MemoryRegion *mr;
2532
2533    rcu_read_lock();
2534    mr = memory_region_find_rcu(container, addr, 1).mr;
2535    rcu_read_unlock();
2536    return mr && mr != container;
2537}
2538
2539void memory_global_dirty_log_sync(void)
2540{
2541    memory_region_sync_dirty_bitmap(NULL);
2542}
2543
2544static VMChangeStateEntry *vmstate_change;
2545
2546void memory_global_dirty_log_start(void)
2547{
2548    if (vmstate_change) {
2549        qemu_del_vm_change_state_handler(vmstate_change);
2550        vmstate_change = NULL;
2551    }
2552
2553    global_dirty_log = true;
2554
2555    MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2556
2557    /* Refresh DIRTY_LOG_MIGRATION bit.  */
2558    memory_region_transaction_begin();
2559    memory_region_update_pending = true;
2560    memory_region_transaction_commit();
2561}
2562
2563static void memory_global_dirty_log_do_stop(void)
2564{
2565    global_dirty_log = false;
2566
2567    /* Refresh DIRTY_LOG_MIGRATION bit.  */
2568    memory_region_transaction_begin();
2569    memory_region_update_pending = true;
2570    memory_region_transaction_commit();
2571
2572    MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2573}
2574
2575static void memory_vm_change_state_handler(void *opaque, int running,
2576                                           RunState state)
2577{
2578    if (running) {
2579        memory_global_dirty_log_do_stop();
2580
2581        if (vmstate_change) {
2582            qemu_del_vm_change_state_handler(vmstate_change);
2583            vmstate_change = NULL;
2584        }
2585    }
2586}
2587
2588void memory_global_dirty_log_stop(void)
2589{
2590    if (!runstate_is_running()) {
2591        if (vmstate_change) {
2592            return;
2593        }
2594        vmstate_change = qemu_add_vm_change_state_handler(
2595                                memory_vm_change_state_handler, NULL);
2596        return;
2597    }
2598
2599    memory_global_dirty_log_do_stop();
2600}
2601
2602static void listener_add_address_space(MemoryListener *listener,
2603                                       AddressSpace *as)
2604{
2605    FlatView *view;
2606    FlatRange *fr;
2607
2608    if (listener->begin) {
2609        listener->begin(listener);
2610    }
2611    if (global_dirty_log) {
2612        if (listener->log_global_start) {
2613            listener->log_global_start(listener);
2614        }
2615    }
2616
2617    view = address_space_get_flatview(as);
2618    FOR_EACH_FLAT_RANGE(fr, view) {
2619        MemoryRegionSection section = section_from_flat_range(fr, view);
2620
2621        if (listener->region_add) {
2622            listener->region_add(listener, &section);
2623        }
2624        if (fr->dirty_log_mask && listener->log_start) {
2625            listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2626        }
2627    }
2628    if (listener->commit) {
2629        listener->commit(listener);
2630    }
2631    flatview_unref(view);
2632}
2633
2634static void listener_del_address_space(MemoryListener *listener,
2635                                       AddressSpace *as)
2636{
2637    FlatView *view;
2638    FlatRange *fr;
2639
2640    if (listener->begin) {
2641        listener->begin(listener);
2642    }
2643    view = address_space_get_flatview(as);
2644    FOR_EACH_FLAT_RANGE(fr, view) {
2645        MemoryRegionSection section = section_from_flat_range(fr, view);
2646
2647        if (fr->dirty_log_mask && listener->log_stop) {
2648            listener->log_stop(listener, &section, fr->dirty_log_mask, 0);
2649        }
2650        if (listener->region_del) {
2651            listener->region_del(listener, &section);
2652        }
2653    }
2654    if (listener->commit) {
2655        listener->commit(listener);
2656    }
2657    flatview_unref(view);
2658}
2659
2660void memory_listener_register(MemoryListener *listener, AddressSpace *as)
2661{
2662    MemoryListener *other = NULL;
2663
2664    listener->address_space = as;
2665    if (QTAILQ_EMPTY(&memory_listeners)
2666        || listener->priority >= QTAILQ_LAST(&memory_listeners,
2667                                             memory_listeners)->priority) {
2668        QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2669    } else {
2670        QTAILQ_FOREACH(other, &memory_listeners, link) {
2671            if (listener->priority < other->priority) {
2672                break;
2673            }
2674        }
2675        QTAILQ_INSERT_BEFORE(other, listener, link);
2676    }
2677
2678    if (QTAILQ_EMPTY(&as->listeners)
2679        || listener->priority >= QTAILQ_LAST(&as->listeners,
2680                                             memory_listeners)->priority) {
2681        QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
2682    } else {
2683        QTAILQ_FOREACH(other, &as->listeners, link_as) {
2684            if (listener->priority < other->priority) {
2685                break;
2686            }
2687        }
2688        QTAILQ_INSERT_BEFORE(other, listener, link_as);
2689    }
2690
2691    listener_add_address_space(listener, as);
2692}
2693
2694void memory_listener_unregister(MemoryListener *listener)
2695{
2696    if (!listener->address_space) {
2697        return;
2698    }
2699
2700    listener_del_address_space(listener, listener->address_space);
2701    QTAILQ_REMOVE(&memory_listeners, listener, link);
2702    QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
2703    listener->address_space = NULL;
2704}
2705
2706void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2707{
2708    memory_region_ref(root);
2709    as->root = root;
2710    as->current_map = NULL;
2711    as->ioeventfd_nb = 0;
2712    as->ioeventfds = NULL;
2713    QTAILQ_INIT(&as->listeners);
2714    QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2715    as->name = g_strdup(name ? name : "anonymous");
2716    address_space_update_topology(as);
2717    address_space_update_ioeventfds(as);
2718}
2719
2720static void do_address_space_destroy(AddressSpace *as)
2721{
2722    assert(QTAILQ_EMPTY(&as->listeners));
2723
2724    flatview_unref(as->current_map);
2725    g_free(as->name);
2726    g_free(as->ioeventfds);
2727    memory_region_unref(as->root);
2728}
2729
2730void address_space_destroy(AddressSpace *as)
2731{
2732    MemoryRegion *root = as->root;
2733
2734    /* Flush out anything from MemoryListeners listening in on this */
2735    memory_region_transaction_begin();
2736    as->root = NULL;
2737    memory_region_transaction_commit();
2738    QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2739
2740    /* At this point, as->dispatch and as->current_map are dummy
2741     * entries that the guest should never use.  Wait for the old
2742     * values to expire before freeing the data.
2743     */
2744    as->root = root;
2745    call_rcu(as, do_address_space_destroy, rcu);
2746}
2747
2748static const char *memory_region_type(MemoryRegion *mr)
2749{
2750    if (memory_region_is_ram_device(mr)) {
2751        return "ramd";
2752    } else if (memory_region_is_romd(mr)) {
2753        return "romd";
2754    } else if (memory_region_is_rom(mr)) {
2755        return "rom";
2756    } else if (memory_region_is_ram(mr)) {
2757        return "ram";
2758    } else {
2759        return "i/o";
2760    }
2761}
2762
2763typedef struct MemoryRegionList MemoryRegionList;
2764
2765struct MemoryRegionList {
2766    const MemoryRegion *mr;
2767    QTAILQ_ENTRY(MemoryRegionList) mrqueue;
2768};
2769
2770typedef QTAILQ_HEAD(mrqueue, MemoryRegionList) MemoryRegionListHead;
2771
2772#define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
2773                           int128_sub((size), int128_one())) : 0)
2774#define MTREE_INDENT "  "
2775
2776static void mtree_expand_owner(fprintf_function mon_printf, void *f,
2777                               const char *label, Object *obj)
2778{
2779    DeviceState *dev = (DeviceState *) object_dynamic_cast(obj, TYPE_DEVICE);
2780
2781    mon_printf(f, " %s:{%s", label, dev ? "dev" : "obj");
2782    if (dev && dev->id) {
2783        mon_printf(f, " id=%s", dev->id);
2784    } else {
2785        gchar *canonical_path = object_get_canonical_path(obj);
2786        if (canonical_path) {
2787            mon_printf(f, " path=%s", canonical_path);
2788            g_free(canonical_path);
2789        } else {
2790            mon_printf(f, " type=%s", object_get_typename(obj));
2791        }
2792    }
2793    mon_printf(f, "}");
2794}
2795
2796static void mtree_print_mr_owner(fprintf_function mon_printf, void *f,
2797                                 const MemoryRegion *mr)
2798{
2799    Object *owner = mr->owner;
2800    Object *parent = memory_region_owner((MemoryRegion *)mr);
2801
2802    if (!owner && !parent) {
2803        mon_printf(f, " orphan");
2804        return;
2805    }
2806    if (owner) {
2807        mtree_expand_owner(mon_printf, f, "owner", owner);
2808    }
2809    if (parent && parent != owner) {
2810        mtree_expand_owner(mon_printf, f, "parent", parent);
2811    }
2812}
2813
2814static void mtree_print_mr(fprintf_function mon_printf, void *f,
2815                           const MemoryRegion *mr, unsigned int level,
2816                           hwaddr base,
2817                           MemoryRegionListHead *alias_print_queue,
2818                           bool owner)
2819{
2820    MemoryRegionList *new_ml, *ml, *next_ml;
2821    MemoryRegionListHead submr_print_queue;
2822    const MemoryRegion *submr;
2823    unsigned int i;
2824    hwaddr cur_start, cur_end;
2825
2826    if (!mr) {
2827        return;
2828    }
2829
2830    for (i = 0; i < level; i++) {
2831        mon_printf(f, MTREE_INDENT);
2832    }
2833
2834    cur_start = base + mr->addr;
2835    cur_end = cur_start + MR_SIZE(mr->size);
2836
2837    /*
2838     * Try to detect overflow of memory region. This should never
2839     * happen normally. When it happens, we dump something to warn the
2840     * user who is observing this.
2841     */
2842    if (cur_start < base || cur_end < cur_start) {
2843        mon_printf(f, "[DETECTED OVERFLOW!] ");
2844    }
2845
2846    if (mr->alias) {
2847        MemoryRegionList *ml;
2848        bool found = false;
2849
2850        /* check if the alias is already in the queue */
2851        QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) {
2852            if (ml->mr == mr->alias) {
2853                found = true;
2854            }
2855        }
2856
2857        if (!found) {
2858            ml = g_new(MemoryRegionList, 1);
2859            ml->mr = mr->alias;
2860            QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue);
2861        }
2862        mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2863                   " (prio %d, %s%s): alias %s @%s " TARGET_FMT_plx
2864                   "-" TARGET_FMT_plx "%s",
2865                   cur_start, cur_end,
2866                   mr->priority,
2867                   mr->nonvolatile ? "nv-" : "",
2868                   memory_region_type((MemoryRegion *)mr),
2869                   memory_region_name(mr),
2870                   memory_region_name(mr->alias),
2871                   mr->alias_offset,
2872                   mr->alias_offset + MR_SIZE(mr->size),
2873                   mr->enabled ? "" : " [disabled]");
2874        if (owner) {
2875            mtree_print_mr_owner(mon_printf, f, mr);
2876        }
2877    } else {
2878        mon_printf(f,
2879                   TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %s%s): %s%s",
2880                   cur_start, cur_end,
2881                   mr->priority,
2882                   mr->nonvolatile ? "nv-" : "",
2883                   memory_region_type((MemoryRegion *)mr),
2884                   memory_region_name(mr),
2885                   mr->enabled ? "" : " [disabled]");
2886        if (owner) {
2887            mtree_print_mr_owner(mon_printf, f, mr);
2888        }
2889    }
2890    mon_printf(f, "\n");
2891
2892    QTAILQ_INIT(&submr_print_queue);
2893
2894    QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2895        new_ml = g_new(MemoryRegionList, 1);
2896        new_ml->mr = submr;
2897        QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
2898            if (new_ml->mr->addr < ml->mr->addr ||
2899                (new_ml->mr->addr == ml->mr->addr &&
2900                 new_ml->mr->priority > ml->mr->priority)) {
2901                QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue);
2902                new_ml = NULL;
2903                break;
2904            }
2905        }
2906        if (new_ml) {
2907            QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue);
2908        }
2909    }
2910
2911    QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
2912        mtree_print_mr(mon_printf, f, ml->mr, level + 1, cur_start,
2913                       alias_print_queue, owner);
2914    }
2915
2916    QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) {
2917        g_free(ml);
2918    }
2919}
2920
2921struct FlatViewInfo {
2922    fprintf_function mon_printf;
2923    void *f;
2924    int counter;
2925    bool dispatch_tree;
2926    bool owner;
2927};
2928
2929static void mtree_print_flatview(gpointer key, gpointer value,
2930                                 gpointer user_data)
2931{
2932    FlatView *view = key;
2933    GArray *fv_address_spaces = value;
2934    struct FlatViewInfo *fvi = user_data;
2935    fprintf_function p = fvi->mon_printf;
2936    void *f = fvi->f;
2937    FlatRange *range = &view->ranges[0];
2938    MemoryRegion *mr;
2939    int n = view->nr;
2940    int i;
2941    AddressSpace *as;
2942
2943    p(f, "FlatView #%d\n", fvi->counter);
2944    ++fvi->counter;
2945
2946    for (i = 0; i < fv_address_spaces->len; ++i) {
2947        as = g_array_index(fv_address_spaces, AddressSpace*, i);
2948        p(f, " AS \"%s\", root: %s", as->name, memory_region_name(as->root));
2949        if (as->root->alias) {
2950            p(f, ", alias %s", memory_region_name(as->root->alias));
2951        }
2952        p(f, "\n");
2953    }
2954
2955    p(f, " Root memory region: %s\n",
2956      view->root ? memory_region_name(view->root) : "(none)");
2957
2958    if (n <= 0) {
2959        p(f, MTREE_INDENT "No rendered FlatView\n\n");
2960        return;
2961    }
2962
2963    while (n--) {
2964        mr = range->mr;
2965        if (range->offset_in_region) {
2966            p(f, MTREE_INDENT TARGET_FMT_plx "-"
2967              TARGET_FMT_plx " (prio %d, %s%s): %s @" TARGET_FMT_plx,
2968              int128_get64(range->addr.start),
2969              int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
2970              mr->priority,
2971              range->nonvolatile ? "nv-" : "",
2972              range->readonly ? "rom" : memory_region_type(mr),
2973              memory_region_name(mr),
2974              range->offset_in_region);
2975        } else {
2976            p(f, MTREE_INDENT TARGET_FMT_plx "-"
2977              TARGET_FMT_plx " (prio %d, %s%s): %s",
2978              int128_get64(range->addr.start),
2979              int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
2980              mr->priority,
2981              range->nonvolatile ? "nv-" : "",
2982              range->readonly ? "rom" : memory_region_type(mr),
2983              memory_region_name(mr));
2984        }
2985        if (fvi->owner) {
2986            mtree_print_mr_owner(p, f, mr);
2987        }
2988        p(f, "\n");
2989        range++;
2990    }
2991
2992#if !defined(CONFIG_USER_ONLY)
2993    if (fvi->dispatch_tree && view->root) {
2994        mtree_print_dispatch(p, f, view->dispatch, view->root);
2995    }
2996#endif
2997
2998    p(f, "\n");
2999}
3000
3001static gboolean mtree_info_flatview_free(gpointer key, gpointer value,
3002                                      gpointer user_data)
3003{
3004    FlatView *view = key;
3005    GArray *fv_address_spaces = value;
3006
3007    g_array_unref(fv_address_spaces);
3008    flatview_unref(view);
3009
3010    return true;
3011}
3012
3013void mtree_info(fprintf_function mon_printf, void *f, bool flatview,
3014                bool dispatch_tree, bool owner)
3015{
3016    MemoryRegionListHead ml_head;
3017    MemoryRegionList *ml, *ml2;
3018    AddressSpace *as;
3019
3020    if (flatview) {
3021        FlatView *view;
3022        struct FlatViewInfo fvi = {
3023            .mon_printf = mon_printf,
3024            .f = f,
3025            .counter = 0,
3026            .dispatch_tree = dispatch_tree,
3027            .owner = owner,
3028        };
3029        GArray *fv_address_spaces;
3030        GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3031
3032        /* Gather all FVs in one table */
3033        QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3034            view = address_space_get_flatview(as);
3035
3036            fv_address_spaces = g_hash_table_lookup(views, view);
3037            if (!fv_address_spaces) {
3038                fv_address_spaces = g_array_new(false, false, sizeof(as));
3039                g_hash_table_insert(views, view, fv_address_spaces);
3040            }
3041
3042            g_array_append_val(fv_address_spaces, as);
3043        }
3044
3045        /* Print */
3046        g_hash_table_foreach(views, mtree_print_flatview, &fvi);
3047
3048        /* Free */
3049        g_hash_table_foreach_remove(views, mtree_info_flatview_free, 0);
3050        g_hash_table_unref(views);
3051
3052        return;
3053    }
3054
3055    QTAILQ_INIT(&ml_head);
3056
3057    QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3058        mon_printf(f, "address-space: %s\n", as->name);
3059        mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head, owner);
3060        mon_printf(f, "\n");
3061    }
3062
3063    /* print aliased regions */
3064    QTAILQ_FOREACH(ml, &ml_head, mrqueue) {
3065        mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
3066        mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head, owner);
3067        mon_printf(f, "\n");
3068    }
3069
3070    QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) {
3071        g_free(ml);
3072    }
3073}
3074
3075void memory_region_init_ram(MemoryRegion *mr,
3076                            struct Object *owner,
3077                            const char *name,
3078                            uint64_t size,
3079                            Error **errp)
3080{
3081    DeviceState *owner_dev;
3082    Error *err = NULL;
3083
3084    memory_region_init_ram_nomigrate(mr, owner, name, size, &err);
3085    if (err) {
3086        error_propagate(errp, err);
3087        return;
3088    }
3089    /* This will assert if owner is neither NULL nor a DeviceState.
3090     * We only want the owner here for the purposes of defining a
3091     * unique name for migration. TODO: Ideally we should implement
3092     * a naming scheme for Objects which are not DeviceStates, in
3093     * which case we can relax this restriction.
3094     */
3095    owner_dev = DEVICE(owner);
3096    vmstate_register_ram(mr, owner_dev);
3097}
3098
3099void memory_region_init_rom(MemoryRegion *mr,
3100                            struct Object *owner,
3101                            const char *name,
3102                            uint64_t size,
3103                            Error **errp)
3104{
3105    DeviceState *owner_dev;
3106    Error *err = NULL;
3107
3108    memory_region_init_rom_nomigrate(mr, owner, name, size, &err);
3109    if (err) {
3110        error_propagate(errp, err);
3111        return;
3112    }
3113    /* This will assert if owner is neither NULL nor a DeviceState.
3114     * We only want the owner here for the purposes of defining a
3115     * unique name for migration. TODO: Ideally we should implement
3116     * a naming scheme for Objects which are not DeviceStates, in
3117     * which case we can relax this restriction.
3118     */
3119    owner_dev = DEVICE(owner);
3120    vmstate_register_ram(mr, owner_dev);
3121}
3122
3123void memory_region_init_rom_device(MemoryRegion *mr,
3124                                   struct Object *owner,
3125                                   const MemoryRegionOps *ops,
3126                                   void *opaque,
3127                                   const char *name,
3128                                   uint64_t size,
3129                                   Error **errp)
3130{
3131    DeviceState *owner_dev;
3132    Error *err = NULL;
3133
3134    memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
3135                                            name, size, &err);
3136    if (err) {
3137        error_propagate(errp, err);
3138        return;
3139    }
3140    /* This will assert if owner is neither NULL nor a DeviceState.
3141     * We only want the owner here for the purposes of defining a
3142     * unique name for migration. TODO: Ideally we should implement
3143     * a naming scheme for Objects which are not DeviceStates, in
3144     * which case we can relax this restriction.
3145     */
3146    owner_dev = DEVICE(owner);
3147    vmstate_register_ram(mr, owner_dev);
3148}
3149
3150static const TypeInfo memory_region_info = {
3151    .parent             = TYPE_OBJECT,
3152    .name               = TYPE_MEMORY_REGION,
3153    .instance_size      = sizeof(MemoryRegion),
3154    .instance_init      = memory_region_initfn,
3155    .instance_finalize  = memory_region_finalize,
3156};
3157
3158static const TypeInfo iommu_memory_region_info = {
3159    .parent             = TYPE_MEMORY_REGION,
3160    .name               = TYPE_IOMMU_MEMORY_REGION,
3161    .class_size         = sizeof(IOMMUMemoryRegionClass),
3162    .instance_size      = sizeof(IOMMUMemoryRegion),
3163    .instance_init      = iommu_memory_region_initfn,
3164    .abstract           = true,
3165};
3166
3167static void memory_register_types(void)
3168{
3169    type_register_static(&memory_region_info);
3170    type_register_static(&iommu_memory_region_info);
3171}
3172
3173type_init(memory_register_types)
3174