1
2#include "qemu/osdep.h"
3#include "disas/dis-asm.h"
4#include "elf.h"
5#include "qemu/qemu-print.h"
6
7#include "disas/disas.h"
8#include "disas/capstone.h"
9
10typedef struct CPUDebug {
11 struct disassemble_info info;
12 CPUState *cpu;
13} CPUDebug;
14
15
16struct syminfo *syminfos = NULL;
17
18
19
20
21
22static int host_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
23 struct disassemble_info *info)
24{
25 if (memaddr < info->buffer_vma
26 || memaddr + length > info->buffer_vma + info->buffer_length) {
27
28 return EIO;
29 }
30 memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
31 return 0;
32}
33
34
35
36
37
38static int target_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
39 struct disassemble_info *info)
40{
41 CPUDebug *s = container_of(info, CPUDebug, info);
42 int r = cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
43 return r ? EIO : 0;
44}
45
46
47
48
49
50static void perror_memory(int status, bfd_vma memaddr,
51 struct disassemble_info *info)
52{
53 if (status != EIO) {
54
55 info->fprintf_func(info->stream, "Unknown error %d\n", status);
56 } else {
57
58 info->fprintf_func(info->stream,
59 "Address 0x%" PRIx64 " is out of bounds.\n",
60 memaddr);
61 }
62}
63
64
65static void print_address(bfd_vma addr, struct disassemble_info *info)
66{
67 info->fprintf_func(info->stream, "0x%" PRIx64, addr);
68}
69
70
71static void host_print_address(bfd_vma addr, struct disassemble_info *info)
72{
73 print_address((uintptr_t)addr, info);
74}
75
76
77static int symbol_at_address(bfd_vma addr, struct disassemble_info *info)
78{
79 return 1;
80}
81
82static int print_insn_objdump(bfd_vma pc, disassemble_info *info,
83 const char *prefix)
84{
85 int i, n = info->buffer_length;
86 uint8_t *buf = g_malloc(n);
87
88 info->read_memory_func(pc, buf, n, info);
89
90 for (i = 0; i < n; ++i) {
91 if (i % 32 == 0) {
92 info->fprintf_func(info->stream, "\n%s: ", prefix);
93 }
94 info->fprintf_func(info->stream, "%02x", buf[i]);
95 }
96
97 g_free(buf);
98 return n;
99}
100
101static int print_insn_od_host(bfd_vma pc, disassemble_info *info)
102{
103 return print_insn_objdump(pc, info, "OBJD-H");
104}
105
106static int print_insn_od_target(bfd_vma pc, disassemble_info *info)
107{
108 return print_insn_objdump(pc, info, "OBJD-T");
109}
110
111static void initialize_debug(CPUDebug *s)
112{
113 memset(s, 0, sizeof(*s));
114 s->info.arch = bfd_arch_unknown;
115 s->info.cap_arch = -1;
116 s->info.cap_insn_unit = 4;
117 s->info.cap_insn_split = 4;
118 s->info.memory_error_func = perror_memory;
119 s->info.symbol_at_address_func = symbol_at_address;
120}
121
122static void initialize_debug_target(CPUDebug *s, CPUState *cpu)
123{
124 initialize_debug(s);
125
126 s->cpu = cpu;
127 s->info.read_memory_func = target_read_memory;
128 s->info.print_address_func = print_address;
129#if TARGET_BIG_ENDIAN
130 s->info.endian = BFD_ENDIAN_BIG;
131#else
132 s->info.endian = BFD_ENDIAN_LITTLE;
133#endif
134
135 CPUClass *cc = CPU_GET_CLASS(cpu);
136 if (cc->disas_set_info) {
137 cc->disas_set_info(cpu, &s->info);
138 }
139}
140
141static void initialize_debug_host(CPUDebug *s)
142{
143 initialize_debug(s);
144
145 s->info.read_memory_func = host_read_memory;
146 s->info.print_address_func = host_print_address;
147#if HOST_BIG_ENDIAN
148 s->info.endian = BFD_ENDIAN_BIG;
149#else
150 s->info.endian = BFD_ENDIAN_LITTLE;
151#endif
152#if defined(CONFIG_TCG_INTERPRETER)
153 s->info.print_insn = print_insn_tci;
154#elif defined(__i386__)
155 s->info.mach = bfd_mach_i386_i386;
156 s->info.cap_arch = CS_ARCH_X86;
157 s->info.cap_mode = CS_MODE_32;
158 s->info.cap_insn_unit = 1;
159 s->info.cap_insn_split = 8;
160#elif defined(__x86_64__)
161 s->info.mach = bfd_mach_x86_64;
162 s->info.cap_arch = CS_ARCH_X86;
163 s->info.cap_mode = CS_MODE_64;
164 s->info.cap_insn_unit = 1;
165 s->info.cap_insn_split = 8;
166#elif defined(_ARCH_PPC)
167 s->info.cap_arch = CS_ARCH_PPC;
168# ifdef _ARCH_PPC64
169 s->info.cap_mode = CS_MODE_64;
170# endif
171#elif defined(__riscv) && defined(CONFIG_RISCV_DIS)
172#if defined(_ILP32) || (__riscv_xlen == 32)
173 s->info.print_insn = print_insn_riscv32;
174#elif defined(_LP64)
175 s->info.print_insn = print_insn_riscv64;
176#else
177#error unsupported RISC-V ABI
178#endif
179#elif defined(__aarch64__)
180 s->info.cap_arch = CS_ARCH_ARM64;
181#elif defined(__alpha__)
182 s->info.print_insn = print_insn_alpha;
183#elif defined(__sparc__)
184 s->info.print_insn = print_insn_sparc;
185 s->info.mach = bfd_mach_sparc_v9b;
186#elif defined(__arm__)
187
188 s->info.cap_arch = CS_ARCH_ARM;
189#elif defined(__MIPSEB__)
190 s->info.print_insn = print_insn_big_mips;
191#elif defined(__MIPSEL__)
192 s->info.print_insn = print_insn_little_mips;
193#elif defined(__m68k__)
194 s->info.print_insn = print_insn_m68k;
195#elif defined(__s390__)
196 s->info.cap_arch = CS_ARCH_SYSZ;
197 s->info.cap_insn_unit = 2;
198 s->info.cap_insn_split = 6;
199#elif defined(__hppa__)
200 s->info.print_insn = print_insn_hppa;
201#endif
202}
203
204
205void target_disas(FILE *out, CPUState *cpu, target_ulong code,
206 target_ulong size)
207{
208 target_ulong pc;
209 int count;
210 CPUDebug s;
211
212 initialize_debug_target(&s, cpu);
213 s.info.fprintf_func = fprintf;
214 s.info.stream = out;
215 s.info.buffer_vma = code;
216 s.info.buffer_length = size;
217
218 if (s.info.cap_arch >= 0 && cap_disas_target(&s.info, code, size)) {
219 return;
220 }
221
222 if (s.info.print_insn == NULL) {
223 s.info.print_insn = print_insn_od_target;
224 }
225
226 for (pc = code; size > 0; pc += count, size -= count) {
227 fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
228 count = s.info.print_insn(pc, &s.info);
229 fprintf(out, "\n");
230 if (count < 0)
231 break;
232 if (size < count) {
233 fprintf(out,
234 "Disassembler disagrees with translator over instruction "
235 "decoding\n"
236 "Please report this to qemu-devel@nongnu.org\n");
237 break;
238 }
239 }
240}
241
242static int plugin_printf(FILE *stream, const char *fmt, ...)
243{
244
245 GString *s = (GString *)stream;
246 int initial_len = s->len;
247 va_list va;
248
249 va_start(va, fmt);
250 g_string_append_vprintf(s, fmt, va);
251 va_end(va);
252
253 return s->len - initial_len;
254}
255
256static void plugin_print_address(bfd_vma addr, struct disassemble_info *info)
257{
258
259}
260
261
262
263
264
265
266
267char *plugin_disas(CPUState *cpu, uint64_t addr, size_t size)
268{
269 CPUDebug s;
270 GString *ds = g_string_new(NULL);
271
272 initialize_debug_target(&s, cpu);
273 s.info.fprintf_func = plugin_printf;
274 s.info.stream = (FILE *)ds;
275 s.info.buffer_vma = addr;
276 s.info.buffer_length = size;
277 s.info.print_address_func = plugin_print_address;
278
279 if (s.info.cap_arch >= 0 && cap_disas_plugin(&s.info, addr, size)) {
280 ;
281 } else if (s.info.print_insn) {
282 s.info.print_insn(addr, &s.info);
283 } else {
284 ;
285 }
286
287
288 return g_string_free(ds, false);
289}
290
291
292void disas(FILE *out, const void *code, unsigned long size)
293{
294 uintptr_t pc;
295 int count;
296 CPUDebug s;
297
298 initialize_debug_host(&s);
299 s.info.fprintf_func = fprintf;
300 s.info.stream = out;
301 s.info.buffer = code;
302 s.info.buffer_vma = (uintptr_t)code;
303 s.info.buffer_length = size;
304
305 if (s.info.cap_arch >= 0 && cap_disas_host(&s.info, code, size)) {
306 return;
307 }
308
309 if (s.info.print_insn == NULL) {
310 s.info.print_insn = print_insn_od_host;
311 }
312 for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
313 fprintf(out, "0x%08" PRIxPTR ": ", pc);
314 count = s.info.print_insn(pc, &s.info);
315 fprintf(out, "\n");
316 if (count < 0) {
317 break;
318 }
319 }
320
321}
322
323
324const char *lookup_symbol(target_ulong orig_addr)
325{
326 const char *symbol = "";
327 struct syminfo *s;
328
329 for (s = syminfos; s; s = s->next) {
330 symbol = s->lookup_symbol(s, orig_addr);
331 if (symbol[0] != '\0') {
332 break;
333 }
334 }
335
336 return symbol;
337}
338
339#if !defined(CONFIG_USER_ONLY)
340
341#include "monitor/monitor.h"
342
343static int
344physical_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
345 struct disassemble_info *info)
346{
347 CPUDebug *s = container_of(info, CPUDebug, info);
348 MemTxResult res;
349
350 res = address_space_read(s->cpu->as, memaddr, MEMTXATTRS_UNSPECIFIED,
351 myaddr, length);
352 return res == MEMTX_OK ? 0 : EIO;
353}
354
355
356void monitor_disas(Monitor *mon, CPUState *cpu,
357 target_ulong pc, int nb_insn, int is_physical)
358{
359 int count, i;
360 CPUDebug s;
361
362 initialize_debug_target(&s, cpu);
363 s.info.fprintf_func = qemu_fprintf;
364 if (is_physical) {
365 s.info.read_memory_func = physical_read_memory;
366 }
367 s.info.buffer_vma = pc;
368
369 if (s.info.cap_arch >= 0 && cap_disas_monitor(&s.info, pc, nb_insn)) {
370 return;
371 }
372
373 if (!s.info.print_insn) {
374 monitor_printf(mon, "0x" TARGET_FMT_lx
375 ": Asm output not supported on this arch\n", pc);
376 return;
377 }
378
379 for(i = 0; i < nb_insn; i++) {
380 monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc);
381 count = s.info.print_insn(pc, &s.info);
382 monitor_printf(mon, "\n");
383 if (count < 0)
384 break;
385 pc += count;
386 }
387}
388#endif
389